KR100613792B1 - 혼성 집적 회로 장치 및 그 제조 방법 - Google Patents
혼성 집적 회로 장치 및 그 제조 방법 Download PDFInfo
- Publication number
- KR100613792B1 KR100613792B1 KR20040074513A KR20040074513A KR100613792B1 KR 100613792 B1 KR100613792 B1 KR 100613792B1 KR 20040074513 A KR20040074513 A KR 20040074513A KR 20040074513 A KR20040074513 A KR 20040074513A KR 100613792 B1 KR100613792 B1 KR 100613792B1
- Authority
- KR
- South Korea
- Prior art keywords
- circuit board
- hybrid integrated
- groove
- integrated circuit
- conductive pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/016—Manufacture or treatment using moulds
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/0909—Preformed cutting or breaking line
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09827—Tapered, e.g. tapered hole, via or groove
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Abstract
Description
Claims (11)
- 회로 기판과, 상기 회로 기판의 표면에 형성된 도전 패턴과, 상기 도전 패턴에 전기적으로 접속된 회로 소자를 구비하고,상기 회로 기판의 측면은, 상기 회로 기판의 표면 주변부로부터 경사 하방으로 연장하는 제1 경사부와, 상기 회로 기판의 이면으로부터 경사 상방으로 연장하고 상기 제1 경사부보다도 크게 형성되는 제2 경사부로 이루어지는 것을 특징으로 하는 혼성 집적 회로 장치.
- 제1항에 있어서,상기 제1 경사부의 외측과 상기 회로 기판의 면 방향이 형성하는 각도는, 상기 제2 경사부의 외측과 상기 회로 기판의 면 방향이 형성하는 각도보다도 작은 것을 특징으로 하는 혼성 집적 회로 장치.
- 제1항에 있어서,상기 제2 경사부는, 상기 회로 기판의 두께 방향에 대하여, 상기 제1 경사부보다도 크게 형성되는 것을 특징으로 하는 혼성 집적 회로 장치.
- 제1항에 있어서,상기 제1 경사부의 폭은, 상기 제2 경사부보다도 좁게 형성되는 것을 특징으 로 하는 혼성 집적 회로 장치.
- 제1항에 있어서,상기 회로 기판의 표면 및 측면은, 밀봉 수지로 밀봉되는 것을 특징으로 하는 혼성 집적 회로 장치.
- 제1항에 있어서,상기 도전 패턴은, 다층으로 형성되는 것을 특징으로 하는 혼성 집적 회로 장치.
- 제1항에 있어서,상기 회로 기판은, 금속으로 이루어지는 기판이고,상기 회로 기판의 표면에는, 절연층이 형성되는 것을 특징으로 하는 혼성 집적 회로 장치.
- 표면이 절연 처리된 기판을 준비하는 공정과,상기 기판의 표면에 도전 패턴을 형성하는 공정과,상기 기판의 표면에 제1 홈을 격자 형상으로 형성하고, 상기 기판의 이면에 상기 제1 홈보다도 큰 제2 홈을 격자 형상으로 형성하는 공정과,상기 도전 패턴에 회로 소자를 전기적으로 접속하는 공정과,상기 제1 홈 및 상기 제2 홈이 형성된 개소에서 상기 기판을 분리하는 공정을 포함하는 것을 특징으로 하는 혼성 집적 회로 장치의 제조 방법.
- 제8항에 있어서,상기 제1 홈에, 구동력을 갖지 않는 둥근 컷터를 밀어부치면서 회전시킴으로써 상기 회로 기판의 분할을 행하는 것을 특징으로 하는 혼성 집적 회로 장치의 제조 방법.
- 제8항에 있어서,상기 제1 홈에, 레이저를 조사함으로써, 상기 회로 기판의 분할을 행하는 것을 특징으로 하는 혼성 집적 회로 장치의 제조 방법.
- 제8항에 있어서,상기 제1 홈 또는 상기 제2 홈의 단면에 대응한 형상의 톱날을 갖는 컷트톱을, 고속으로 회전시키는 것에 의해 상기 제1 홈 또는 상기 제2 홈을 형성하는 것을 특징으로 하는 혼성 집적 회로 장치의 제조 방법.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2003-00333888 | 2003-09-25 | ||
| JP2003333888 | 2003-09-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20050030550A KR20050030550A (ko) | 2005-03-30 |
| KR100613792B1 true KR100613792B1 (ko) | 2006-08-22 |
Family
ID=34373140
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR20040074513A Expired - Fee Related KR100613792B1 (ko) | 2003-09-25 | 2004-09-17 | 혼성 집적 회로 장치 및 그 제조 방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7232957B2 (ko) |
| KR (1) | KR100613792B1 (ko) |
| CN (1) | CN100438719C (ko) |
| TW (1) | TWI271125B (ko) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7964957B2 (en) | 2007-12-26 | 2011-06-21 | Sanyo Electric Co., Ltd. | Circuit substrate, circuit device and manufacturing process thereof |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4595665B2 (ja) * | 2005-05-13 | 2010-12-08 | 富士電機システムズ株式会社 | 配線基板の製造方法 |
| EP1926357A3 (en) * | 2006-11-21 | 2009-09-30 | Ricoh Company, Ltd. | Functional device fabrication apparatus and functional device fabricated with the same |
| JP2008299712A (ja) * | 2007-06-01 | 2008-12-11 | Nec Electronics Corp | 半導体装置 |
| KR101505551B1 (ko) * | 2007-11-30 | 2015-03-25 | 페어차일드코리아반도체 주식회사 | 온도 감지소자가 장착된 반도체 파워 모듈 패키지 및 그제조방법 |
| US8664038B2 (en) * | 2008-12-04 | 2014-03-04 | Stats Chippac Ltd. | Integrated circuit packaging system with stacked paddle and method of manufacture thereof |
| EP2446478B1 (en) | 2009-06-25 | 2018-09-12 | IMEC vzw | Biocompatible packaging |
| US8724339B2 (en) * | 2009-12-01 | 2014-05-13 | Apple Inc. | Compact media player |
| WO2011078349A1 (ja) * | 2009-12-24 | 2011-06-30 | 京セラ株式会社 | 多数個取り配線基板および配線基板ならびに電子装置 |
| KR101148226B1 (ko) * | 2010-05-24 | 2012-05-22 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| KR101383137B1 (ko) * | 2010-05-26 | 2014-04-09 | 가부시키가이샤 무라타 세이사쿠쇼 | 부품 내장 기판 |
| USD637192S1 (en) * | 2010-10-18 | 2011-05-03 | Apple Inc. | Electronic device |
| JP5796956B2 (ja) | 2010-12-24 | 2015-10-21 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 回路装置およびその製造方法 |
| US8933468B2 (en) | 2012-03-16 | 2015-01-13 | Princeton University Office of Technology and Trademark Licensing | Electronic device with reduced non-device edge area |
| US11437304B2 (en) | 2014-11-06 | 2022-09-06 | Semiconductor Components Industries, Llc | Substrate structures and methods of manufacture |
| US9397017B2 (en) | 2014-11-06 | 2016-07-19 | Semiconductor Components Industries, Llc | Substrate structures and methods of manufacture |
| US9408301B2 (en) | 2014-11-06 | 2016-08-02 | Semiconductor Components Industries, Llc | Substrate structures and methods of manufacture |
| CN108028242B (zh) * | 2015-09-30 | 2021-08-17 | 敏捷电源开关三维集成Apsi3D | 包括附加迹线的半导体功率器件及制造半导体功率器件的方法 |
| DE102019129675A1 (de) | 2018-12-11 | 2020-06-18 | Infineon Technologies Ag | Leistungshalbleitermodul und Verfahren zum Herstellen eines Leistungshalbleitermoduls |
| US11848243B2 (en) * | 2021-03-05 | 2023-12-19 | Infineon Technologies Austria Ag | Molded semiconductor package having a substrate with bevelled edge |
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| US4814296A (en) * | 1987-08-28 | 1989-03-21 | Xerox Corporation | Method of fabricating image sensor dies for use in assembling arrays |
| JP2698278B2 (ja) | 1992-01-31 | 1998-01-19 | 三洋電機株式会社 | 混成集積回路装置 |
| JP2756075B2 (ja) * | 1993-08-06 | 1998-05-25 | 三菱電機株式会社 | 金属ベース基板およびそれを用いた電子機器 |
| JPH08125101A (ja) * | 1994-10-24 | 1996-05-17 | Fuji Electric Co Ltd | 半導体装置 |
| JP3211609B2 (ja) * | 1995-02-23 | 2001-09-25 | 株式会社村田製作所 | 積層電子部品およびその製造方法 |
| JP3260601B2 (ja) * | 1995-09-22 | 2002-02-25 | 松下電器産業株式会社 | 回路装置およびその製造方法 |
| US5831218A (en) * | 1996-06-28 | 1998-11-03 | Motorola, Inc. | Method and circuit board panel for circuit board manufacturing that prevents assembly-line delamination and sagging |
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| JP2000508838A (ja) * | 1997-01-29 | 2000-07-11 | モトローラ・インコーポレイテッド | 複合回路ボードの製造において組み立てラインでの剥離およびたわみを防止する方法および回路ボード・パネル |
| US6047470A (en) * | 1997-08-20 | 2000-04-11 | Micron Technology, Inc. | Singulation methods |
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| JP3756691B2 (ja) * | 1999-03-18 | 2006-03-15 | 株式会社日立製作所 | 内燃機関用の樹脂封止形電子装置 |
| DE19927046B4 (de) * | 1999-06-14 | 2007-01-25 | Electrovac Ag | Keramik-Metall-Substrat als Mehrfachsubstrat |
| JP2001019933A (ja) * | 1999-07-09 | 2001-01-23 | Dow Corning Toray Silicone Co Ltd | シリコーン系接着性シート、およびその製造方法 |
| JP3616872B2 (ja) * | 2000-09-14 | 2005-02-02 | 住友電気工業株式会社 | ダイヤモンドウエハのチップ化方法 |
| US6951707B2 (en) * | 2001-03-08 | 2005-10-04 | Ppg Industries Ohio, Inc. | Process for creating vias for circuit assemblies |
-
2004
- 2004-09-15 US US10/941,076 patent/US7232957B2/en not_active Expired - Lifetime
- 2004-09-17 CN CNB2004100787009A patent/CN100438719C/zh not_active Expired - Fee Related
- 2004-09-17 KR KR20040074513A patent/KR100613792B1/ko not_active Expired - Fee Related
- 2004-09-20 TW TW93128408A patent/TWI271125B/zh not_active IP Right Cessation
-
2007
- 2007-05-25 US US11/754,011 patent/US20070226996A1/en not_active Abandoned
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7964957B2 (en) | 2007-12-26 | 2011-06-21 | Sanyo Electric Co., Ltd. | Circuit substrate, circuit device and manufacturing process thereof |
| KR101077416B1 (ko) * | 2007-12-26 | 2011-10-26 | 산요 세미컨덕터 컴퍼니 리미티드 | 회로 기판 및 그 제조 방법, 회로 장치 및 그 제조 방법, 및 기판 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI271125B (en) | 2007-01-11 |
| CN1602139A (zh) | 2005-03-30 |
| CN100438719C (zh) | 2008-11-26 |
| US20070226996A1 (en) | 2007-10-04 |
| US7232957B2 (en) | 2007-06-19 |
| TW200520638A (en) | 2005-06-16 |
| KR20050030550A (ko) | 2005-03-30 |
| US20050067186A1 (en) | 2005-03-31 |
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