KR100603309B1 - Method of driving discharge display panel for efficient addressing - Google Patents

Abstract

In the method of driving a discharge display panel according to the present invention, a discharge display in which each discharge cell is set as an intersection area by forming display electrode line pairs side by side and address electrode lines spaced apart and intersecting the display electrode line pairs. For the panel, a gradation display is performed by time division driving by including a plurality of sub-fields in a unit frame, wherein each sub-field includes addressing and display-hold times. Here, the display-hold time is changed to be inversely proportional to the average gradation of its frame while being proportional to the gradation weighting value set in its sub-field. And the addressing time changes to be proportional to the average gradation of its frame.

Description

Method of driving discharge display panel for efficient addressing {Method of driving discharge display panel for efficient addressing}

1 is a perspective view showing an internal structure of a conventional three-electrode surface discharge plasma display panel.

2 is a cross-sectional view showing an example of one discharge cell of the panel of FIG.

FIG. 3 is a block diagram illustrating a driving apparatus of the plasma display panel of FIG. 1 performing a driving method according to the present invention.

4 is a graph illustrating an automatic power control method performed by the driving device of FIG. 1.

5A is a timing diagram illustrating a driving method of the first embodiment of the present invention when the average gray level of a unit frame is low.

5B is a timing diagram illustrating a driving method of the first embodiment when the average gray level of a unit frame is high.

6A is a timing diagram illustrating a driving method of a second embodiment of the present invention when the average gray level of a unit frame is low.

6B is a timing diagram illustrating a driving method of the second embodiment when the average gray level of a unit frame is high.

FIG. 7A is a timing diagram illustrating the fourth sub-field in more detail in the address-display mixed driving method of FIG. 6A.

FIG. 7B is a timing diagram illustrating the fourth sub-field in more detail in the address-display mixed driving method of FIG. 6B.

8A illustrates an example of voltage waveforms of driving signals applied to respective electrode lines in the fourth sub-field of FIG. 5A or 6A when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. Shown is a timing chart.

8B shows an example of voltage waveforms of driving signals applied to respective electrode lines in the fourth sub-field of FIG. 5B or 6B when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. Shown is a timing chart.

<Explanation of symbols for the main parts of the drawings>

1 ... plasma display panel, 10 ... front glass substrate,

11, 15 dielectric layer, 12 protective layer,

13 ... back glass substrate, 14 ... discharge space,

16 fluorescent layers, 17 bulkheads,

X ₁ , ..., X _n ... X electrode lines, Y ₁ , ..., Y _n ... Y electrode lines,

A _R1 , ..., A _Bm ... address electrode lines, X _na , Y _na ... transparent electrode lines,

X _nb , Y _nb ... metal electrode lines, SF1, ... SF5 ... sub-field,

S _Y1 , ..., S _Y123 ... Y electrode drive signals, 62 ... logical control,

S _X1 , ..., S _Xn ... X electrode drive signals, 63 .. address driver,

S _AR1 .. _ABm ... display data signals, 64 ... X driver,

65 ... Y drive unit, 66 ... image processing unit.

The present invention relates to a method of driving a discharge display panel, and more particularly, to a discharge display panel in which display electrode line pairs are formed side by side and address electrode lines are formed to be spaced apart from and cross the display electrode line pairs. A method of driving a discharge display panel in which a plurality of sub-fields are included in a unit frame to perform gradation display by time division driving.

1 illustrates a structure of a conventional discharge display panel, for example, a three-electrode surface discharge type plasma display panel. FIG. 2 shows an example of one discharge cell of the panel of FIG. 1. 1 and 2, between the front and rear glass substrates 10 and 13 of the conventional surface discharge plasma display panel 1, the address electrode lines A _R1 , A _G1 , ..., A _Gm , A _Bm ), dielectric layers 11 and 15, Y electrode lines (Y ₁ , ..., Y _n ), X electrode lines (X ₁ , ..., X _n ), fluorescent layer 16, The partition 17 and the magnesium monoxide (MgO) layer 12 as a protective layer are provided.

The address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm are formed in a predetermined pattern on the front side of the rear glass substrate 13. The lower dielectric layer 15 is entirely applied in front of the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm . In front of the lower dielectric layer 15, barrier ribs 17 are formed in a direction parallel to the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm . These partitions 17 function to partition the discharge area of each discharge cell and prevent optical cross talk between each discharge cell. The fluorescent layer 16 is formed between the partition walls 17.

The X electrode lines X ₁ ,..., X _n and the Y electrode lines Y ₁ , ..., Y _n constituting the display electrode line pairs are the address electrode lines A _R1 , A _G1,. .., A _Gm , A _Bm ) is formed in a constant pattern on the back of the front glass substrate 10 to be orthogonal. Each intersection sets a corresponding discharge cell. Each X electrode line (X ₁ , ..., X _n ) and each Y electrode line (Y ₁ , ..., Y _n ) is a transparent electrode line of a transparent conductive material such as indium tin oxide (ITO) or the like (FIG. 2). X _na , Y _na ) and a metal electrode line (X _nb , Y _nb of FIG. 2) for increasing conductivity are formed. The front dielectric layer 11 is formed by applying the entire surface to the rear of the X electrode lines X ₁ ,..., X _n and the Y electrode lines Y ₁ ..., Y _n . A protective layer 12 for protecting the panel 1 from a strong electric field, for example, a magnesium monoxide (MgO) layer, is formed by applying the entire surface to the back of the front dielectric layer 11. The plasma forming gas is sealed in the discharge space 14.

In a typical driving method of such a discharge display panel, a plurality of sub-fields are included in a unit frame to perform gradation display by time division driving, and each sub-field is reset or addressed. , And display-sustaining times in sequence (see US Pat. No. 5,541,618). At the reset time the charge states of all discharge cells become uniform. At the addressing time, the wall potential set in the selected discharge cells is generated. In the display-hold time, the alternating voltage set to all the XY electrode line pairs is applied so that the discharge cells in which the wall potential is formed in the addressing step cause the display-hold discharge. In this display-maintenance step, plasma is formed in the discharge space 14 of the selected discharge cells causing the display-maintenance discharge, that is, the gas layer, and the fluorescent layer (16 in FIG. 1) is excited by the ultraviolet radiation to emit light. Is generated.

On the other hand, in a typical discharge display device, a large discharge power is used when the average gradation of a unit frame is high. Thus, automatic power control is performed to protect the discharge display device from large discharge power. Here, the display-hold time is set to be proportional to the gray scale weights of the sub-fields of the sub-fields, and is controlled as inversely proportional to the average gray scale of the unit frame. Therefore, a rest time is generated in proportion to the average gray level of the unit frame.

SUMMARY OF THE INVENTION An object of the present invention is to provide a gray scale display by time division driving by including a plurality of sub-fields in a unit frame and to perform the automatic power control. It is to provide a driving method that can help stabilize the driving.

According to the present invention for achieving the above object, a discharge display panel in which each discharge cell is set as the crossing area by forming display electrode line pairs side by side and address electrode lines spaced apart from and intersecting the display electrode line pairs. For a driving method, a plurality of sub-fields are included in a unit frame to perform gradation display by time division driving, wherein each sub-field includes addressing and display-hold times. Here, the display-hold time is changed to be inversely proportional to the average gradation of its frame while being proportional to the gradation weighting value set in its sub-field. The addressing time is changed to be proportional to the average gradation of its frame.

According to the driving method of the discharge display panel of the present invention, since the addressing time is changed to be proportional to the average gradation of its frame, the pause time of the frame due to the change of the display-holding time is effectively added to the addressing time. Thus, the addressing time may be long. Accordingly, the operation at the addressing time can be further stabilized.

Preferably, the display electrode line pairs are grouped and driven into at least first and second display electrode-line pair groups such that at least one display electrode line pair is included in one display electrode-line pair group. Further, each of the sub-fields may have an addressing time for the first display electrode-line pair group, a display-hold time for the first display electrode-line pair group, and for the second display electrode-line pair group. Addressing time and display-hold time for the second display electrode-line pair groups are sequentially included. The common display-hold time for the first and second display electrode-line pair groups is selectively included according to the gray scale weight value of each sub-field.

Accordingly, in each of the sub-fields, after the addressing of the first display electrode-line pair group is completed, the first display electrode-line pair group is more than the addressing of the second display electrode-line pair group. An indication-keeping discharge for is performed first. Accordingly, the waiting time for waiting for all other display electrode line pairs to be addressed after the discharge cells are addressed is shortened, so that the accuracy of the display-hold discharge in the display-hold time can be increased.

Hereinafter, preferred embodiments according to the present invention will be described in detail.

Referring to FIG. 3, the driving apparatus of the plasma display panel 1 of FIG. 1, which performs the driving method according to the present invention, includes an image processor 66, a controller 62, an address driver 63, and an X driver 64. And a Y driver 65. The image processing unit 66 converts an external analog image signal into a digital signal to convert an internal image signal, for example, 8 bits of red (R), green (G), and blue (B) image data, a clock signal, vertical and horizontal, respectively. Generate sync signals. The controller 62 generates driving control signals S _A , S _Y , and S _X according to an internal image signal from the image processor 66. The address driver 63 generates the display data signal by processing the address signal S _A among the driving control signals S _A , S _Y , and S _X from the controller 62, and generates the display data signal. Is applied to the address electrode lines. The X driving unit 64 processes the X driving control signal S _X among the driving control signals S _A , S _Y , and S _X from the control unit 62, and applies the X driving control signal S _X to the X electrode lines. The Y driver 65 processes the Y driving control signal S _Y among the driving control signals S _A , S _Y , and S _X from the controller 62 and applies the Y driving control signal S _Y to the Y electrode lines.

4 illustrates an automatic power control method performed by the driving apparatus of FIG. 1. Referring to FIG. 4, the total number N _S of display-maintenance pulses of the unit frame proportional to the total display-maintenance time of the unit frame is changed in inverse proportion to the average gray level ASL of the unit frame. Accordingly, the number of display-hold pulses N _S proportional to the display-hold time of each sub-field is inversely proportional to the average gray level (ASL) of its frame while being proportional to the gray weighting value set in its sub-field. Change.

Here, as will be described in detail with reference to Figs. 5A to 8B, the addressing time is changed to be proportional to the average gradation of its frame. Accordingly, the pause time of the frame due to the change of the display-hold time can be effectively added to the addressing time, so that the addressing time can be long. Accordingly, the operation at the addressing time can be further stabilized.

5A shows a driving method of the first embodiment of the present invention when the average gray level of a unit frame is low. 5B shows the driving method of the first embodiment when the average gray level of the unit frame is high. The driving method of the first embodiment of the present invention will be described with reference to FIGS. 5A and 5B.

In FIGS. 5A and 5B, reference numerals SF1 to SF5 denote sub-fields allocated within a unit frame, Y ₁ to Y _{n denote} Y electrode lines on which driving objects are referenced, and R1 to R5 _denote reset times, and M1. M5 to M5 indicate mixed drive times in which the display-hold time exists between each addressing time, CS1 to CS5 indicate common display-hold times, and AS1 to AS5 indicate correction display-hold times, respectively. 5A and 5B, only a single display electrode-line pair is included in each of the display electrode-line pair groups. In other words, each of the display electrode-line pair groups is the same as each of the XY electrode line pairs X ₁ Y ₁ to X _n Y _n .

1, 5A, and 5B, the first to fifth sub-fields are set in a unit frame such that the gray scale weight value of the sub-field is gradually increased. The gray scale weight value of each sub-field is represented by the common display-hold times CS2 to CS5 for all display electrode-line pair groups.

The first sub-field SF1 having the lowest gradation weighting value includes the reset time R1, the mixing drive time M1, and the correction display-hold time AS1, and provides a separate common display-hold time. do not include. Each of the second to fifth sub-fields SF2 to SF5 has a reset time R2 to R5, a mixed driving time M2 to M5, a correction display-hold time AS2 to AS5, and a common display-hold Time CS2 to CS5.

At the reset times R1 to R5, the charge states of all the discharge cells become uniform. At the addressing time included in the mixing drive time M1 to M5, a predetermined wall potential is generated in the selected discharge cells. In the display-holding time included in the mixed driving times M1 to M5, a predetermined alternating voltage is applied to the addressed XY electrode line pairs to display-hold the discharge cells selected at the addressing time to form a predetermined wall potential. Cause discharge.

In the mixing drive times M1 to M5, addressing and display-holding operations are performed alternately. For example, addressing is performed on the discharge cells of the first Y electrode line Y ₁ at the first unit time, and the first display electrode line pair as the first display electrode-line pair group, ie, XY, at the second unit time. An alternating voltage is applied to the electrode line pair X ₁ Y ₁ , addressing is performed on the discharge cells of the second Y electrode line Y ₂ at the third unit time, and the first and second marks at the fourth unit time. An alternating voltage is applied to the first and second XY electrode line pairs X ₁ Y ₁ , X ₂ Y ₂ as electrode-line pair groups, and the third Y electrode line Y ₃ at the fifth unit time. Addressing is performed on the discharge cells, and alternating voltage is applied to the first to third XY electrode line pairs X ₁ Y ₁ to X ₃ Y ₃ as the first to third display electrode-line pair groups at a sixth unit time. Is applied. Generalizing this process, the addressing operation is performed on each of the Y electrode lines Y ₁ to Y _{n for} every odd unit time of each of the mixing driving times M1 to M5, and the Y electrode on which the addressing operation is completed. The display-maintenance operation is performed for every even unit time for a line or lines.

The number of display-hold pulses proportional to the total display-hold time varies so as to be inversely proportional to the average gradation of its frame in proportion to the gradation weights set in its sub-field. Here, the addressing times change to be proportional to the average gradation of its frame. Accordingly, the pause time of the frame due to the change of the display-hold time can be effectively added to the addressing time, so that the addressing time can be long. Accordingly, the operation at the addressing times can be further stabilized.

On the other hand, since the waiting time until the other XY electrode line pairs are all addressed after the discharge cells are addressed is shortened, the accuracy of the display-maintenance discharge can be increased.

In the correction display-hold time AS1 to AS5, each other for each of the XY electrode line pairs X ₂ Y ₂ to X _n Y _n that did not satisfy the required display-hold time in the mixing drive time M1 to M5. By applying an alternating voltage during the differently set time, the necessary display-hold time is filled for all XY electrode line pairs X ₁ Y ₁ to X _n Y _n .

At the common display-hold time CS2 to CS5 of each of the second to fifth sub-fields SF2 to SF5 set in proportion to the gray scale weight of each sub-field, all the XY electrode line pairs X ₂ Y ₂ To X _n Y _n ), an alternating voltage is applied.

6A illustrates a driving method of the second embodiment of the present invention when the average gray level of a unit frame is low. 6B shows the driving method of the second embodiment when the average gray level of the unit frame is high. The driving method of the first embodiment of the present invention will be described with reference to FIGS. 6A and 6B.

In Figs. 6A and 6B, the same reference numerals as in Figs. 5A and 5B indicate the objects of the same function. 6A and 6B, reference numerals Y _G1 to Y _G8 denote display electrode-line pair groups to which Y electrode lines Y ₁ to Y _n belong. For example, when the Y electrode lines Y ₁ to Y _n are 480, the first to 60th Y electrode lines Y ₁ to Y _{60 are} connected to the first display electrode-line pair group Y _G1 . And the 61 st to 120 th Y electrode lines (Y ₆₁ to Y ₁₂₀ ) are formed in the second display electrode-line pair group Y _G2 , and the 121 th to 180 th Y electrode lines (Y ₁₂₁ to Y ₁₈₀ ) are formed of the second display electrode-line pair group Y _G2 . In the third display electrode-line pair group Y _G3 , the 181-240 th Y electrode lines Y _181- Y ₂₄₀ are in the fourth display electrode-line pair group Y _G4 , and the 241-300 Y The electrode lines Y ₂₄₁ to Y ₃₀₀ correspond to the fifth display electrode-line pair group Y _G5 , and the 301 to 360 th Y electrode lines Y ₃₀₁ to Y ₃₆₀ correspond to the sixth display electrode-line pair group. At Y _G6 , the 361 th to 420 Y electrode lines Y ₃₆₁ to Y ₄₂₀ are placed on the seventh display electrode-line pair group Y _G7 , and the 421 th to 480 Y electrode lines Y _421. To Y ₄₈₀ ) respectively belong to the eighth display electrode-line pair group Y _G1 .

1, 6A, and 6B, each of the first and second sub-fields SF1 and SF2 has a reset time R1, R2, a mixed drive time M1, M2, and a correction display-maintenance. It includes the times AS1 and AS2. Meanwhile, each of the third to fifth sub-fields SF3 to SF5 has a reset time R3 to R5, a mixed driving time M3 to M5, a correction display-hold time AS3 to AS5, and a common display. -Hold times CS3 to CS5. As described with reference to FIG. 4, each of the first and second sub-fields SF1 and SF2 has lower gray scale weight values compared to each of the other sub-fields SF3 to SF5, thus maintaining a common display-maintenance. No time is added. The difference from the driving method of FIG. 4 is that, in the driving method of FIG. 4, each display electrode-line pair group includes only one display electrode line pair. In the driving method of FIG. It includes only the display electrode line pair of.

The number of display-hold pulses proportional to the total display-hold time varies so as to be inversely proportional to the average gradation of its frame in proportion to the gradation weights set in its sub-field. Here, the addressing times in the mixing drive times M3 to M5 change to be proportional to the average gradation of their frames. Accordingly, the pause time of the frame due to the change of the display-hold time can be effectively added to the addressing time, so that the addressing time can be long.

On the other hand, since the waiting time for waiting for the remaining display electrode-line pair groups to be addressed after each display electrode-line pair group is shortened, the accuracy of the display-hold discharge can be increased.

FIG. 7A shows the fourth sub-field in more detail in the address-display mixed driving method of FIG. 6A. FIG. 7B shows the fourth sub-field in more detail in the address-display mixed driving method of FIG. 6B. A driving process of the fourth sub-field SF4 in the address-display mixed driving method of FIGS. 6A and 6B will be described in detail with reference to FIGS. 7A and 7B as follows.

For reference, in the case of the fourth sub-field SF4 of FIGS. 7A and 7B, the required display-hold time for all the display electrode-line pair groups is obtained by adding seven unit times to the common display-hold time CS4. It's time.

At the reset time R4, the charge states of all the discharge cells become uniform.

In the mixing drive time M4, the addressing and display-holding operation is performed alternately. For example, the addressing step A _G1 for the first display electrode-line pair group Y _G1 is performed at the first addressing time T _A1 . In the first display-hold time T _S1 , the display-hold step S ₁₁ for the first display electrode-line pair group Y _G1 for which addressing is completed is performed. At the second addressing time T _A2 , the addressing step A _G2 for the second display electrode-line pair group Y _G2 is performed. In the second display-hold time T _S2 , the display-hold steps S ₁₂ and S ₂₁ for the addressing-completed first and second display electrode-line pair groups Y _G1 and Y _G2 proceed simultaneously. do. At the third addressing time T _A3 , the addressing step A _G3 for the third display electrode-line pair group Y _G3 is performed. In the third display-hold time T _S3 , the display-hold steps S ₁₃ , S ₂₂ , and S ₃₁ for the addressed first to third display electrode-line pair groups Y _G1 to Y _G3 . This proceeds simultaneously. Generalizing this process, in the mixed driving time M4, the addressing operation is performed on each of the display electrode-line pair groups Y _G1 to Y _G8 every odd unit time, and the display in which the addressing operation is completed is performed. The display-maintenance operation is performed for every even unit time for the electrode-line pair group or groups.

The number of display-hold pulses proportional to the total display-hold time varies so as to be inversely proportional to the average gradation of its frame in proportion to the gradation weights set in its sub-field. Here, the addressing times A _G1 to A _G8 in the mixing drive time M4 vary to be proportional to the average gradation of its frame. Accordingly, the pause time of the frame due to the change of the display-hold time can be efficiently added to the addressing times A _G1 to A _G8 , so that the addressing time can be long. Accordingly, the operation at the addressing times A _G1 to A _G8 may be further stabilized.

On the other hand, since the waiting time for waiting for the remaining display electrode-line pair groups to be addressed after each display electrode-line pair group is shortened, the accuracy of the display-hold discharge can be increased.

In the correction display-hold time AS4, the alternating voltage during the time set differently for each of the display electrode-line pair groups Y _G2 to Y _G8 that did not satisfy the required display-hold time in the mixing drive time M4. By applying this, the necessary display-hold time is filled for all the display electrode-line pair groups Y _G1 to Y _G8 . More specifically, the display-hold steps for the second to eighth display electrode-line pair groups Y _G2 to Y _G8 are simultaneously performed in the first unit time T _AS1 of the correction display-hold time AS4. Proceed. In the second unit time T _AS2 , display-maintaining steps for the third to eighth display electrode-line pair groups Y _G3 to Y _G8 are simultaneously performed. In the third unit time, the display-holding steps for the fourth to eighth display electrode-line pair groups Y _G4 to Y _G8 are simultaneously performed. In the fourth unit time, the display-maintenance steps for the fifth to eighth display electrode-line pair groups Y _G5 to Y _G8 are simultaneously performed. In the fifth unit time, the display-holding steps for the sixth to eighth display electrode-line pair groups Y _G6 to Y _G8 are simultaneously performed. In the sixth unit time, the display-holding steps for the seventh and eighth display electrode-line pair groups Y _G7 and Y _G8 are simultaneously performed. Finally, in the seventh unit time, the display-maintenance step for the eighth display electrode-line pair group Y _G8 is performed.

In the common display-hold time CS4 set to be proportional to the gray scale weight value of the fourth sub-field SF4, the display-hold operation is performed on all the display electrode-line pair groups Y _G1 to Y _G8 . That is, an alternating voltage is applied to all XY electrode line pairs X ₁ Y ₁ to X _n Y _n .

8A illustrates an example of voltage waveforms of driving signals applied to respective electrode lines in the fourth sub-field of FIG. 5A or 6A when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. Shows. 8B shows an example of voltage waveforms of driving signals applied to respective electrode lines in the fourth sub-field of FIG. 5B or 6B when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. Shows.

8A and 8B, reference numeral S _{AR1 ..ABm} denotes display data signals applied to address electrode lines (A _R1 to A _{Bm in} FIG. 1) from an address driver (63 in FIG. 3), and S _XG1 denotes an X driver ( From 64 of FIG. 3, a driving signal applied to the X electrode lines (X ₁ ,..., X _{n / 2} of FIG. 1) of the first display electrode-line pair group, S _XG2 denotes the X driving unit 64. from the second display electrode pair group in the line of the X-electrode lines for driving signals to be applied to (see Fig. 1 of the _{X (n / 2) +1,} ..., X n), s YG1 the Y driving unit (FIG. 3 Drive signal applied to the Y electrode lines (Y ₁ ,..., Y _{n / 2 in} FIG. 1) of the first display electrode-line pair group from 65, and S _YG2 is the second from the Y driver 65. The driving signal applied to the Y electrode lines (Y _{(n / 2) +1} , ..., Y _{n in} FIG. 1) of the display electrode-line pair group, R is a reset time, and M is a mixed drive time. CS indicates common display-hold time, and AS indicates correction display-hold time, respectively. The. 1, 8A, and 8B, the operation of the fourth sub-field SF1 of FIGS. 6A to 7B will be described in more detail as follows.

First, an operation process of the reset time R4 will be described in detail.

In the wall charge accumulation time t1 to t2 of the reset time R4, the voltage applied to the Y electrode lines Y ₁ ,..., Y _n is changed from the second voltage V _S to the second voltage ( _S ). than V _S) as the sixth voltage (V _SET) is further continued to rise to a high first voltage (V _SET + V _S). Here, the ground voltage V _G is applied to the X electrode lines X ₁ ,..., X _n and the address electrode lines A _R1 ..., A _Bm . Accordingly, a discharge occurs between the Y electrode lines Y ₁ ,..., Y _n and the X electrode lines X ₁ ,..., X _n , while the Y electrode lines Y ₁ ,. ..., Y _n ) and discharge occur between the address electrode lines A _R1 ,..., A _Bm . Accordingly, many negative wall charges are formed around the Y electrode lines (Y ₁ , ..., Y _n ), and positive wall charges are formed around the X electrode lines (X ₁ , ..., X _n ). Are formed, and positive wall charges are formed around the address electrode lines A _R1 , ..., A _Bm .

In the wall charge distribution times t2 to t3 of the reset time R4, in a state where the voltage applied to the X electrode lines X ₁ ,..., X _n is maintained at the second voltage V _S. The voltage applied to the Y electrode lines Y ₁ ,..., Y _n is continuously lowered from the second voltage V _S to the negative voltage V _SC . Here, the ground voltage V _G is applied to the address electrode lines A _R1 ,..., A _Bm . Accordingly, due to the weak discharge between the X electrode lines (X ₁ ,..., X _n ) and the Y electrode lines (Y ₁ , ..., Y _n ), the Y electrode lines (Y ₁ ,. Some of the negative wall charges around .., Y _n ) move around the X electrode lines X ₁ ,..., X _n .

Accordingly, the wall electric-potential of the X electrode lines X ₁ , ..., X _n is lower than the wall potential of the address electrode lines A _R1 , ..., A _Bm and the Y electrode Higher than the wall potential of the lines Y ₁ , ..., Y _n . Accordingly, the addressing voltage required for the counter discharge between the selected address electrode lines and the Y electrode line in the addressing time included in the subsequent mixing driving time M may be lowered.

In the first addressing times t3 to t4 of the mixing driving time M4, an addressing step for the first display electrode-line pair group is performed. To this end, in a state where the voltage applied to all the X electrode lines X ₁ ,..., X _n is maintained at the second voltage V _S , the negative scanning potential V _SC is displayed as the first display. In addition to being sequentially applied to the Y electrode lines YG1 of the electrode-line pair group, display data signals are applied to the address electrode lines A _R1 ,..., A _Bm . Accordingly, a predetermined wall potential is generated in the selected discharge cells of the first display electrode-line pair group. More specifically, the positive wall potential is generated around the Y electrode of the selected discharge cells, and the negative wall potential is generated around the address electrode. While the scan voltage is not applied, the positive bias voltage V _{SC_H} is applied to all of the Y electrode lines Y ₁ ,..., Y _n .

In the display-hold time t4 to t7 of the mixing drive time M4, the display-hold step for the first display electrode-line pair group where addressing is completed is performed. To this end, an AC voltage is applied to the X electrode lines and the Y electrode lines of the first display electrode line pair group. More specifically, the selected discharge cells of the first display electrode-line pair group are first display-maintained at time t4, second at time t5, third at time t6, and fourth at time t7. Discharge occurs. Meanwhile, since the second voltage V _S is biased to the X electrode lines XG2 of the second electrode-line pair group and the discharge cells of the second XY electrode-line pair group are not addressed, the second The display electrode-line pair group does not perform display-hold discharge.

At the second addressing times t7 to t8 of the mixing driving time M4, an addressing step for the second display electrode-line pair group is performed. To this end, while the voltage applied to all the X electrode lines X ₁ ,..., X _n is maintained at the second voltage V _S , the scan voltage of the negative voltage V _SC is the second voltage. The display data signals are sequentially applied to the Y electrode lines YG2 of the display electrode-line pair group and simultaneously to the address electrode lines A _R1 ,..., A _Bm . Accordingly, a predetermined wall potential is generated in the selected discharge cells of the second display electrode-line pair group. More specifically, the positive wall potential is generated around the Y electrode of the selected discharge cells, and the negative wall potential is generated around the address electrode. While the scan voltage is not applied, the positive bias voltage V _{SC_H} is applied to all of the Y electrode lines Y ₁ ,..., Y _n .

The number of display-holding pulses proportional to the display-holding time changes so as to be inversely proportional to the average gradation of its frame in proportion to the gradation weighting value set in its sub-field SF4. Here, in the addressing times t3 to t4 and t7 to t8, the time when the negative scanning potential V _SC is applied to each Y electrode line, that is, the width of the scanning pulse is proportional to the average gray level of its frame. To change. Accordingly, the pause time of the frame due to the change of the display-hold time can be efficiently added to the addressing times t3 to t4 and t7 to t8, so that the addressing time can be long. Accordingly, the operation at the addressing times t3 to t4 and t7 to t8 can be further stabilized.

In the correction display-hold time AS4, an alternating voltage is applied to the second display electrode-line pair group in which the display-hold operation is not performed at the mixing drive time M1. Thus, the required display-hold time is filled for all the display electrode-line pair groups.

In the common display-hold time CS4 added according to the gray scale weight set in the fourth sub-field SF4, the display-hold operation is performed for all the display electrode-line pair groups. That is, an alternating voltage is applied to all XY electrode line pairs X ₁ Y ₁ to X _n Y _n .

As described above, according to the driving method of the discharge display panel according to the present invention, since the addressing time is changed to be proportional to the average gradation of its own frame, the pause time of the frame due to the change of the display-holding time is determined by the addressing time. It can be added efficiently, resulting in long addressing times. Thus, the operation at the addressing time can be further stabilized.

On the other hand, in each sub-field, the display of the first display electrode-line pair group rather than the addressing of the second display electrode-line pair group after the addressing of the first display electrode-line pair group is completed. -Sustain discharge is performed first. Accordingly, the waiting time for waiting for all other display electrode line pairs to be addressed after the discharge cells are addressed is shortened, so that the accuracy of the display-hold discharge in the display-hold time can be increased.

The present invention is not limited to the above embodiments, but may be modified and improved by those skilled in the art within the spirit and scope of the invention as defined in the claims.

Claims (17)

For the discharge display panel in which each discharge cell is set as the crossing region by forming display electrode line pairs side by side and address electrode lines spaced apart from and intersecting the display electrode line pairs, a plurality of sub-fields are formed. In the driving method including a unit frame to perform gradation display by time division driving, wherein each sub-field includes addressing and display-holding time, The display-hold time is changed in inverse proportion to the average gradation of its frame while being proportional to the gradation weight set in its sub-field, And the addressing time is changed so as to be proportional to the average gradation of its frame. The method of claim 1, wherein at the addressing time, And a wall potential set in the discharge cells selected from the discharge cells. The method of claim 2, Each of the display electrode line pairs includes X and Y electrode lines; At the addressing time, a scanning potential is sequentially applied to the Y electrode lines of the display electrode line pairs and a display data signal is applied to the address electrode lines at the same time. The method of claim 3, wherein at the addressing time, A method of driving a discharge display panel in which a data potential of a first polarity is applied to selected address electrode lines. The method of claim 4, wherein at the addressing time, A method of driving a discharge display panel, wherein an addressing voltage that is a difference between the data potential and the scan potential is applied to selected discharge cells. The method of claim 4, wherein at the addressing time, And a time period during which the scanning potential is applied to each of the Y electrode lines is proportional to an average gray level of the unit frame. The method of claim 6, wherein in the addressing time, And a time period at which the data potential of the first polarity is applied to selected address electrode lines is proportional to an average gray level of the unit frame. The method according to claim 4, wherein at the indication-hold time, And a pulse of the first polarity is alternately applied to the X and Y electrode lines. The method of claim 8, wherein in the indication-hold time, And a number of pulses alternately applied to the X and Y electrode lines in inverse proportion to an average gray level of the unit frame. The method of claim 1, wherein each of the sub-fields, And a resetting time at which the charge states of all the discharge cells become uniform before the addressing time. The method of claim 1, And driving the display electrode line pairs into groups of at least first and second display electrode-line pair groups so that at least one display electrode line pair is included in one display electrode-line pair group. The method of claim 11, Wherein each sub-field is An addressing time for the first display electrode-line pair group, A display-hold time for the first display electrode-line pair group, An addressing time for the second display electrode-line pair group, and Sequentially including display-hold time for the second display electrode-line pair groups; And a common display-holding time for the first and second display electrode-line pair groups selectively according to the gray scale weights of the respective sub-fields. The method of claim 12, wherein at an addressing time for the first display electrode-line pair group, And a wall potential set to discharge cells selected from among the discharge cells of the first display electrode-line pair group. The display device of claim 12, wherein at display-hold time for the first display electrode-line pair group, And a display-maintenance discharge occurs in selected discharge cells of the first display electrode-line pair group as an alternating voltage is applied to each of the display electrode line pairs of the first display electrode line pair group. The method of claim 12, wherein at an addressing time for the second display electrode-line pair group, And a wall potential set to discharge cells selected from among the discharge cells of the second display electrode-line pair group. The display device of claim 12, wherein at display-hold time for the second display electrode-line pair group, And a display-maintenance discharge occurs in selected discharge cells of the second display electrode-line pair group as an alternating voltage is applied to each of the display electrode line pairs of the second display electrode line-pair group. The method of claim 12, wherein at a common display-hold time for the first and second display electrode-line pair groups, As an alternating voltage is applied to each of the display electrode line pairs of the first and second display electrode-line pair groups, display-maintaining discharge occurs in selected discharge cells of the first and second display electrode-line pair groups. Method of driving a discharge display panel.

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