KR100795795B1 - Method of driving discharge display panel for improving performance of gray-scale display - Google Patents

Abstract

The method of driving a discharge display panel according to the present invention includes steps a to c. In step a, for each of the frames having an average gray level above the reference value, the number of sustain pulses in each of the sustain periods is set so as to be inversely proportional to the average gray level of each frame while being proportional to the gray weight weight assigned to each subfield. . In step b, the gain of the image data is set in inverse proportion to the average gradation of each frame. In step c, the set gain and sustain pulse numbers are used to drive the discharge display panel.

Description

Method of driving discharge display panel for improving performance of gray-scale display}

1 is a perspective view showing an internal structure of a plasma display panel of a three-electrode surface discharge method as a conventional discharge display panel.

FIG. 2 is a cross-sectional view illustrating a configuration of a unit cell of the panel of FIG. 1.

FIG. 3 is a timing diagram illustrating a conventional address-display separation driving method for Y electrode lines of the plasma display panel of FIG. 1.

4 is a graph illustrating an automatic power control method of a conventional plasma display apparatus.

5 is a block diagram showing a plasma display device as a discharge display device for performing the driving method according to the present invention.

6 is a block diagram illustrating an internal configuration of a logic controller in the plasma display device of FIG. 5.

FIG. 7 is a graph illustrating characteristics of the data N _S of the sustain pulse number and the data D _G of the gain output from the power control unit of FIG. 6.

FIG. 8 is a diagram illustrating frame data input to a subfield matrix unit of FIG. 6.

9 is a diagram illustrating frame data output from the subfield matrix unit of FIG. 6.

FIG. 10 is a block diagram illustrating an internal configuration of the matrix buffer unit of FIG. 6.

<Explanation of symbols for the main parts of the drawings>

1 ... plasma display panel, 10 ... front glass substrate,

11, 15 dielectric layer, 12 protective layer,

13 ... back glass substrate, 14 ... discharge space,

16 fluorescent layers, 17 bulkheads,

X ₁ To X _n ... X electrode line, Y ₁ To Y _n ... Y electrode line,

A _R1 To A _Bm ... address electrode line, X _na , Y _na ... transparent electrode line,

X _nb , Y _nb ... metal electrode line, SF1 SF8 ... sub-field,

52 logic controller, 53 address drive,

54 ... X drive, 55 ... Y drive,

56 image processing unit, 61 gamma correction unit,

611 first-in, first-out memory, 612 error diffusion,
613 multiplier, 621 subfield generator,

622 subfield matrix part, 623 matrix buffer part, 624 memory control part,

RFM1, RFM2, RFM3 ... red frame-memories,

GFM1, GFM2, GFM3 ... green frame-memory,

BFM1, BFM2, BFM3 ... blue frame-memory,

625, rearrangement, 626, synchronous adjustment,

63a ... average signal level detector, 63 ... power controller,

64a ... EEPROM, 64b ... I ² C serial communication interface,

64c..timing-signal generator, 64 ... XY controller,

65 ... clock buffer, 11R, 11G, 11B ... delay elements.

The present invention relates to a method of driving a discharge display panel, and more particularly, to a method of driving a discharge display panel in which a unit frame is time-divisionally driven by a plurality of subfields.

1 shows the structure of a three-electrode surface discharge type plasma display panel as a conventional discharge display panel. FIG. 2 shows an example of one cell of the panel of FIG. 1. 1 and 2, between the electrode substrates A _R1 to A _Bm and the dielectric layers 11 and 15 between the front and rear glass substrates 10 and 13 of the conventional surface discharge plasma display panel 1. ), Y electrode lines (Y ₁₎ To Y _n , X electrode lines (X ₁₎ To X _n ), the fluorescent layer 16, the partition 17, and the magnesium monoxide (MgO) layer 12 as a protective layer are provided.

Address electrode lines A _R1 To A _Bm ) are formed in a predetermined pattern on the front side of the rear glass substrate 13. Lower dielectric layer 15 has address electrode lines A _R1. To A _Bm ) in front of the entire surface. In front of the lower dielectric layer 15, barrier ribs 17 form address electrode lines A _R1. To A _Bm ). These partitions 17 function to partition the discharge area of each cell and to prevent optical cross talk between each cell. The fluorescent layer 16 is applied between the partition walls 17.

X electrode lines (X ₁ To X _n and the Y electrode lines Y _1. To Y _n ) are formed in a predetermined pattern on the rear side of the front glass substrate 10 to be orthogonal to the address electrode lines A _R1 to A _Bm . Each intersection sets a corresponding cell. Each X electrode line (X ₁ To X _n ) and each Y electrode line (Y ₁₎ To Y _n ) is a combination of a transparent electrode line (X _na , Y _na of FIG. 2) of a transparent conductive material such as indium tin oxide (ITO), and a metal electrode line (X _nb , Y _nb of FIG. 2) to increase conductivity. It is formed. The front dielectric layer 11 has X electrode lines X _1. To X _n and the Y electrode lines Y _1. To Y _n ), the entire surface is applied and formed. A protective layer 12 for protecting the panel 1 from a strong electric field, for example, a magnesium monoxide (MgO) layer, is formed by applying the entire surface to the back of the front dielectric layer 11. The plasma forming gas is sealed in the discharge space 14.

FIG. 3 shows a conventional address-display separation driving scheme for Y electrode lines of the plasma display panel of FIG. 1 (see US Pat. No. 5,541,618). Referring to FIG. 3, each of all unit frames has eight sub-fields SF1 to realize time division gray scale display. To SF8). In addition, each sub-field SF1 To SF8 are reset periods R1. To R8), the addressing period A1 To A8), and the maintenance period S1 To S8).

The discharge conditions of all the display cells are each reset period R1. To R8), and at the same time are adapted to the addressing to be performed in the next step.

Each addressing cycle (A1 From A8 to A8, the address electrode lines (A _{R1 in} FIG. 1). To A _Bm ) and at the same time a display data signal is applied to each Y electrode line (Y _1). To Y _n ) are sequentially applied. Accordingly, when a high level display data signal is applied while the scan pulse is applied, wall charges for the sustain period are formed by the addressing discharge in the corresponding discharge cell, and wall charges for the sustain period are not formed in the discharge cell. Do not.

Each maintenance cycle (S1 To S8, all Y electrode lines Y _1. To Y _n ) and all X electrode lines (X ₁₎ To X _n ), the sustain pulse is alternately applied, so that the corresponding addressing period A1 To A8) cause display discharge in the discharge cells in which wall charges for the sustain period are formed. Therefore, the sustain period S1 occupies the luminance of the gradation display of one discharge cell in the unit frame. To the length of S8). Hold period in the unit frame (S1 To S8) is 255T (T is a unit period). Therefore, it can be displayed in 256 gray levels, including the case where it is not displayed once in a unit frame.

Here, a period 1T corresponding to 2 ⁰ is maintained in the sustain period S1 of the first sub-field SF1 and a period corresponding to 2 ¹ is maintained in the sustain period S2 of the second sub-field SF2. (2T) is the third sub-cycle (4T) corresponding to include ²² holding period (S3) of the field (SF3), the fourth sub-held field (SF4) cycle (S4) is equivalent to ²³ periods (8T) is, in the fifth sub-cycle (16T) corresponding to include ²⁴ holding period (S5) of the field (SF5), the sixth sub-has ²⁵ holding period (S6) of the fields (SF6) Corresponding to the period 32T, the period 64T corresponding to 2 ⁶ in the sustain period S7 of the seventh sub-field SF7, and the sustain period S8 of the eighth sub-field SF8. The periods 128T corresponding to 2 ⁷ are set respectively.

Accordingly, if the sub-field to be displayed is properly selected among the eight sub-fields, display of 256 gray levels can be performed including all zero (zero) gray levels that are not displayed in any of the sub-fields.

4 shows an automatic power control method of a conventional plasma display device. In Fig. 4, reference numeral G _A denotes an average gradation of each frame. Reference numeral N _S denotes data N _{S of the} number of sustain pulses in each frame. Reference numeral P _S denotes the drive power in the sustain period of each frame. Reference sign L _NS indicates a characteristic graph of the number of sustain pulses with respect to the average gray level of each frame. Reference numeral L _PS indicates a characteristic graph of the driving power in the sustain period of each frame.

3 and 4, for each of the frames having an average grayscale G _A less than the reference value G _A 2, each subfield SF1 To periods S1 so as to be independent of the average gray level G _A of each frame while being proportional to the gray scale weight value assigned to SF8). To S8) the respective sustain pulse numbers are set.

Further, for each of the frames having an average grayscale G _A equal to or greater than the reference value G _A 2, the sustain periods S1 of each frame Each subfield SF1 in order to make the driving power P _S at S8 to constant as the upper limit value P _S 2. To periods S1 so as to be inversely proportional to the average gray level G _A of each frame while being proportional to the gray scale weight value assigned to SF8). To S8) the respective sustain pulse numbers are set.

According to the driving method of the conventional discharge display panel as described above, when the average gray level G _A of one frame is high, for example, the average gray level G _A of one frame belongs to the region A of FIG. 4. In this case, as the number of sustain pulses of the frame decreases, the number of sustain pulses allocated to at least one subfield of the low gray scale weight value, for example, the first sub-field SF1, must be zero.

Accordingly, since the low gray scale range that can be displayed in the bright image is narrowed due to the necessity of automatic power control, there is a problem in that the low gray scale region is not displayed clearly in the bright image.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method in which a low gray scale region can be clearly displayed even in a bright image as the automatic power control is effectively performed in the method of driving a discharge display panel.

According to the present invention for achieving the above object, a unit frame is time-division driven by a plurality of subfields, and each of the subfields includes reset, addressing, and sustain periods, and the number of sustain pulses in each of the sustain periods is increased. A method for driving a discharge display panel to be set, comprising steps a to c.

In the step a, for each of the frames having an average gray level equal to or greater than a reference value, the number of sustain pulses in each of the sustain periods is set to be inversely proportional to the average gray level of each frame while being proportional to the gray scale weight assigned to each subfield. do. In step b, the gain of the image data is set to be inversely proportional to the average gradation of each frame. In step c, the set gain and sustain pulse numbers are used to drive the discharge display panel.

According to the method of driving the discharge display panel of the present invention, automatic power control in the sustain period is performed not only by the number of sustain pulses but also by the gain of the image data. Accordingly, since the number of sustain pulses of this frame can be set relatively high even if the average gray level of any one frame is high, sustain pulses can be assigned to all subfields of the low gray scale weight value in this frame.

As the automatic power control is effectively performed, the low gray scale range that can be displayed even in a bright image may not be narrowed. That is, the low gradation region may be clearly displayed even in a bright image.

Hereinafter, preferred embodiments according to the present invention will be described in detail. Here, the description of FIGS. 1 to 3 is equally applicable to the present invention.

FIG. 5 shows a plasma display device as a discharge display device which performs the driving method according to the present invention. The plasma display panel 1 as a discharge display panel 1, an image processor 56, a logic controller 52, an address driver 53, and X are shown in FIG. And a driving unit 54 and a Y driving unit 55. The configuration of the plasma display panel 1 as the discharge display panel is as described with reference to FIG. 1. The image processing unit 56 converts an external analog image signal into a digital signal to convert an internal image signal, for example, 8-bit red (R), green (G), and blue (B) image data, a clock signal, vertical and horizontal, respectively. Generate sync signals. The logic controller 52 generates driving control signals S _A , S _Y , and S _X according to an internal image signal from the image processor 56.

The address driver 53 processes the address signals S _A among the drive control signals S _A , S _Y , and S _X from the logic controller 52 to generate display data signals, and generates the generated display data. Signals to address electrode lines (A _R1 of FIG. To A _Bm ). X driver 54 to the driving control signal from the logic controller (52) (S _A, S _{Y, X} S) from the X drive control signals (S _X) of the X electrode lines in accordance with the (X of Fig. 1 ₁ To X _n ). The Y driver 55 includes Y electrode lines (Y ₁ of FIG. 1) according to the Y driving control signals S _Y among the driving control signals S _A , S _Y , and S _X from the logic controller 52. To Y _n ).

Referring to FIG. 6, the logic controller 52 of the driving apparatus of FIG. 5 includes a clock buffer 65, a synchronization controller 626, a gamma correction unit 61, an error diffusion unit 612, and first-in first-in. First-Out Memory 611, Multiplier 613, Subfield Generator 621, Subfield Matrix 622, Matrix Buffer 623, Memory Control 624, Frame-Memorys RFM1 BFM3), rearrangement unit 625, average signal level detection unit 63a, power control unit 63, E.P.ROM (EEPROM, 64a), I ² C serial communication interface 64b, timing-signal Generator 64c, and XY control unit 64;

The clock buffer 65 converts the 26-megahertz (MHz) clock signal CLK26 from the image processor (56 in FIG. 5) into a 40-megahertz (MHz) clock signal CLK40 and outputs the converted signal. The synchronization adjustment unit 626 includes a clock signal CLK40 of 40 megahertz (MHz) from the clock buffer 65, an initialization signal RS from the outside, and a horizontal synchronization signal from the image processing unit (56 in FIG. 5). (H _SYNC ) and the vertical sync signal V _SYNC are input. The synchronization adjusting unit 626 outputs the horizontal synchronization signals H _SYNC1 , H _SYNC2 , and H _SYNC3 to which the input horizontal synchronization signal H _SYNC is delayed by a predetermined number of clocks, respectively. V _SYNC ) outputs vertical synchronization signals V _SYNC2 and V _SYNC3 delayed by a predetermined number of clocks, respectively.

The image data R, G, and B input to the gamma correction unit 61 have a reverse nonlinear input / output characteristic in order to correct the nonlinear input / output characteristics of the cathode ray tube. Therefore, the gamma correction unit 61 processes the image data R, G, and B of the reverse nonlinear input and output characteristics to have a linear input and output characteristic. The error diffusion unit 612 uses the first-in, first-out memory 611 to move the position of the maximum sign bit, which is the boundary bit of the 12-bit format image data R, G, and B, and the image of the 8-bit format. Generate data (R, G, B).

The multiplier 613 multiplies the image data R, G, and B from the error diffusion unit 612 by the data D _G of the gain from the power control unit 63, thereby generating the image data R, G, and B. Lower or increase the luminance level in B). Related contents will be described in more detail together with the power control unit 63.

The subfield generator 621 converts 8-bit image data R, G, and B into 8-bit image data R, G, and B, respectively. For example, when grayscale driving is performed with 14 subfields in a unit frame, after converting 8-bit image data R, G, and B into 14-bit image data R, G and B, respectively, In order to reduce a data transmission error, 16 bits of image data R, G, and B are output by adding invalid data '0' of a maximum value bit (MSB) and a minimum value bit (Least Significant Bit).

The subfield matrix unit 622 rearranges 16-bit video data R, G, and B into which data of different subfields is simultaneously input, so that data of the same subfield is simultaneously output. The matrix buffer unit 623 processes 16-bit image data (R, G, B) from the subfield matrix unit 622 and outputs it as 32-bit image data (R, G, B).

The memory control unit 624 may include a red memory control unit for controlling three red frame R memories (RFM1, RFM2, and RFM3), and three green (G) frame memory memories (GFM1, GFM2, A green memory control unit for controlling GFM3) and a blue memory control unit for controlling the three blue frame B memories (BFM1, BFM2, BFM3). Frame data from the memory controller 624 is continuously output in units of frames and input to the rearrangement unit 625. In FIG. 6, reference numeral EN denotes an enable signal generated from the XY controller 64 and input to the memory controller 624 to control the data output of the memory controller 624. In addition, the reference numeral S _SYNC is generated from the XY control unit 64 to control data input / output in units of 32-bit slots in the memory control unit 624 and the rearrangement unit 625, and thus the memory control unit 624 and the rearrangement unit. The slot synchronization signal input to 625 is indicated. The rearrangement unit 625 rearranges and outputs 32-bit image data R, G, and B from the memory control unit 624 so as to match the input format of the address driver 53 (FIG. 5).

Meanwhile, the average gray scale detector 63a detects the average gray scale ASL in units of frames from the 8-bit image data R, G, and B from the error diffusion unit 612 and inputs the average gray scale ASL to the power controller 63. . The power control unit 63 sets the number of sustain pulses in each of the sustain periods so as to be inversely proportional to the average gray level ASL of each frame while being proportional to the gray scale weight value assigned to each subfield. The power control unit 63 also sets the gain of the video data so as to be inversely proportional to the average gray level ASL of each frame. Related contents will be described in detail with reference to FIG. 7.

E. P. ROM (EEPROM) 64a has X electrode lines (X _{1 in} FIG. 1). To X _n ) and the Y electrode lines (Y ₁ of FIG. 1). To Y _n ), the timing control data according to the drive sequence are stored.

The discharge count data N _S from the power control unit 63 and the timing control data from the E.P.ROM 64A are transferred through the I ² C serial communication interface 64b to the timing-signal generator 64c. ) Is entered. The timing-signal generator 64c operates according to the input discharge count data N _S and the timing control data to generate the timing-signal. The XY control unit 64 operates in accordance with the timing-signal from the timing-signal generator 64c to output the X drive control signal S _X and the Y drive control signal S _Y.

FIG. 7 illustrates characteristics of the data N _S of the sustain pulse number and the data D _G of the gain output from the power control unit of FIG. 6. In Fig. 7, reference numeral G _A denotes an average gray scale of each frame. Reference numeral N _S denotes data N _{S of the} number of sustain pulses in each frame. Reference numeral D _G denotes data D _G of gain with respect to image data of each frame. Reference numeral P _S denotes the drive power in the sustain period of each frame. Reference sign L _NS indicates a characteristic graph of the number of sustain pulses with respect to the average gray level of each frame. Reference numeral L _DG indicates a characteristic graph of gain with respect to the image data of each frame. Reference numeral L _PS indicates a characteristic graph of the driving power in the sustain period of each frame.

3 and 7, for each of the frames having an average gray level G _A less than the reference value G _A 2, each subfield SF1 To periods S1 so as to be independent of the average gray level G _A of each frame while being proportional to the gray scale weight value assigned to SF8). To S8) the respective sustain pulse numbers are set. In addition, for each of the frames having an average gray level G _A less than the reference value G _A 2, the gain of the image data of each frame is independent of the average gray level G _{A of} each frame. Is set.

Meanwhile, for each of the frames having an average gray level G _A equal to or greater than the reference value G _A 2, the sustain periods S1 of each frame Each subfield SF1 in order to make the driving power P _S at S8 to constant as the upper limit value P _S 2. To periods S1 so as to be inversely proportional to the average gray level G _A of each frame while being proportional to the gray scale weight value assigned to SF8). To S8) the respective sustain pulse numbers are set. In addition, for each of the frames having an average gray level G _A equal to or greater than the reference value G _A 2, a gain of the image data of each frame is inversely proportional to the average gray level G _{A of} each frame. Is set.

Therefore, not only the sustain pulse number N _S but also the sustain periods S1 not only by the gain (D _G ) of the image data. To S8), automatic power control is performed. Accordingly, since the number of sustain pulses N _{S of} this frame can be set relatively high even if the average gray level G _A of one frame is high, the sustain pulses are applied to all subfields of the low gray weight weight value in this frame. Can be assigned.

As the automatic power control is effectively performed, the low gray scale range that can be displayed even in a bright image may not be narrowed. That is, the low gradation region may be clearly displayed even in a bright image.

FIG. 8 illustrates frame data input to the subfield matrix unit 722 by the logic controller 52 of FIG. 6. Referring to FIG. 8, each of 16-bit image data R, G, and B input to the subfield matrix unit 722 has a structure in which data of different subfields is simultaneously input.

FIG. 9 is a diagram illustrating frame data output from the subfield matrix unit 722 in the logic controller 52 of FIG. 6. Referring to FIG. 9, each of 16-bit image data R, G, and B output from the subfield matrix unit 722 has a structure in which data of the same subfield is simultaneously input.

FIG. 10 illustrates an internal configuration of the matrix buffer unit 723 in the logic controller 52 of FIG. 6. Referring to FIG. 10, the matrix buffer unit 723 includes a red delay element 11R, a green delay element 11G, and a blue delay element 11B. The red delay element 11R delays the 16-bit red image data R input from the subfield matrix unit 722 of FIG. 7 by the input period of the 16 clock pulses to the positions of the first to 16th bits. Output Meanwhile, the 16-bit red image data R input from the subfield matrix unit 722 is directly output to the positions of the 17th through 32nd bits. Accordingly, the 16-bit red image data R from the subfield matrix unit 722 is output as the 32-bit red image data R. FIG. The same applies to the green and blue image data G and B. Here, the same reset signal RS, clock signal CLK40, second vertical synchronization signal V _SYNC2 and second horizontal synchronization signal H _SYNC2 are input to each of the delay elements 11R, 11G, and 11B. do.

As described above, according to the driving method of the discharge display panel according to the present invention, automatic power control in the sustain period is performed not only by the number of sustain pulses but also by the gain of the image data. Accordingly, since the number of sustain pulses of this frame can be set relatively high even if the average gray level of any one frame is high, sustain pulses can be assigned to all subfields of the low gray scale weight value in this frame.

As the automatic power control is effectively performed, the low gray scale range that can be displayed even in a bright image may not be narrowed. That is, the low gradation region may be clearly displayed even in a bright image.

The present invention is not limited to the above embodiments, but may be modified and improved by those skilled in the art within the spirit and scope of the invention as defined in the claims.

Claims (7)

A unit frame is time-divisionally driven by a plurality of subfields, each subfield includes resetting, addressing, and sustain periods, and the number of sustain pulses is set in each of the sustain periods. In (a) for each of the frames having an average gradation above the reference value, setting the number of sustain pulses in each of the sustain periods in proportion to the gradation weight assigned to each subfield and inversely proportional to the average gradation of each frame ; (b) setting gain of the image data to be inversely proportional to the average gradation of each frame; And and (c) driving the discharge display panel using the set gain and sustain pulse numbers. delete The method of claim 1, wherein in step (b), And a gain of image data is set in inverse proportion to an average gray level for each of the frames having an average gray level equal to or greater than the reference value. The method of claim 3, wherein in step (a), For each of the frames having an average gradation less than the reference value, the discharge indication in which the number of sustain pulses in each of the sustain periods is set in proportion to the gradation weighting value assigned to each subfield and independent of the average gradation of each frame. How to drive the panel. The method of claim 4, wherein in step (b), And a gain of image data is set for each of the frames having an average gray level less than the reference value, irrespective of the average gray level. The method of claim 5, wherein in step (b), And a gain of the image data is set constant for each of the frames having an average gray scale less than the reference value. The method of claim 1, wherein in step (c), And the gain is multiplied by the image data, and the resulting image data is used.

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