KR100581878B1 - Driving method and apparatus of plasma display panel - Google Patents

Abstract

The present invention relates to a method and apparatus for driving a plasma display panel which can prevent damage caused by temperature difference for each region of a panel by controlling luminance of a displayed image. The method of driving a plasma display panel according to the present invention is directed to a plasma display panel in which discharge cells are formed in an area where address electrode lines cross with respect to sustain electrode line pairs in which X electrode lines and Y electrode lines are alternately arranged side by side. There are a plurality of sub-fields for time division gray scale display for each frame as a display period, and a reset period, an address period, and a sustain discharge period exist for each sub-field. A method of driving a plasma display panel in which a sub-field to be turned on in a frame is determined to display gray scales, the method comprising: (a) dividing a discharge cell into a predetermined number of blocks and calculating a block luminance difference between the blocks; ; (b) controlling the power consumption according to the block luminance difference to correct the luminance.

Description

Plasma display panel driving method and apparatus therefor {Driving method and apparatus of plasma display panel}

1 is a perspective view showing an internal structure of a conventional three-electrode surface discharge plasma display panel.

FIG. 2 is a cross-sectional view illustrating a configuration of a unit display cell of the panel of FIG. 1.

3 is a block diagram illustrating a conventional driving device of the plasma display panel of FIG. 1.

4 is a timing diagram illustrating a conventional driving method of the plasma display panel of FIG. 1.

FIG. 5 is a timing diagram illustrating driving signals applied to electrode lines of the plasma display panel of FIG. 1 in a unit sub-field of FIG. 4.

6 is a flowchart schematically illustrating a method of driving a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 7 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for implementing the method of driving the plasma display panel of FIG. 6.

FIG. 8 is a block diagram schematically illustrating another embodiment of a driving apparatus of a plasma display panel for implementing the method of driving the plasma display panel of FIG. 6.

9 is a diagram schematically illustrating an example of dividing a panel into a plurality of blocks for a method of driving a plasma display panel of the present invention.

10 and 11 are graphs schematically showing automatic power control by a method of driving a plasma display panel of the present invention.

<Explanation of symbols for the main parts of the drawings>

32: logic controller, 33: address driver,

34: X drive unit, 35: Y drive unit,

40: luminance adjusting unit, 41: luminance calculating unit,

42: luminance correction unit, 43: luminance calculation unit for each block,

44: luminance difference calculation unit between blocks, 45: luminance difference comparison unit,

46: power consumption control unit.

The present invention relates to a method and apparatus for driving a plasma display panel. More particularly, the present invention relates to a method and apparatus for driving a plasma display panel which can prevent damage caused by a temperature difference for each region of a panel by controlling luminance of a displayed image.

1 is a perspective view showing an internal structure of a conventional three-electrode surface discharge plasma display panel. FIG. 2 is a cross-sectional view illustrating a configuration of a unit display cell of the panel of FIG. 1.

Referring to the drawings, between the front and rear glass substrates 10 and 13 of the conventional surface discharge plasma display panel 1, the address electrode lines A _R1 , A _G1 , ..., A _Gm , A _Bm ), Dielectric layers 11 and 15, Y electrode lines (Y ₁ , ..., Y _n ), X electrode lines (X ₁ , ..., X _n ), fluorescent layer 16, partition wall 17 ) And a magnesium monoxide (MgO) layer 12 as a protective layer.

The address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm are formed in a predetermined pattern on the front side of the rear glass substrate 13. The lower dielectric layer 15 is entirely applied in front of the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm . In front of the lower dielectric layer 15, barrier ribs 17 are formed in a direction parallel to the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm . These partitions 17 function to partition the discharge area of each discharge cell and to prevent optical cross talk between each discharge cell. The fluorescent layer 16 is formed between the partition walls 17.

The X electrode lines (X ₁ , ..., X _n ) and the Y electrode lines (Y ₁ , ..., Y _n ) are the address electrode lines (A _R1 , A _G1 , ..., A _Gm , A _Bm ) is formed in a predetermined pattern on the back of the front glass substrate 10 to be orthogonal to each other. Each intersection sets a corresponding discharge cell. Each X electrode line (X ₁ , ..., X _n ) and each Y electrode line (Y ₁ , ..., Y _n ) have a conductivity and a transparent electrode line made of a transparent conductive material such as indium tin oxide (ITO). The metal electrode lines for raising are formed in combination. The front dielectric layer 11 is formed by applying the entire surface to the rear of the X electrode lines X ₁ ,..., X _n and the Y electrode lines Y ₁ ..., Y _n . A protective layer 12 for protecting the panel 1 from a strong electric field, for example, a magnesium monoxide (MgO) layer, is formed by applying the entire surface to the back of the front dielectric layer 11. The plasma forming gas is sealed in the discharge space 14.

As a driving method of the plasma display panel 1 having the structure described above, an address-display separation driving method which is mainly used is disclosed in US Pat.

3 is a block diagram illustrating a conventional driving device of the plasma display panel of FIG. 1.

A typical driving device 2 of the plasma display panel 1 includes an image processor 26, a logic controller 22, an address driver 23, an X driver 24, and a Y driver 25. The image processing unit 26 converts an external analog image signal into a digital signal, for example, an internal image signal, for example, 8-bit red (R), green (G), and blue (B) image data, a clock signal, vertical and horizontal, respectively. Generate sync signals. The logic controller 22 generates driving control signals S _A , S _Y , and S _X according to an internal image signal from the image processor 26.

In this case, the driving unit such as the address driver 23, the X driver 24, and the Y driver 25 receives input from the driving control signals S _A , S _Y , and S _X , and generates respective driving signals. The applied driving signal to each of the electrode lines.

That is, the address driver 23 processes the address signal S _A among the drive control signals S _A , S _Y , and S _X from the logic controller 22 to generate a display data signal, and generates the displayed display. The data signal is applied to the address electrode lines. The X driver 24 processes the X driving control signal S _X among the driving control signals S _A , S _Y , and S _X from the logic controller 22 and applies the X driving control signal S _X to the X electrode lines. The Y driver 25 processes the Y driving control signal S _Y among the driving control signals S _A , S _Y , and S _X from the logic controller 22 and applies the Y driving control signal S _Y to the Y electrode lines.

4 is a timing diagram illustrating a conventional driving method of the plasma display panel of FIG. 1.

Referring to the drawing, a unit frame is divided into eight subfields SF1, ..., SF8 to realize time division gray scale display. Each of the subfields SF1, ..., SF8 includes reset periods R1, ..., R8, address periods A1, ..., A8, and sustain discharge periods S1, ..., SF8. , S8).

The luminance of the plasma display panel is proportional to the length of the sustain discharge cycles S1, ..., S8 occupied in the unit frame. The lengths of the sustain discharge cycles S1, ..., S8 occupy a unit frame are 255T (T is the unit time). At this time, a time corresponding to 2n is set in the sustain discharge period Sn of the nth subfield SFn. Accordingly, when the subfield to be displayed among the eight subfields is appropriately selected, it can be seen that display of 256 gray levels can be performed including all zero (zero) gray levels that are not displayed in any of the subfields.

FIG. 5 is a timing diagram illustrating driving signals applied to electrode lines of the plasma display panel of FIG. 1 in a unit sub-field of FIG. 4.

In FIG. 5, reference numeral S _{AR1 ..ABm} denotes a driving signal applied to each address electrode line (A _R1 , A _G1 ,..., A _Gm , A _{Bm in} FIG. 1), and S _{X1 .. Xn} denotes an X electrode. Drive signal applied to the lines (X ₁ , ..., X _n of FIG. 1), and S _{Y1 ..Yn} is applied to each Y electrode line (Y ₁ , ..., Y _n of FIG. 1). Indicates a driving signal.

Referring to the drawing, in the reset period PR of the unit sub-field SF, first, the voltage applied to the X electrode lines X ₁ ,..., X _n is set from the ground voltage V _G to the second. for the voltage (V _S) for example, then continue to rise to 155 volts (V). Here, the ground voltage V _G is applied to the Y electrode lines Y ₁ ,..., Y _n and the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm .

Next, the voltage applied to the Y electrode lines Y ₁ ,..., Y _n is third from the second voltage V _S , for example, from 155 volts V to a second voltage than the second voltage V _S. The highest voltage V _SET + V _{S that} is as high as the voltage V _SET is continuously raised to, for example, 355 volts (V). Here, the ground voltage V _G is applied to the X electrode lines X ₁ ,..., X _n and the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm .

Next, while the voltage applied to the X electrode lines X ₁ , ..., X _n is maintained at the second voltage V _S , the Y electrode lines Y ₁ , ..., Y _n The voltage applied to) is continuously lowered from the second voltage V _S to the ground voltage V _G. Here, the ground voltage V _G is applied to the address electrode lines A _R1 , A _G1 ,..., A _Gm , and A _Bm .

Accordingly, in the address period (PA), leading address is applied to a display data signal to the electrode lines, the the second voltage (V _S) lower fourth voltage (V _SCAN) to bias the Y-electrode line than the (Y ₁ As a scan signal of the ground voltage V _G is sequentially applied to the ..., Y _n ), smooth addressing may be performed. The display data signal applied to each of the address electrode lines A _R1 , A _G1 , ..., A _Gm , A _Bm has a positive address voltage V _A when the discharge cell is selected, and a ground voltage when the discharge cell is not. (V _G ) is applied. Accordingly, when the display data signal of the positive address voltage V _A is applied while the scan pulse of the ground voltage V _G is applied, wall charges are formed by the address discharge in the corresponding discharge cell. Wall charges do not form. Here, for more accurate and efficient address discharge, the second voltage V _S is applied to the X electrode lines X ₁ ,..., X _n .

In the sustain discharge period PS that follows, the second voltage V _S is applied to all of the Y electrode lines Y ₁ , ..., Y _n and the X electrode lines X ₁ , ..., X _n . The display sustain pulse is alternately applied, causing a discharge for display retention in the discharge cells in which wall charges are formed in the corresponding address period PA.

According to the driving method as described above, a high luminance region and a low luminance region may exist in the same panel according to the displayed image. In this case, there is a difference between the discharge times of the discharge cells in the high luminance region and the discharge cells in the low luminance region, and a temperature difference for each region of the panel may occur due to the difference in heat generation amount. If the temperature difference is greater than a predetermined temperature, the thermal stress on the surface of the glass panel increases, and in the worst case, the panel may be damaged.

An object of the present invention is to provide a plasma display panel driving method capable of preventing damage caused by a temperature difference for each region of a panel by controlling luminance of a displayed image.

In the method of driving a plasma display panel according to the present invention for achieving the above object, a discharge cell in a region in which address electrode lines cross with respect to sustain electrode line pairs in which X electrode lines and Y electrode lines are alternately arranged side by side. For the plasma display panel in which the projections are formed, there are a plurality of sub-fields for time division gray scale display for each frame as the display period, and there is a reset period, an address period, and a sustain discharge period for each sub-field. A method of driving a plasma display panel in which a sub-field to be turned on in each frame is determined according to the luminance of an image to be displayed, the method comprising: (a) dividing a discharge cell into a predetermined number of blocks, and Calculating a block luminance difference; (b) controlling the power consumption to be inversely proportional to the block luminance difference to correct the luminance.

The step (a) includes (a1) calculating a block luminance by obtaining luminance in each block, and (a2) calculating a block luminance difference by calculating a difference in block luminance between blocks.

In the step (a1), the luminance is calculated in units of discharge cells, and the average luminance of discharge cells belonging to each block is calculated to calculate block luminance.

In the step (a2), a block luminance difference is calculated by obtaining a difference in block luminance among adjacent blocks among the blocks.

In the step (b), (b1) comparing the block luminance difference with a preset reference luminance difference, and (b2) adjusting the power consumption according to the comparison result in the step (b1) to correct the luminance. Equipped.

In the step (b1), it is preferable that the reference luminance difference is a luminance difference at which the panel starts to break due to thermal stress caused by the luminance difference between blocks.

In the step (b2), it is preferable to control the power consumption by adjusting the number of sustain pulses in the frame alternately applied to the X electrode lines and the Y electrode lines in the sustain discharge cycle.

In the step (b2), the automatic power control is performed according to the automatic power control level in which the number of sustain pulses in the frame is inversely proportional to the load ratio, which is the ratio of the number of discharge cells to be displayed with respect to all the discharge cells, and the block luminance. If the difference is larger than the reference luminance difference, the automatic power control level is lowered. If the block luminance difference is smaller than the reference luminance difference, it is preferable to maintain the current automatic power control level.

In another aspect of the present invention, a driving device of a plasma display panel includes a plasma display in which discharge cells are formed in regions where address electrode lines cross with respect to sustain electrode line pairs in which X electrode lines and Y electrode lines are alternately arranged side by side. For the panel, there are a plurality of sub-fields for time division gradation display per frame as the display period, and there is a reset period, an address period, and a sustain discharge period for each sub-field. A driving apparatus of a plasma display panel for driving a plasma display panel by a method of driving a plasma display panel which determines a sub-field to be turned on in each frame and displays gray scales, the apparatus comprising: a luminance calculator; A luminance correction unit is provided.

The luminance calculator divides the discharge cells into a predetermined number of blocks and calculates a block luminance difference between the blocks. The luminance corrector corrects the luminance by controlling power consumption in inverse proportion to the block luminance difference.

The luminance calculator includes a block-by-block luminance calculator that calculates block luminance by obtaining luminance in each block, and an inter-block luminance difference calculator that calculates a block luminance difference by obtaining a difference in block luminance between blocks.

The brightness compensator includes a brightness difference comparator for comparing the block brightness difference with a preset reference brightness difference, and a power consumption controller for controlling brightness by controlling power consumption according to a comparison result in the brightness difference comparator.

According to the present invention, the luminance of the displayed image can be controlled to prevent breakage due to the temperature difference for each region of the panel.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

6 is a flowchart schematically illustrating a method of driving a plasma display panel according to an exemplary embodiment of the present invention. 9 is a diagram schematically illustrating an example of dividing a panel into a plurality of blocks for a method of driving a plasma display panel of the present invention.

Referring to the drawings, the method 100 for driving a plasma display panel includes X electrode lines (X ₁ ,..., X _n in FIG. 1) and Y electrode lines (Y ₁ , ..., FIG. Y _n ) plasma in which discharge cells are formed in a region where address electrode lines (A _R1 , A _G1 , ..., A _Gm and A _Bm of FIG. 1) cross over a pair of sustain electrode lines alternately arranged side by side. For the display panel 1, there are a plurality of sub-fields SF for time division gray scale display for each frame as the display period, and a reset period PR and an address period PA for each sub-field SF. And a sustain discharge period (PS), wherein a sub-field to be turned on in each frame is determined according to the brightness of the displayed image to display the gray scale. Divide cells into a certain number of blocks, and between blocks Calculating a luminance difference locking (S101, S102) and; (b) controlling the power consumption according to the block luminance difference to correct the luminance (S103, S104, S105).

Step (a) (S101, S102) is a step of dividing the discharge cells into a predetermined number of blocks and calculating a block luminance difference between the blocks, and calculating block luminance (a1) and block luminance. (A2) step 102 of calculating. To this end, first, the entire panel 1 is divided into a predetermined number of blocks, an embodiment of which is illustrated in FIG. 9. In the case of the embodiment shown in Fig. 9, the blocks are divided into m × n pieces, respectively, horizontally and vertically.

In the step (a1), in step S101, luminance is calculated in each block to calculate block luminance. Further, in step (a2) (S102), a block luminance difference is calculated by obtaining a difference in block luminance between blocks.

In this case, in order to calculate the block luminance in each block in step (a1), first, the luminance is calculated in units of discharge cells, and the average luminance of discharge cells belonging to each block is obtained to obtain block luminance. Can be calculated. In this case, various methods may be applied to the method of calculating the block luminance in addition to the method described in this embodiment.

In addition, the block luminance difference in step (a2) may be calculated from the block luminance of each block obtained in step (a1), and may be obtained from the block luminance difference between each block and the block. In particular, in order to prevent breakage of the glass panel due to a temperature difference between adjacent blocks of the present invention, it is preferable to calculate a block luminance difference by obtaining a difference in block luminance among adjacent blocks among the blocks in the panel. In this case, a plurality of block luminance differences are generated in proportion to the number of blocks to be divided, and the block luminance differences may be processed as applied in the step S103 of comparing the block luminance differences with the reference luminance difference. . That is, the block luminance difference compared to the reference luminance difference is calculated by various methods such as obtaining an average of the block luminance differences, obtaining the largest value among the block luminance differences, or obtaining the smallest value among the block luminance differences. Can be.

Step (b) (S103, S104, S105) is a step of correcting the brightness by controlling the power consumption according to the block brightness difference, comparing the block brightness difference (b1) (S103) and controlling the power consumption ( b2) Steps S104 and S105 are provided.

In step (b1), the block luminance difference is compared with a preset reference luminance difference. In the step (b2) (S104, S105), the brightness is corrected by controlling the power consumption according to the comparison result in the step (b1) (S103).

In the step (b1), the block luminance difference is compared with a preset reference luminance difference, and the block luminance difference compared with the reference luminance difference is selected by a specific method from among the block luminance differences calculated in the step (a2). It may be a value, and the plurality of block luminance differences may be compared with the reference luminance differences, respectively. At this time, it is preferable that the reference luminance difference is obtained by obtaining the luminance difference at which the panel starts to be damaged due to thermal stress due to the luminance difference between the blocks, and using the luminance difference at that time as the reference luminance difference.
The reference luminance difference can be obtained through experiments under various conditions and methods. In the case of obtaining the reference luminance difference experimentally as described above, it may be actually determined differently according to the experiment and various environments. In this case, the reference luminance difference obtained in each experiment may have a certain degree of margin with respect to the luminance difference that begins to be damaged by the thermal stress according to the actual luminance difference.
In consideration of this point, the reference luminance difference is obtained through experiments under various conditions, and the smallest value among the reference luminance differences may be the reference luminance difference in the present invention. Or, it may be an average value of the reference luminance differences under each condition calculated to have a certain degree of margin.
However, the method of obtaining the reference luminance difference is not limited thereto, and in addition, the method may be obtained by various methods apparent to those skilled in the art.
In addition, in consideration of the fact that the plasma display panel may be used in various regions and may be manufactured differently for each panel to be used in the region, different experimental conditions may be used for each region.

In the step (b2) (S104, S105), the brightness is corrected by controlling the power consumption according to the comparison result in the step (b1) (S103). That is, in the frame alternately applied to the X electrode lines (X ₁ , ..., X _n of FIG. 1) and the Y electrode lines (Y ₁ , ..., Y _n of FIG. 1) in the sustain discharge period. It is desirable to control the power consumption by adjusting the number of sustain pulses in the circuit.

In particular, according to the present invention, according to the level of Automatic Power Control (APC) in which the number of sustain pulses in a frame is inversely proportional to the load ratio which is the ratio of the number of discharge cells to be displayed to the total discharge cells. Automatic power control is performed. If the block luminance difference is greater than the reference luminance difference, the automatic power control level (APC level) is lowered (S104). If the block luminance difference is smaller than the reference luminance difference, the current automatic power control level (APC level) is maintained. (S105) may be used.

FIG. 7 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for implementing the method of driving the plasma display panel of FIG. 6.

Referring to the drawings, the driving device 3 of the plasma display panel includes X electrode lines (X ₁ ,..., X _n in FIG. 1) and Y electrode lines (Y ₁ ,. Y _n ) plasma in which discharge cells are formed in a region where address electrode lines (A _R1 , A _G1 , ..., A _Gm and A _Bm of FIG. 1) cross over a pair of sustain electrode lines alternately arranged side by side. For the display panel 1, there are a plurality of sub-fields SF for time division gray scale display for each frame as the display period, and a reset period PR and an address period PA for each sub-field SF. , And sustain discharge periods (PS), the sub-fields to be turned on in each frame are determined according to the brightness of the displayed image to drive the plasma display panel by a method of driving the plasma display panel to display the gray scale. Plasma display paddle In the drive system, and the luminance calculation section 41; The brightness correction part 42 is provided.

The luminance calculator 41 divides the discharge cells into a predetermined number of blocks and calculates a block luminance difference between the blocks. The brightness correction unit 42 corrects the brightness by controlling the power consumption according to the block brightness difference.

The luminance calculator 41 calculates a block luminance by obtaining luminance in each block, and the inter-block luminance that calculates a block luminance difference by calculating a difference in block luminance between blocks. The difference calculating part 44 is provided.

The block-by-block luminance calculator 43 calculates luminance in units of discharge cells, calculates average luminance of the discharge cells belonging to each block, and calculates block luminance. The inter-block luminance difference calculator 44 calculates a block luminance difference by obtaining a difference in block luminance between adjacent blocks among the blocks.

The luminance correction unit 42 controls the luminance difference comparator 45 for comparing the block luminance difference with a preset reference luminance difference, and controls the power consumption according to the comparison result in the luminance difference comparison unit to correct the luminance. A power control section 46 is provided.

The power consumption controller 46 controls the power consumption by adjusting the number of sustain pulses in the frame that are alternately applied to the X electrode lines and the Y electrode lines in the sustain discharge period.

The power consumption controller 46 performs automatic power control according to an automatic power control level in which the number of sustain pulses in the frame is inversely proportional to the load ratio, which is the ratio of the number of discharge cells to be displayed to the total discharge cells. If the block luminance difference is greater than the reference luminance difference, the automatic power control level is lowered. If the block luminance difference is smaller than the reference luminance difference, the current automatic power control level is maintained.

The driving apparatus of the plasma display panel according to the present embodiment is to implement the driving method of the plasma display panel shown in FIG. 6, and performs the same function as described in the description of FIG. 6. Detailed description will be omitted.

The driving device 3 of the plasma display panel includes an image processor 36, a logic controller 32, an address driver 33, an X driver 34, and a Y driver 35, except as specifically mentioned. The same function as the driving apparatus of the conventional plasma display panel shown in FIG. 3 is referred to, and detailed description thereof will be omitted.

In this case, the luminance calculating unit 41 and the luminance correcting unit 42 form the luminance adjusting unit 40 according to the present invention, and the luminance adjusting unit 40 receives luminance information from the logic controller 32. The power consumption control information is input again to the logic controller 32. In this case, the luminance adjusting unit 40 may be included in the logic control unit 32, and some functions of the luminance adjusting unit 40 may be performed in the ordinary logic control unit.

FIG. 8 is a block diagram schematically illustrating another embodiment of a driving apparatus of a plasma display panel for implementing the method of driving the plasma display panel of FIG. 6.

Referring to the drawings, the present embodiment is configured such that the luminance adjusting unit 40 in FIG. 7 is included in the logic control unit 32 in FIG. 7 of the driving apparatus of the plasma display panel of FIG. At this time, the luminance calculator 51 calculates a block luminance difference from the information received from the error diffusion unit 512, outputs the block luminance difference to the power controller 43, and the power controller 43 performs the luminance correction unit (42 in FIG. 7). By controlling the power consumption.

The logic controller according to the present invention includes a clock buffer 55, a synchronization controller 526, a gamma correction unit 51, an error diffusion unit 512, a first-in first-out memory 511, and a subfield. Generator 521, subfield matrix 522, matrix buffer 523, memory controller 524, frame-memory (RFM1, ..., BFM3), rearrangement 525, average signal level The detector 53a, the power controller 53, the EEPROM 54a, the I2C serial communication interface 54b, the timing signal generator 54c, and the XY controller 54 are included.

The clock buffer 55 converts the 26-megahertz (MHz) clock signal CLK26 from the image processor (36 in FIG. 8) into a 40-megahertz (MHz) clock signal CLK40 and outputs the converted signal. The synchronization adjustment unit 526 includes a 40-megahertz (MHz) clock signal CLK40 from the clock buffer 55, an initialization signal RS from the outside, and a horizontal synchronization signal from the image processing unit (36 in FIG. 8). (HSYNC) and the vertical sync signal VSYNC are input. The synchronization adjusting unit 526 outputs the horizontal synchronization signals HSYNC1, HSYNC2, and HSYNC3 in which the input horizontal synchronization signal HSYNC is delayed by a predetermined number of clocks, respectively, while the input vertical synchronization signal VSYNC is predetermined. The vertical synchronization signals VSYNC2 and VSYNC3 are respectively delayed by the number of clocks.

The image data R, G, and B input to the gamma correction unit 51 has a reverse nonlinear input / output characteristic in order to correct the nonlinear input / output characteristics of the cathode ray tube. Therefore, the gamma correction unit 51 processes the image data R, G, and B of the reverse nonlinear input and output characteristics to have the linear input and output characteristics. The error diffusion unit 512 reduces the data transmission error by using the first-in first-out memory 511 to move the position of the maximum sign bit that is the boundary bit of the image data R, G, and B.

The subfield generator 521 converts 8-bit image data R, G, and B into 8-bit image data R, G, and B, respectively, corresponding to the number of subfields. For example, when grayscale driving is performed with 14 subfields in a unit frame, after converting 8-bit image data R, G, and B into 14-bit image data R, G and B, respectively, In order to reduce a data transmission error, 16 bits of image data R, G, and B are output by adding invalid data '0' of a maximum value bit (MSB) and a minimum value bit (Least Significant Bit).

The subfield matrix unit 522 rearranges 16-bit video data R, G, and B into which data of different subfields is simultaneously input, so that data of the same subfield is simultaneously output. The matrix buffer unit 523 processes the 16-bit image data R, G, and B from the subfield matrix unit 522 and outputs the 32-bit image data (R, G, B).

The memory control unit 524 may include a red memory control unit for controlling three red frame R memories (RFM1, RFM2, and RFM3), and three green (G) frame memory memories (GFM1, GFM2, A green memory control unit for controlling GFM3) and a blue memory control unit for controlling the three blue frame B memories (BFM1, BFM2, BFM3). Frame data from the memory controller 524 is continuously output in units of frames and input to the rearrangement unit 525. In the drawing, reference numeral EN denotes an enable signal generated from the XY controller 54 and input to the memory controller 524 to control the data output of the memory controller 524. In addition, the reference numeral SSYNC is generated from the XY control unit 54 to control data input / output in units of 32-bit slots in the memory control unit 524 and the rearrangement unit 525, so that the memory control unit 524 and the rearrangement unit ( The slot synchronization signal input to 525 is indicated. The rearrangement unit 525 rearranges and outputs 32-bit image data R, G, and B from the memory control unit 524 in accordance with the input format of the address driver 33 (Fig. 8).

On the other hand, the average signal level detector 53a detects the average signal-level ASL in units of frames from the 8-bit image data R, G, and B from the error diffusion unit 512, respectively, and performs the power control unit 53. To enter. The power control unit 53 generates the discharge frequency control data APC corresponding to the average signal-level ASL input from the average signal level detection unit 53a, thereby making the power consumption constant in each frame constant. Perform the function of control. Here, the load rate means the average load rate of the load rates of each subfield of the frame. The load ratio of each subfield means a ratio of the number of cells to be displayed to the number of all cells of the plasma display panel 1. In the present embodiment, the power control unit 53 performs the automatic power control function when the load rate of the frame exceeds 30%. In the YEPROM 54a, timing control data according to the driving sequence of the X electrode lines (X1, ..., Xn in FIG. 1) and the Y electrode lines (Y1, ..., Yn in FIG. Is stored. The discharge recovery control data APC from the power control unit 53 and the timing control data from EPIROM 54a are input to the timing-signal generator 54c via the I2C serial communication interface 54b. The timing-signal generator 54c operates according to the input discharge count control data APC and the timing control data to generate the timing-signal. The XY control unit 54 operates in accordance with the timing-signal from the timing-signal generator 54c to output the X drive control signal SX and the Y drive control signal SY.

10 and 11 are graphs schematically showing automatic power control by a method of driving a plasma display panel of the present invention.

Referring to the drawings, the principle of automatic power control operation in the power control section 53 of FIG. 8 is based on the drive-characteristic graph as shown. The curve A is a discharge recovery control data (APC) curve before the still image signal is reflected according to the present invention, and the curve B is a discharge recovery control data (APC) curve by the driving method of the plasma display panel according to the present invention.

A process of generating the drive-characteristic graph using the A curve as an example is as follows. First, the characteristics of the load factor and power are determined while varying the number of display-discharge times Ns in a unit frame. Next, the load ratios L4, L3, L2, and L1 forming the reference electric power amount are obtained for each display-discharge number Ns. The lowest display-discharge count is set at a load rate of 100 percent (%). By this principle, power control is performed as follows based on the load ratios L4, L3, L2, and L1.

From 0 to L4, the highest indication-discharge count (N4) applies. In the range where the load factor is higher than L4 and below L3, the second highest indication-discharge number N3 is applied. The third highest indication-discharge count (N2) applies where the load factor is above L3 and below L2. If the load factor is higher than L2, the lowest indication-discharge number N1 is applied. Here, the load rate L1 indicates a load rate of 100 percent (%) in which all discharge cells perform display discharge.

When the intersection points P1, P2, P3, and P4 of the number of sustain pulses corresponding to the load ratio are connected to each other, a driving characteristic curve can be obtained. The display-discharge number Ns and the load ratio can be appropriately selected within a range not departing from such driving characteristics.

At this time, when the current automatic power control level is due to the A curve, if the block luminance difference is greater than the reference luminance difference, the automatic power control level (APC level) is lowered to follow the B curve, and if the block luminance difference is smaller than the reference luminance difference, Maintain the level according to the A curve, the current automatic power control level (APC level).

Therefore, when the block luminance difference is larger than the reference luminance difference, the power consumption can be controlled from the A level to the B level by the method shown in FIG. 11 as shown in FIG.

According to the plasma display panel driving method according to the present invention, it is possible to control the luminance of the displayed image to prevent damage caused by the temperature difference for each region of the panel.                     

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, it is merely an example, and those skilled in the art may realize various modifications and equivalent other embodiments therefrom. I can understand. Accordingly, the true scope of protection of the invention should be defined only by the appended claims.

Claims (16)

For plasma display panels in which discharge cells are formed in regions where address electrode lines cross with respect to sustain electrode line pairs in which X electrode lines and Y electrode lines are alternately arranged side by side, a plurality of time division gray scale displays for each frame as a display period Sub-fields are present, and each of the sub-fields has a reset period, an address period, and a sustain discharge period, and the sub-fields to be turned on in each frame are determined according to the brightness of the displayed image. In the driving method of the plasma display panel to display the gray scale, dividing the discharge cells into a predetermined number of blocks and calculating a block luminance difference between the blocks; (b) controlling the power consumption so as to be inversely proportional to the block luminance difference to correct the luminance. The method of claim 1, In step (a), (a1) calculating block luminance by obtaining luminance in each block; and (a2) calculating a block luminance difference by obtaining a difference in block luminance between the blocks. The method of claim 2, In the step (a1), Calculating luminance in units of the respective discharge cells, calculating average luminance of the discharge cells belonging to the respective blocks, and calculating block luminance. The method of claim 2, In the step (a2), And calculating a block luminance difference by obtaining a difference in block luminance among adjacent blocks among the blocks. The method of claim 1, In step (b), (b1) comparing the block luminance difference with a preset reference luminance difference; and (b2) correcting the luminance by controlling the power consumption in inverse proportion to the block luminance difference according to the comparison result in the (b1) step. The method of claim 5, In the step (b1), And the reference luminance difference is a luminance difference at which the panel starts to be damaged by thermal stress caused by the luminance difference between the blocks. The method of claim 5, In the step (b2), And controlling the power consumption by controlling the number of sustain pulses in the frame which are alternately applied to the X electrode lines and the Y electrode lines in the sustain discharge period. The method of claim 7, wherein In the step (b2), Perform automatic power control according to an automatic power control level in which the number of sustain pulses in the frame is inversely proportional to the load ratio, which is the ratio of the number of discharge cells to be displayed to the total discharge cells, And lowering the automatic power control level if the block luminance difference is greater than a reference luminance difference, and maintaining the current automatic power control level if the block luminance difference is smaller than the reference luminance difference. For plasma display panels in which discharge cells are formed in regions where address electrode lines cross with respect to sustain electrode line pairs in which X electrode lines and Y electrode lines are alternately arranged side by side, a plurality of time division gray scale displays for each frame as a display period Sub-fields are present, and each of the sub-fields has a reset period, an address period, and a sustain discharge period, and the sub-fields to be turned on in each frame are determined according to the brightness of the displayed image. In the driving device of the plasma display panel for driving the plasma display panel by the method of driving the plasma display panel to display the gray scale, A luminance calculator for dividing the discharge cells into a predetermined number of blocks and calculating a block luminance difference between the blocks; And a luminance correcting unit configured to correct the luminance by controlling power consumption in inverse proportion to the block luminance difference. The method of claim 9, The luminance calculator, A block-by-block luminance calculator for calculating a block luminance by obtaining luminance in each block; and a block-to-block luminance difference calculator for calculating a block luminance difference by calculating a difference in block luminance between the blocks. Device. The method of claim 10, The luminance calculation unit for each block, And calculating block luminance in units of the respective discharge cells and calculating average luminance of the discharge cells belonging to the respective blocks. The method of claim 10, The luminance difference calculation unit between blocks, And a block luminance difference is calculated by calculating a difference in block luminance between adjacent blocks among the blocks. The method of claim 9, The brightness correction unit, A luminance difference comparator for comparing the block luminance difference with a preset reference luminance difference, and power consumption for controlling the power consumption so as to be inversely proportional to the block luminance difference according to a comparison result in the luminance difference comparator. An apparatus for driving a plasma display panel having a control unit. The method of claim 13, And the reference luminance difference is a luminance difference at which the panel starts to be damaged by thermal stress caused by the luminance difference between the blocks. The method of claim 13, The power consumption control unit, And controlling the power consumption by controlling the number of sustain pulses in the frame that are alternately applied to the X electrode lines and the Y electrode lines in the sustain discharge period. The method of claim 15, The power consumption control unit, Performing automatic power control in accordance with an automatic power control level inversely proportional to the load ratio, which is the ratio of the number of sustain cells to all discharge cells to the total discharge cells, wherein the block luminance difference is greater than the reference luminance difference. If greater, the automatic power control level is lowered, and if the block luminance difference is less than a reference luminance difference, the driving apparatus of the plasma display panel maintains the current automatic power control level.

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