KR100509608B1 - Method for driving discharge display panel by address-display mixing - Google Patents

Abstract

In the method of driving a discharge display panel according to the present invention, each sub-field includes a reset time for the first and second display electrode-line pair groups, an addressing time for the first display electrode-line pair group, Sequentially comprising a display-hold time for one display electrode-line pair group, an addressing time for a second display electrode-line pair group, and a display-hold time for the first and second display electrode-line pair groups do. Also, for a group of display electrode-line pairs in which the number of selected display cells at each addressing time is less than the set number, no alternating voltage is provided at each display-hold time following each addressing time.

Description

Method for driving discharge display panel by address-display mixing

The present invention relates to a method of driving a discharge display panel, and more particularly, to a discharge display panel in which display electrode line pairs are formed side by side and address electrode lines are formed to be spaced apart from and cross the display electrode line pairs. The present invention relates to a driving method of a discharge display panel including a plurality of sub-fields in a unit frame to perform gradation display by time division driving.

1 shows a structure of a conventional discharge display panel, for example, a plasma display panel of a three-electrode surface discharge method. FIG. 2 shows an example of one display cell of the panel of FIG. 1. 1 and 2, between the front and rear glass substrates 10 and 13 of the conventional surface discharge plasma display panel 1, the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm ), dielectric layers 11 and 15, Y electrode lines (Y ₁ , ..., Y _n ), X electrode lines (X ₁ , ..., X _n ), fluorescent layer 16, The partition 17 and the magnesium monoxide (MgO) layer 12 as a protective layer are provided.

The address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm are formed in a predetermined pattern on the front side of the rear glass substrate 13. The lower dielectric layer 15 is entirely applied in front of the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm . In front of the lower dielectric layer 15, barrier ribs 17 are formed in a direction parallel to the address electrode lines A _R1 , A _G1 ,..., A _Gm , A _Bm . These partitions 17 function to partition the discharge area of each display cell and prevent optical cross talk between each display cell. The fluorescent layer 16 is formed between the partition walls 17.

The X electrode lines X ₁ ,..., X _n and the Y electrode lines Y ₁ , ..., Y _n constituting the display electrode line pairs are the address electrode lines A _R1 , A _G1,. .., A _Gm , A _Bm ) is formed in a constant pattern on the back of the front glass substrate 10 to be orthogonal. Each intersection sets a corresponding display cell. Each X electrode line (X ₁ , ..., X _n ) and each Y electrode line (Y ₁ , ..., Y _n ) is a transparent electrode line of a transparent conductive material such as indium tin oxide (ITO) or the like (FIG. 2). X _na , Y _na ) and a metal electrode line (X _nb , Y _nb of FIG. 2) for increasing conductivity are formed. The front dielectric layer 11 is formed by applying the entire surface to the rear of the X electrode lines X ₁ ,..., X _n and the Y electrode lines Y ₁ ..., Y _n . A protective layer 12 for protecting the panel 1 from a strong electric field, for example, a magnesium monoxide (MgO) layer, is formed by applying the entire surface to the back of the front dielectric layer 11. The plasma forming gas is sealed in the discharge space 14.

In the driving method basically applied to such a plasma display panel, reset, address, and display-sustain steps are sequentially performed in the unit subfield. In the reset phase, the charge states of all display cells are uniform. In the addressing step, a predetermined wall voltage is generated in the selected display cells. In the display-holding step, a predetermined alternating voltage is applied to all the XY electrode line pairs so that the display cells in which the wall voltage is formed in the addressing step cause display-holding discharges. In this display-holding step, a plasma is formed in the discharge space 14, i.e., the gas layer, of the selected display cells causing the display-holding discharge, and the fluorescent layer (16 in FIG. 1) is excited by the ultraviolet radiation to emit light. Is generated.

Referring to FIG. 3, a typical driving device of the plasma display panel 1 of FIG. 1 includes an image processor 66, a controller 62, an address driver 63, an X driver 64, and a Y driver 65. Include. The image processing unit 66 converts an external analog image signal into a digital signal to convert an internal image signal, for example, 8 bits of red (R), green (G), and blue (B) image data, a clock signal, vertical and horizontal, respectively. Generate sync signals. The controller 62 generates driving control signals S _A , S _Y , and S _X according to an internal image signal from the image processor 66. The address driver 63 processes the address signal S _A among the driving control signals S _A , S _Y , and S _X from the controller 62 to generate a display data signal, and generates the generated display data signal. Applied to the address electrode lines. The X driving unit 64 processes the X driving control signal S _X among the driving control signals S _A , S _Y , and S _X from the control unit 62, and applies the X driving control signal S _X to the X electrode lines. The Y driver 65 processes the Y driving control signal S _Y among the driving control signals S _A , S _Y , and S _X from the controller 62 and applies the Y driving control signal S _Y to the Y electrode lines.

As a typical driving method performed by the driving apparatus of the plasma display panel 1 as described above, an address-display separation driving method may be cited (see US Patent No. 5,541,618). In this address-display separation driving method, the addressing time and the display-sustain time are separated from each other in each sub-field included in the unit frame. Therefore, at the addressing time, each XY electrode line pair must wait until all other XY electrode line pairs are addressed after their addressing is performed. As such, the wall charge state of each display cell is disturbed due to the presence of the waiting time after the addressing is performed, and thus the accuracy of the display-holding discharge is deteriorated at the display-holding time which starts at the end of the addressing time.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of driving a discharge display panel, which reduces the waiting time waiting for all other XY electrode line pairs to be addressed after the discharge cells are addressed, thereby increasing the accuracy of the display-maintained discharge. A driving method of a discharge display panel is provided.

Still another object of the present invention is to provide a method of driving a discharge display panel which can effectively reduce reactive power included in driving power.

In order to achieve the above object, the present invention relates to a discharge display panel in which display electrode line pairs are formed in parallel and address electrode lines are spaced apart from and intersect with the display electrode line pairs. Performing grayscale display by time division driving, and grouping the display electrode line pairs into at least first and second display electrode-line pair groups such that at least one display electrode line pair is included in one display electrode-line pair group. To drive the discharge display panel. Wherein each of the sub-fields has a reset time for the first and second display electrode-line pair groups, an addressing time for the first display electrode-line pair group, and the first display electrode-line pair And a display-hold time for the group, an addressing time for the second display electrode-line pair group, and a display-hold time for the first and second display electrode-line pair groups. In addition, for a display electrode-line pair group in which the number of display cells selected at each addressing time is less than a set number, no alternating voltage is provided at each display-hold time subsequent to each addressing time.

According to the driving method of the discharge display panel of the present invention, in each of the sub-fields, the addressing of the second display electrode-line pair group is completed after the addressing of the first display electrode-line pair group is completed. More display-maintenance discharge is first performed for the first display electrode-line pair group. Accordingly, the waiting time for waiting for all other display electrode line pairs to be addressed after the discharge cells are addressed is shortened, so that the accuracy of the display-hold discharge in the display-hold time can be increased.

In addition, since no AC voltage is provided at each display-hold time for the display electrode-line pair group in which the number of selected display cells is smaller than the set number, the reactive power included in the driving power of the discharge display panel is effectively reduced. Can be.

Hereinafter, preferred embodiments according to the present invention will be described in detail.

4 illustrates a method of driving address-display mixing according to an embodiment of the present invention. In FIG. 4, reference numerals SF1 to SF5 denote sub-fields allocated in the unit frame, Y ₁ to Y _{n denote} Y electrode lines that are the reference for driving objects, R1 to R5 _denote reset times, and M1 to M5 _denote The mixed drive times in which the display-hold time exists between each addressing time, CS1 through CS5 indicate common display-hold times, and AS1 through AS5 indicate correction display-hold times, respectively.

1 and 4, each of the sub-fields SF1 to SF5 includes a reset time R1 to R5, a mixed driving time M1 to M5, a common display-hold time CS1 to CS5, and a correction display. -Hold times AS1 to AS5.

At reset times R1 to R5, the charge states of all display cells are uniform. At the addressing time included in the mixing drive time M1 to M5, a predetermined wall voltage is generated in the selected display cells. In the display-holding time included in the mixed driving time M1 to M5, display cells are selected in the addressing time and display-holding is performed by applying a predetermined alternating voltage to the addressed XY electrode line pairs. Cause discharge.

In the mixing drive times M1 to M5, the addressing and display-holding operations are performed alternately. For example, addressing is performed on the display cells of the first Y electrode line Y ₁ at the first unit time, and the first display electrode line pair as the first display electrode-line pair group, ie, XY, at the second unit time. An alternating voltage is applied to the electrode line pair X ₁ Y ₁ , addressing is performed on the display cells of the second Y electrode line Y ₂ at a third unit time, and the first and second displays at a fourth unit time. An alternating voltage is applied to the first and second XY electrode line pairs X ₁ Y ₁ , X ₂ Y ₂ as electrode-line pair groups, and the third Y electrode line Y ₃ at the fifth unit time. Addressing is performed on the display cells, and alternating voltage is applied to the first to third XY electrode line pairs X ₁ Y ₁ to X ₃ Y ₃ as the first to third display electrode-line pair groups at a sixth unit time. Is applied. Generalizing this process, the addressing operation is performed on each of the Y electrode lines Y ₁ to Y _{n for} every odd unit time of each of the mixing driving times M1 to M5, and the Y electrode on which the addressing operation is completed. A display-keeping operation is performed every even unit time for a line or lines.

Thus, the waiting time for waiting for all other XY electrode line pairs to be addressed after the discharge cells are addressed is shortened, so that the accuracy of the display-holding discharge can be increased.

On the other hand, for the sub-field where the required display-hold time cannot be filled for all XY electrode line pairs (X ₁ Y ₁ to X _n Y _n ) with only the display-hold time in the mixing drive time M1 to M5, Common display-hold times CS1 to CS5 and correction display-hold times AS1 to AS5 are required. In the common display-hold time CS1 to CS5 set according to the required display-hold time of each sub-field, an alternating voltage is applied to all XY electrode line pairs X ₁ Y ₁ to X _n Y _n .

In the correction display-hold time AS1 to AS5, during the time set differently for each of the XY electrode line pairs X ₁ Y ₁ to X _n Y _n that did not satisfy the required display-hold time of each sub-field. By applying an alternating voltage, the required display-hold time is filled for all Y electrode lines Y ₁ to Y _n .

Of course, for a sub-field to which a shorter required display-hold time is applied (no sub-field in FIG. 4, SF1 and SF2 in FIG. 5), common display-hold time (CS1 to CS5). ) Is not added and only the correction display-hold times AS1 to AS5 can be added.

On the other hand, for each XY electrode line pair in which the number of display cells selected at each addressing time interspersed with the mixing drive time M1 to M5 is less than the set number, for example, 5, the AC voltage at all subsequent display-holding times. This is not provided. Accordingly, the reactive power included in the driving power can be effectively reduced. For reference, when the set number is only one, it does not affect the reproducibility of the displayed image. Of course, if the set number is more than one, the set number of display cells do not discharge. However, since a plurality of sub-fields constitute a unit frame according to time division gray scale, if the number of settings is not excessive, there is little effect on the reproducibility of the displayed image.

FIG. 5 shows a method of driving address-display mixing according to another embodiment of the present invention. In FIG. 5, the same reference numerals as used in FIG. 4 indicate objects of the same function. In FIG. 5, reference numerals Y _G1 to Y _G8 indicate display electrode-line pair groups to which Y electrode lines Y ₁ to Y _n belong. For example, when the Y electrode lines Y ₁ to Y _n are 480, the first to 60th Y electrode lines Y ₁ to Y _{60 are} connected to the first display electrode-line pair group Y _G1 . , No. 61 to No. 120 of the Y electrode lines (Y ₆₁ to Y ₁₂₀₎ is the second display electrode line pair group (Y _G2), the first 121 to the 180 of the Y electrode lines (Y ₁₂₁ to Y ₁₈₀₎ are the In the third display electrode-line pair group Y _G3 , the 181-240 th Y electrode lines Y _181- Y ₂₄₀ are in the fourth display electrode-line pair group Y _G4 , and the 241-300 Y The electrode lines Y ₂₄₁ to Y ₃₀₀ are in the fifth display electrode-line pair group Y _G5 , and the 301-360 th Y electrode lines Y _301- Y ₃₆₀ are in the sixth display electrode-line pair group At Y _G6 , the 361 th to 420 Y electrode lines Y ₃₆₁ to Y ₄₂₀ are on the seventh display electrode-line pair group Y _G7 , and the 421 th to 480 Y electrode lines Y _421. To Y ₄₈₀ ) is the eighth display Each belongs to an electrode-line pair group Y _G1 .

1 and 5, each of the first and second sub-fields SF1 and SF2 has a reset time R1 and R2, a mixed driving time M1 and M2, and a correction display-hold time AS1, AS2). On the other hand, each of the third to fifth sub-fields SF3 to SF5 has a reset time (R3 to R5), a mixed driving time (M3 to M5), a common display-hold time (CS3 to CS5), and a correction display- Holding time (AS3 to AS5). As described with reference to FIG. 4, since each of the first and second sub-fields SF1 and SF2 has a shorter required display-hold time as compared to each of the other sub-fields SF3 to SF5, The common display-hold time is not added, only the correction display-hold time AS1 and AS2 are added. The difference from the driving method of FIG. 4 is that each display electrode-line pair group includes only one display electrode line pair in the driving method of FIG. 4, whereas each display electrode-line pair group of the driving method of FIG. It includes only the display electrode line pair of.

The driving process of the fourth sub-field SF4 in the address-display mixed driving method of FIG. 5 will be described in detail with reference to FIG. 6 as follows. For reference, in the case of the fourth sub-field SF4 of FIG. 6, the required display-hold time for all the display electrode-line pair groups is a time when seven unit times are added to the common display-hold time CS4. .

At reset time R4, the charge states of all display cells are uniform.

In the mixing drive time M4, the addressing and display-holding operation is performed alternately. For example, at the first unit time T _A1 , the addressing step A _G1 for the first display electrode-line pair group Y _G1 is performed. In the second unit time T _I1 , the display-holding step S ₁₁ for the first display electrode-line pair group Y _G1 for which addressing is completed is performed. In the third unit time T _A2 , the addressing step A _G2 for the second display electrode-line pair group Y _G2 is performed. In the fourth unit time T _I2 , display-holding steps S ₁₂ and S ₂₁ for the addressing-completed first and second display electrode-line pair groups Y _G1 and Y _G2 are simultaneously performed. In the fifth unit time T _A3 , the addressing step A _G3 for the third display electrode-line pair group Y _G3 is performed. In the sixth unit time T _I2 , the display-holding steps S ₁₃ , S ₂₂ , and S ₃₁ for the first to third display electrode-line pair groups Y _G1 to Y _G3 that have been addressed are simultaneously performed. Proceed. Generalizing this process, in the mixed driving time M4, an addressing operation is performed on each of the display electrode-line pair groups Y _G1 to Y _G8 every odd unit time, and the addressing operation is completed. A display-keeping operation is performed every even unit time for the electrode-line pair group or groups.

Accordingly, the waiting time for waiting for the remaining display electrode-line pair groups to be addressed after each display electrode-line pair group is shortened, so that the accuracy of the display-holding discharge can be increased.

In the common display-hold time CS4 set according to the required display-hold time of the fourth sub-field SF4, the display-hold operation is performed on all the display electrode-line pair groups Y _G1 to Y _G8 . do. That is, an alternating voltage is applied to all XY electrode line pairs X ₁ Y ₁ to X _n Y _n .

In the correction display-hold time AS4, during the time set differently for each of the display electrode-line pair groups Y _G2 to Y _G8 that do not satisfy the required display-hold time of the fourth sub-field SF4. By applying an alternating voltage, the required display-hold time is filled for all display electrode-line pair groups Y _G1 to Y _G8 . More specifically, the display-hold steps for the second to eighth display electrode-line pair groups Y _G2 to Y _G8 are simultaneously performed in the first unit time T _AS1 of the correction display-hold time AS4. Proceed. In the second unit time T _AS2 , display-holding steps for the third to eighth display electrode-line pair groups Y _G3 to Y _G8 are simultaneously performed. In the third unit time, the display-holding steps for the fourth to eighth display electrode-line pair groups Y _G4 to Y _G8 are simultaneously performed. In the fourth unit time, the display-holding steps for the fifth to eighth display electrode-line pair groups Y _G5 to Y _G8 are simultaneously performed. In the fifth unit time, the display-holding steps for the sixth to eighth display electrode-line pair groups Y _G6 to Y _G8 are simultaneously performed. In the sixth unit time, the display-holding steps for the seventh and eighth display electrode-line pair groups Y _G7 and Y _G8 are simultaneously performed. Finally, in the seventh unit time, the display-holding step for the eighth display electrode-line pair group Y _G8 is performed.

On the other hand, for the XY electrode-line pair group in which the number of display cells selected at each addressing time interspersed with the mixing drive time M4 is less than the set number, for example, 10, the AC voltage at all subsequent display-holding times. This is not provided. Accordingly, the reactive power included in the driving power can be effectively reduced. For reference, when the set number is only one, it does not affect the reproducibility of the displayed image. Of course, if the set number is more than one, the set number of display cells do not discharge. However, since a plurality of sub-fields constitute a unit frame according to time division gray scale, if the number of settings is not excessive, there is little effect on the reproducibility of the displayed image.

FIG. 7 illustrates first voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped into only the first and second display electrode-line pair groups. FIG. An example is shown. In the example of FIG. 7, the number of cells selected from the addressing time of the first display electrode-line pair group included in the mixing driving time M is a set number, for example, 50 or more, and is included in the mixing driving time M. The cell selected in the addressing time of the second display electrode-line pair group is applied when the set number is 50 or more.

In FIG. 7, reference numeral S _{AR1 ..ABm} denotes display data signals applied to address electrode lines (A _R1 to A _Bm of FIG. 1) from an address driver (63 of FIG. 3), and S _XG1 denotes an X driver (FIG. 3). a 64) from the first display electrode-drive signal to be applied to the X electrode lines of the pair of line groups (Fig. _{1 X 1, ..., X n} / 2), s XG2 is from the X driver 64, the The driving signal applied to the X electrode lines (X _{(n / 2) +1} , ..., X _n of FIG. 1) of the display electrode-line pair group of _{2 is} S _YG1 is the Y driving unit (65 of FIG. Drive signal applied to the Y electrode lines (Y ₁ ,..., Y _{n / 2 in} FIG. 1) of the first display electrode-line pair group from S _YG2, from the Y driver 65 to the second display electrode. -The driving signal applied to the Y electrode lines of the line pair group (Y _{(n / 2) +1} , ..., Y _{n in} FIG. 1), R for reset time, M for mixed drive time, CS Has a common display-hold time, and AS Information display - indicates the retention time, respectively. Referring to FIGS. 1 and 7, the operation of any one sub-field of FIG. 4 or 5 will be described in more detail as follows.

First, an operation process of the reset time R will be described in detail.

At the first time of the reset time R, the voltage applied to the X electrode lines X ₁ ,..., X _n is continuously raised from the ground voltage V _G to the second voltage V _S. . Here, the ground voltage V _G as the third voltage is applied to all of the Y electrode lines Y ₁ ,..., Y _n and the address electrode lines A _R1 ..., A _Bm . Accordingly, between the X electrode lines (X ₁ , ..., X _n ) and the Y electrode lines (Y ₁ , ..., Y _n ), and the X electrode lines (X ₁ , ..., X) A weak discharge occurs between _n ) and the address electrode lines A ₁ , ..., A _m , and negative wall charges are formed around the X electrode lines X ₁ , ..., X _n . .

In the second time as a wall electric charge storage time of the reset time (R), Y electrode lines _{(Y 1, ..., Y n} ) a second voltage (V _S voltage is applied from the second voltage (V _S) to ) Is continuously raised to the first voltage V _SET + V _{S which} is higher than the sixth voltage V _SET . Here, the ground voltage V _G is applied to the X electrode lines X ₁ ,..., X _n and the address electrode lines A _R1 ..., A _Bm . Accordingly, a weak discharge occurs between the Y electrode lines (Y ₁ ,..., Y _n ) and the X electrode lines (X ₁ ,..., X _n ), while the Y electrode lines (Y ₁ , A weaker discharge occurs between ..., Y _n ) and the address electrode lines A _R1 , ..., A _Bm . Here, Y electrode lines _{(Y 1, ..., Y n} ) and the address electrode lines _{(A R1, ..., A Bm} ) than the discharge electrode line Y between the (Y _1, ..., Y _The reason why the discharge between _n ) and the X electrode lines (X ₁ , ..., X _n ) becomes stronger is that the negative wall charges around the X electrode lines (X ₁ , ..., X _n ) Because they were formed. Accordingly, many negative wall charges are formed around the Y electrode lines (Y ₁ , ..., Y _n ), and positive wall charges are formed around the X electrode lines (X ₁ , ..., X _n ). Are formed, and less positive wall charges are formed around the address electrode lines A _R1 , ..., A _Bm (see FIG. 11).

In the third time as the wall charge distribution time of the reset time R, Y in a state where the voltage applied to the X electrode lines X ₁ ,..., X _n is maintained at the second voltage V _S. The voltage applied to the electrode lines Y ₁ ,..., Y _n is continuously lowered from the second voltage V _S to the negative voltage V _SC . Here, the ground voltage V _G is applied to the address electrode lines A _R1 ,..., A _Bm . Accordingly, due to the weak discharge between the X electrode lines (X ₁ ,..., X _n ) and the Y electrode lines (Y ₁ , ..., Y _n ), the Y electrode lines (Y ₁ ,. Some of the negative wall charges around..., Y _n ) move around the X electrode lines X ₁ ,..., X _n (see FIG. 12).

Accordingly, the wall electric-potential of the X electrode lines X ₁ , ..., X _n is lower than the wall potential of the address electrode lines A _R1 , ..., A _Bm and the Y electrode Higher than the wall potential of the lines Y ₁ , ..., Y _n . Accordingly, the addressing voltage required for the counter discharge between the selected address electrode lines and the Y electrode line in the addressing time included in the subsequent mixing driving time M may be lowered.

In the first unit time of the mixing driving time M, the addressing step for the first display electrode-line pair group is performed. To this end, in the state where the voltage applied to all the X electrode lines X ₁ ,..., X _n is maintained at the second voltage V _S , the scan voltage of the negative voltage V _SC is the first. While simultaneously applied to the Y electrode lines YG1 of the display electrode-line pair group, display data signals are applied to the address electrode lines A _R1 ,..., A _Bm . Accordingly, a predetermined wall voltage is generated in selected display cells of the first display electrode-line pair group. More specifically, the positive wall potential is generated around the Y electrode of the selected display cells, and the negative wall potential is generated around the address electrode. While the scan voltage is not applied, the positive bias voltage V _{SC_H} is applied to all of the Y electrode lines Y ₁ ,..., Y _n .

In the second unit time of the mixing driving time M, the display-maintaining step for the addressing-first group of display electrode-line pairs is performed. To this end, an AC voltage is applied to the X electrode lines and the Y electrode lines of the first display electrode-line pair group. More specifically, the display-hold pulse is applied twice to all the Y electrode lines Y ₁ ,..., Y _n . In addition, the display-maintenance pulse is applied to the X electrode lines XG1 of the first electrode-line pair group once. Accordingly, a total of three display-hold discharges are performed in the first display electrode-line pair group. However, since the second voltage V _S is biased to the X electrode lines XG2 of the second electrode-line pair group, and the display cells of the second XY electrode-line pair group are not addressed, the second The display electrode-line pair group does not perform display-hold discharge.

At the third unit time of the mixing driving time M, the addressing step for the second display electrode-line pair group is performed. To this end, while the voltage applied to all the X electrode lines X ₁ ,..., X _n is maintained at the second voltage V _S , the scan voltage of the negative voltage V _SC is the second voltage. While simultaneously applied to the Y electrode lines YG2 of the display electrode-line pair group, display data signals are applied to the address electrode lines A _R1 ,..., A _Bm . Thus, a predetermined wall voltage is generated in the selected display cells of the second display electrode-line pair group. More specifically, the positive wall potential is generated around the Y electrode of the selected display cells, and the negative wall potential is generated around the address electrode. While the scan voltage is not applied, the positive bias voltage V _{SC_H} is applied to all of the Y electrode lines Y ₁ ,..., Y _n .

At the common display-hold time CS set according to the required display-hold time of each sub-field SF, the display-hold operation is performed for all the display electrode-line pair groups. That is, an alternating voltage is applied to all XY electrode line pairs X ₁ Y ₁ to X _n Y _n .

In the correction display-hold time AS, an alternating voltage is applied to the second display electrode-line pair group that does not meet the required display-hold time of each sub-field SF, thereby all the display electrode-line pair groups For the required display-hold time is filled.

FIG. 8 is a second diagram of voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped into only the first and second display electrode-line pair groups. FIG. An example is shown. In the example of FIG. 8, the number of cells selected from the addressing time of the first display electrode-line pair group included in the mixing driving time M is less than the set number, for example, 50 and included in the mixing driving time M. FIG. The cell selected in the addressing time of the second display electrode-line pair group is applied when the set number is 50 or more.

In FIG. 8, the same reference numerals as used in FIG. 7 indicate objects of the same function. The difference from the example of FIG. 8 to the example of FIG. 8 is that all X electrode lines XG1 of the first display electrode-line pair group are mixed drive time M, common display-hold time CS, and correction display. from the retention time (aS) is constantly biased to the second voltage (V _S). This is because the number of cells selected from the addressing time of the first display electrode-line pair group included in the mixing driving time M is less than a predetermined number, for example, 50. Accordingly, the reactive power included in the driving power can be effectively reduced.

9 is a third diagram of voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. An example is shown. In the example of FIG. 9, the number of cells selected from the addressing time of the first display electrode-line pair group included in the mixing driving time M is a set number, for example, 50 or more, and is included in the mixing driving time M. The selected cells in the addressing time of the second display electrode-line pair group are applied when the set number is less than 50, for example.

In FIG. 9, the same reference numerals as used in FIG. 7 indicate objects of the same function. The difference between the example of FIG. 9 and the example of FIG. 7 is that all X electrode lines XG1 of the second display electrode-line pair group have a mixed drive time M, a common display-hold time CS, and a correction display. from the retention time (aS) is constantly biased to the second voltage (V _S). This is because the number of cells selected in the addressing time of the second display electrode-line pair group included in the mixing driving time M is less than the set number, for example, 50. Accordingly, the reactive power included in the driving power can be effectively reduced.

FIG. 10 is a fourth diagram of voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. FIG. An example is shown. In the example of FIG. 10, the number of cells selected from the addressing time of the first display electrode-line pair group included in the mixing driving time M is less than the set number, for example, 50 and included in the mixing driving time M. FIG. The selected cells in the addressing time of the second display electrode-line pair group are applied when the set number is less than 50, for example.

In FIG. 10, the same reference numerals as used in FIG. 7 indicate objects of the same function. The difference between the example of FIG. 10 and the example of FIG. 7 is that all X electrode lines XG1 and XG2 of the first and second display electrode-line pair groups are mixed drive time M, common display-hold time CS. ) And the second voltage V _S at the corrected display-hold time AS. This is because the number of cells selected from the addressing time of the first display electrode-line pair group included in the mixed driving time M is less than 50, for example, the second display electrode included in the mixing driving time M. This is because the selected number of cells in the addressing time of the line pair group is less than 50, for example. Accordingly, the reactive power included in the driving power can be effectively reduced.

The present invention is not limited to the above embodiments, but may be modified and improved by those skilled in the art within the spirit and scope of the invention as defined in the claims.

As described above, according to the driving method of the discharge display panel according to the present invention, in each sub-field, the second display electrode-line pair group after completion of addressing to the first display electrode-line pair group is completed. Display-maintenance discharge for the first display electrode-line pair group is performed before addressing for. Accordingly, the waiting time for waiting for all other XY electrode line pairs to be addressed after the discharge cells are addressed is shortened, so that the accuracy of the display-hold discharge at the display-hold time starting at the end of the addressing time can be increased. .

In addition, since no AC voltage is provided at each display-hold time for the display electrode-line pair group in which the number of selected display cells is smaller than the set number, the reactive power included in the driving power of the discharge display panel can be effectively reduced. .

1 is a perspective view showing an internal structure of a conventional three-electrode surface discharge plasma display panel.

FIG. 2 is a cross-sectional view illustrating an example of one display cell of the panel of FIG. 1.

3 is a block diagram illustrating a conventional driving device of the plasma display panel of FIG. 1.

4 is a timing diagram illustrating a method for driving address-display mixing according to an embodiment of the present invention.

5 is a timing diagram illustrating an address-display mixed driving method according to another embodiment of the present invention.

FIG. 6 is a timing diagram illustrating in detail the fourth sub-field in the address-display mixed driving method of FIG. 5.

FIG. 7 illustrates first voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped into only the first and second display electrode-line pair groups. FIG. A timing diagram showing an example.

FIG. 8 is a second diagram of voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped into only the first and second display electrode-line pair groups. FIG. A timing diagram showing an example.

9 is a third diagram of voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. A timing diagram showing an example.

FIG. 10 is a fourth diagram of voltage waveforms of driving signals applied to respective electrode lines in any sub-field of FIG. 4 or 5 when the display electrode line pairs are grouped only into the first and second display electrode-line pair groups. FIG. A timing diagram showing an example.

FIG. 11 is a cross-sectional view illustrating a wall charge distribution of one display cell immediately after a gradual rising voltage is applied to the Y electrode lines in the reset time of FIGS. 7 to 10.

12 is a cross-sectional view illustrating a wall charge distribution of one display cell at the end of the reset time of FIGS. 7 to 10.

<Explanation of symbols for the main parts of the drawings>

1 ... plasma display panel, 10 ... front glass substrate,

11, 15 dielectric layer, 12 protective layer,

13 ... back glass substrate, 14 ... discharge space,

16 fluorescent layers, 17 bulkheads,

X ₁ , ..., X _n ... X electrode lines, Y ₁ , ..., Y _n ... Y electrode lines,

A _R1 , ..., A _Bm ... address electrode lines, X _na , Y _na ... transparent electrode lines,

X _nb , Y _nb ... metal electrode lines, SF1, ... SF5 ... sub-field,

S _Y1 , ..., S _Y123 ... Y electrode drive signals, 62 ... logical control,

S _X1 , ..., S _Xn ... X electrode drive signals, 63 .. address driver,

S _AR1 .. _ABm ... display data signals, 64 ... X driver,

65 ... Y drive unit, 66 ... image processing unit.

Claims (14)

For a discharge display panel in which display electrode line pairs are formed side by side and address electrode lines are formed to be spaced apart from and intersect with the display electrode line pairs, a plurality of sub-fields are included in a unit frame to display gray scales by time division driving. Performing driving by grouping the display electrode line pairs into at least first and second display electrode-line pair groups such that at least one display electrode line pair is included in one display electrode-line pair group. To Wherein each sub-field is A reset time for the first and second display electrode-line pair groups, An addressing time for the first display electrode-line pair group, A display-hold time for the first display electrode-line pair group, An addressing time for the second display electrode-line pair group, and Sequentially including display-hold time for the first and second display electrode-line pair groups, For a display electrode-line pair group in which the number of display cells selected at each addressing time is less than a set number, an AC voltage is not provided at the respective display-hold time subsequent to each addressing time. Driving method. The method of claim 1, If the number of display cells selected in the addressing time for the first display electrode-line group is less than a set number, the first display electrode-line pair group in the display-hold time for the first display electrode-line pair group. A method of driving a discharge display panel in which no alternating voltage is applied to all display cells of the display. The method of claim 1, If the number of display cells selected in the addressing time for the second display electrode-line group is less than a set number, the second display electrode in the display-hold time for the first and second display electrode-line pair groups A method of driving a discharge display panel in which no alternating voltage is applied to all display cells of a group of line pairs. The method of claim 1, wherein at each respective display-hold time: A discharge in which first periodic pulses are applied to all one electrode lines of the first and second display electrode-line pair groups, and all other electrode lines of the display electrode-line pair group to which the AC voltage is not provided are biased How to drive the display panel. The method of claim 4, wherein at each display-hold time, And a bias voltage having the same polarity as that of the first periodic pulses is applied to all other electrode lines of the display electrode-line pair group in which the AC voltage is not provided. The method of claim 1, wherein each of the sub-fields, The first periodic pulses are applied to one electrode lines of the first and second display electrode-line pair groups, and the display-maintenance discharge is not generated in the display electrode line pairs of the first display electrode-line pair group. The discharge display further comprising a correction display-hold time in which the other electrode lines of the first display electrode-line pair group are biased and selected display cells selected from among the display cells of the second display electrode-line pair group cause a display-hold discharge; How to drive the panel. The method of claim 6, If the number of display cells selected in the addressing time for the second display electrode-line group is less than a set number, an alternating voltage is applied to all the display cells of the second display electrode-line pair group in the correction display-hold time. Method of discharging discharging display panel. The method of claim 7, wherein If the number of display cells selected in the addressing time for the second display electrode-line group is less than a predetermined number, the first electrode is connected to the other electrode lines of the second display electrode-line pair group in the correction display-hold time. A method of driving a discharge display panel to which a bias voltage having the same polarity as that of periodic pulses is applied. The method of claim 1, wherein at an addressing time for the first display electrode-line pair group, And a predetermined wall voltage is generated in the display cells selected from among the display cells of the first display electrode-line pair group. The method of claim 1, At the addressing time for the second display electrode-line pair group, And a predetermined wall voltage is generated in the display cells selected from among the display cells of the second display electrode-line pair group. delete The method of claim 1, wherein each of the sub-fields, Display cells of the first and second display electrode-line pair groups after a display-hold time for the first and second display electrode-line pair groups, for a time proportional to the gradation weighting value of the respective sub-field. The method of driving a discharge display panel further comprises a common display-hold time in which the selected display cells cause a display-hold discharge. The method of claim 12, If the number of display cells selected in the addressing time for the first display electrode-line group is less than a set number, an alternating voltage is applied to all the display cells in the first display electrode-line pair group at the common display-hold time. Method of discharging discharging display panel. The method of claim 12, When the number of display cells selected in the addressing time for the second display electrode-line group is less than a set number, an AC voltage is applied to all the display cells in the second display electrode-line pair group in the common display-hold time. Method of discharging discharging display panel.