KR100571336B1 - 에칭 방법 - Google Patents

에칭 방법 Download PDF

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Publication number
KR100571336B1
KR100571336B1 KR1020007007079A KR20007007079A KR100571336B1 KR 100571336 B1 KR100571336 B1 KR 100571336B1 KR 1020007007079 A KR1020007007079 A KR 1020007007079A KR 20007007079 A KR20007007079 A KR 20007007079A KR 100571336 B1 KR100571336 B1 KR 100571336B1
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KR
South Korea
Prior art keywords
film
flow rate
sio
etching
gas
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Expired - Fee Related
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KR1020007007079A
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English (en)
Korean (ko)
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KR20010033569A (ko
Inventor
마사히로 야마다
요우분 이토
고우이치로 이나자와
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동경 엘렉트론 주식회사
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Publication of KR20010033569A publication Critical patent/KR20010033569A/ko
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Publication of KR100571336B1 publication Critical patent/KR100571336B1/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02C—CAPTURE, STORAGE, SEQUESTRATION OR DISPOSAL OF GREENHOUSE GASES [GHG]
    • Y02C20/00—Capture or disposal of greenhouse gases
    • Y02C20/30—Capture or disposal of greenhouse gases of perfluorocarbons [PFC], hydrofluorocarbons [HFC] or sulfur hexafluoride [SF6]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020007007079A 1997-12-27 1998-12-25 에칭 방법 Expired - Fee Related KR100571336B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP97-368081 1997-12-27
JP36808197 1997-12-27
JP32750798A JP3905232B2 (ja) 1997-12-27 1998-11-02 エッチング方法
JP98-327507 1998-11-02
PCT/JP1998/005895 WO1999034419A1 (en) 1997-12-27 1998-12-25 Etching process

Publications (2)

Publication Number Publication Date
KR20010033569A KR20010033569A (ko) 2001-04-25
KR100571336B1 true KR100571336B1 (ko) 2006-04-17

Family

ID=26572523

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020007007079A Expired - Fee Related KR100571336B1 (ko) 1997-12-27 1998-12-25 에칭 방법

Country Status (6)

Country Link
US (1) US6602435B1 (enExample)
EP (1) EP1041613A4 (enExample)
JP (1) JP3905232B2 (enExample)
KR (1) KR100571336B1 (enExample)
TW (1) TW405149B (enExample)
WO (1) WO1999034419A1 (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6183655B1 (en) 1997-09-19 2001-02-06 Applied Materials, Inc. Tunable process for selectively etching oxide using fluoropropylene and a hydrofluorocarbon
US6174451B1 (en) 1998-03-27 2001-01-16 Applied Materials, Inc. Oxide etch process using hexafluorobutadiene and related unsaturated hydrofluorocarbons
US6387287B1 (en) 1998-03-27 2002-05-14 Applied Materials, Inc. Process for etching oxide using a hexafluorobutadiene and manifesting a wide process window
US7183219B1 (en) 1998-12-28 2007-02-27 Tokyo Electron At Limited And Japan Science And Technology Corporation Method of plasma processing
US6849193B2 (en) 1999-03-25 2005-02-01 Hoiman Hung Highly selective process for etching oxide over nitride using hexafluorobutadiene
US6749763B1 (en) 1999-08-02 2004-06-15 Matsushita Electric Industrial Co., Ltd. Plasma processing method
US6461962B1 (en) * 1999-09-01 2002-10-08 Tokyo Electron Limited Etching method
JP2001148367A (ja) 1999-11-22 2001-05-29 Nec Corp 半導体装置の製造方法及び半導体装置の製造装置
US6432318B1 (en) 2000-02-17 2002-08-13 Applied Materials, Inc. Dielectric etch process reducing striations and maintaining critical dimensions
US6451703B1 (en) * 2000-03-10 2002-09-17 Applied Materials, Inc. Magnetically enhanced plasma etch process using a heavy fluorocarbon etching gas
JP4852213B2 (ja) * 2000-05-12 2012-01-11 東京エレクトロン株式会社 高選択性のｓａｃのエッチングの方法
JP4566373B2 (ja) * 2000-09-21 2010-10-20 東京エレクトロン株式会社 酸化膜エッチング方法
JP4128365B2 (ja) * 2002-02-07 2008-07-30 東京エレクトロン株式会社 エッチング方法及びエッチング装置
JP2003282540A (ja) * 2002-03-25 2003-10-03 Tokyo Electron Ltd プラズマエッチング方法
ITMI20020931A1 (it) 2002-05-02 2003-11-03 St Microelectronics Srl Metodo per fabbricare circuiti elettronici integrati su un substrato semiconduttore
DE102004020834B4 (de) * 2004-04-28 2010-07-15 Qimonda Ag Herstellungsverfahren für eine Halbleiterstruktur
TW201330086A (zh) * 2012-01-05 2013-07-16 Duan-Ren Yu 蝕刻裝置
US8754527B2 (en) * 2012-07-31 2014-06-17 International Business Machines Corporation Self aligned borderless contact

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04258117A (ja) * 1991-02-12 1992-09-14 Sony Corp ドライエッチング方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4431477A (en) * 1983-07-05 1984-02-14 Matheson Gas Products, Inc. Plasma etching with nitrous oxide and fluoro compound gas mixture
US5770098A (en) * 1993-03-19 1998-06-23 Tokyo Electron Kabushiki Kaisha Etching process
JPH07161702A (ja) * 1993-10-29 1995-06-23 Applied Materials Inc 酸化物のプラズマエッチング方法
JP4215294B2 (ja) * 1996-10-30 2009-01-28 独立行政法人産業技術総合研究所 ドライエッチング方法
JPH10199865A (ja) * 1996-10-30 1998-07-31 Agency Of Ind Science & Technol ドライエッチング用ガス組成物およびドライエッチング方法
EP0964438B1 (en) * 1996-10-30 2007-01-10 Japan as represented by Director-General, Agency of Industrial Science and Technology Dry etching method
JPH10209124A (ja) * 1997-01-21 1998-08-07 Mitsubishi Electric Corp ドライエッチング方法
TW428045B (en) * 1997-08-20 2001-04-01 Air Liquide Electronics Chemic Plasma cleaning and etching methods using non-global-warming compounds
JP3283477B2 (ja) * 1997-10-27 2002-05-20 松下電器産業株式会社 ドライエッチング方法および半導体装置の製造方法
JPH11186229A (ja) * 1997-12-18 1999-07-09 Toshiba Corp ドライエッチング方法及び半導体装置の製造方法
US6159862A (en) * 1997-12-27 2000-12-12 Tokyo Electron Ltd. Semiconductor processing method and system using C5 F8
US6136643A (en) * 1999-02-11 2000-10-24 Vanguard International Semiconductor Company Method for fabricating capacitor-over-bit-line dynamic random access memory (DRAM) using self-aligned contact etching technology
JP2000353804A (ja) * 1999-06-11 2000-12-19 Mitsubishi Electric Corp 半導体装置およびその製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04258117A (ja) * 1991-02-12 1992-09-14 Sony Corp ドライエッチング方法

Also Published As

Publication number Publication date
KR20010033569A (ko) 2001-04-25
EP1041613A1 (en) 2000-10-04
TW405149B (en) 2000-09-11
JP3905232B2 (ja) 2007-04-18
EP1041613A4 (en) 2006-02-15
WO1999034419A1 (en) 1999-07-08
JPH11243082A (ja) 1999-09-07
US6602435B1 (en) 2003-08-05

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