KR100484330B1 - 직렬적으로제공되는데이터스트림에대한레지스터기억수신지선택방법 - Google Patents

직렬적으로제공되는데이터스트림에대한레지스터기억수신지선택방법 Download PDF

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KR100484330B1
KR100484330B1 KR1019970065763A KR19970065763A KR100484330B1 KR 100484330 B1 KR100484330 B1 KR 100484330B1 KR 1019970065763 A KR1019970065763 A KR 1019970065763A KR 19970065763 A KR19970065763 A KR 19970065763A KR 100484330 B1 KR100484330 B1 KR 100484330B1
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KR19980042949A (ko
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데이빗 사이릴 바빈
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프리스케일 세미컨덕터, 인크.
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors
    • G06F15/8076Details on data register access
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00Parallel/series conversion or vice versa

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  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Dram (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Communication Control (AREA)
KR1019970065763A 1996-11-29 1997-11-29 직렬적으로제공되는데이터스트림에대한레지스터기억수신지선택방법 Expired - Fee Related KR100484330B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/757,606 US5941974A (en) 1996-11-29 1996-11-29 Serial interface with register selection which uses clock counting, chip select pulsing, and no address bits
US08/757606 1996-11-29
US8/757,606 1996-11-29

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KR19980042949A KR19980042949A (ko) 1998-08-17
KR100484330B1 true KR100484330B1 (ko) 2005-08-25

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KR1019970065763A Expired - Fee Related KR100484330B1 (ko) 1996-11-29 1997-11-29 직렬적으로제공되는데이터스트림에대한레지스터기억수신지선택방법

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US (1) US5941974A (enExample)
JP (1) JP3896204B2 (enExample)
KR (1) KR100484330B1 (enExample)

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US20070165457A1 (en) * 2005-09-30 2007-07-19 Jin-Ki Kim Nonvolatile memory system
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US7904639B2 (en) * 2006-08-22 2011-03-08 Mosaid Technologies Incorporated Modular command structure for memory and memory system
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US8700818B2 (en) * 2006-09-29 2014-04-15 Mosaid Technologies Incorporated Packet based ID generation for serially interconnected devices
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US8331361B2 (en) * 2006-12-06 2012-12-11 Mosaid Technologies Incorporated Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
US7529149B2 (en) * 2006-12-12 2009-05-05 Mosaid Technologies Incorporated Memory system and method with serial and parallel modes
US8984249B2 (en) * 2006-12-20 2015-03-17 Novachips Canada Inc. ID generation apparatus and method for serially interconnected devices
US8010710B2 (en) * 2007-02-13 2011-08-30 Mosaid Technologies Incorporated Apparatus and method for identifying device type of serially interconnected devices
US20080201588A1 (en) * 2007-02-16 2008-08-21 Mosaid Technologies Incorporated Semiconductor device and method for reducing power consumption in a system having interconnected devices
US8122202B2 (en) 2007-02-16 2012-02-21 Peter Gillingham Reduced pin count interface
US8086785B2 (en) 2007-02-22 2011-12-27 Mosaid Technologies Incorporated System and method of page buffer operation for memory devices
US7796462B2 (en) 2007-02-22 2010-09-14 Mosaid Technologies Incorporated Data flow control in multiple independent port
US8046527B2 (en) * 2007-02-22 2011-10-25 Mosaid Technologies Incorporated Apparatus and method for using a page buffer of a memory device as a temporary cache
US7913128B2 (en) * 2007-11-23 2011-03-22 Mosaid Technologies Incorporated Data channel test apparatus and method thereof
US8825939B2 (en) * 2007-12-12 2014-09-02 Conversant Intellectual Property Management Inc. Semiconductor memory device suitable for interconnection in a ring topology
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US8134852B2 (en) 2008-10-14 2012-03-13 Mosaid Technologies Incorporated Bridge device architecture for connecting discrete memory devices to a system
US8549209B2 (en) * 2008-11-04 2013-10-01 Mosaid Technologies Incorporated Bridging device having a configurable virtual page size
US20100115172A1 (en) * 2008-11-04 2010-05-06 Mosaid Technologies Incorporated Bridge device having a virtual page buffer
JP2010271091A (ja) 2009-05-20 2010-12-02 Seiko Epson Corp 周波数測定装置
JP5517033B2 (ja) 2009-05-22 2014-06-11 セイコーエプソン株式会社 周波数測定装置
JP5440999B2 (ja) 2009-05-22 2014-03-12 セイコーエプソン株式会社 周波数測定装置
US8521980B2 (en) * 2009-07-16 2013-08-27 Mosaid Technologies Incorporated Simultaneous read and write data transfer
JP5582447B2 (ja) * 2009-08-27 2014-09-03 セイコーエプソン株式会社 電気回路、同電気回路を備えたセンサーシステム、及び同電気回路を備えたセンサーデバイス
JP5815918B2 (ja) 2009-10-06 2015-11-17 セイコーエプソン株式会社 周波数測定方法、周波数測定装置及び周波数測定装置を備えた装置
JP5876975B2 (ja) 2009-10-08 2016-03-02 セイコーエプソン株式会社 周波数測定装置及び周波数測定装置における変速分周信号の生成方法
US8582382B2 (en) * 2010-03-23 2013-11-12 Mosaid Technologies Incorporated Memory system having a plurality of serially connected devices
JP5883558B2 (ja) 2010-08-31 2016-03-15 セイコーエプソン株式会社 周波数測定装置及び電子機器
US8825967B2 (en) 2011-12-08 2014-09-02 Conversant Intellectual Property Management Inc. Independent write and read control in serially-connected devices
KR102225314B1 (ko) * 2014-11-17 2021-03-10 에스케이하이닉스 주식회사 반도체 장치 및 동작 방법

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US5530911A (en) * 1994-07-15 1996-06-25 Motorola, Inc. Method and apparatus for battery drain reduction by adjusting for dynamic changes of receiver warm-up time

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JP3896204B2 (ja) 2007-03-22
JPH10198597A (ja) 1998-07-31
KR19980042949A (ko) 1998-08-17
US5941974A (en) 1999-08-24

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