KR100482337B1 - Driving method and apparatus of plasma display panel - Google Patents

Abstract

The present invention relates to a driving apparatus of a plasma display panel that can be stably operated even at a high temperature.

The driving apparatus of the plasma display panel of the present invention includes a scan driver for supplying a first sustain pulse to the scan electrode during the sustain period; A sustain driver for supplying a second sustain pulse to the sustain electrode during the sustain period; A temperature sensing unit for monitoring an ambient temperature at which the panel is driven and generating a bit control signal corresponding to the ambient temperature at which the panel is driven; And a timing controller for generating a timing control signal and supplying the timing control signal to the scan driver and the sustain driver in response to the bit control signal so that the periods of the first and second sustain pulses can be adjusted. The timing controller generates the timing control signal so that the first and second sustain pulses having a wide period may be supplied as the ambient temperature at which the panel is driven increases in response to the bit control signal.

Description

DRIVING METHOD AND APPARATUS OF PLASMA DISPLAY PANEL}

The present invention relates to a driving apparatus and a driving method of a plasma display panel, and more particularly, to a driving apparatus and a driving method of a plasma display panel that can be stably operated even at high temperature.

Plasma Display Panel (hereinafter referred to as "PDP") is an ultraviolet light generated when an inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne, etc. discharges to display an image by emitting phosphors. do. Such PDPs are not only thin and large in size, but also have improved in image quality due to recent technology development.

Referring to FIG. 1, a discharge cell of a three-electrode alternating surface discharge type PDP includes a sustain electrode pair including a scan electrode 30Y and a common sustain electrode 30Z formed on the upper substrate 10, and orthogonal to the sustain electrode pair. The address electrode 20X is formed on the lower substrate 18. Each of the scan electrode 30Y and the common sustain electrode 30Z has a structure in which transparent electrodes 12Y and 12Z and metal bus electrodes 13Y and 13Z are stacked. The upper dielectric layer 14 and the MgO passivation layer 16 are stacked on the upper substrate 10 having the scan electrode 30Y and the common sustain electrode 30Z side by side. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into an initialization period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges. The initialization period is divided into a setup period in which the rising ramp waveform is supplied and a set down period in which the falling ramp waveform is supplied. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period is increased at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. .

3 shows driving waveforms of a PDP supplied to two subfields.

In Fig. 3, Y represents a scan electrode and Z represents a common sustain electrode. And X represents an address electrode.

Referring to FIG. 3, the PDP is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, the rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y in the setup period SU. This rising ramp waveform (Ramp-up) causes a discharge in the cells of the full screen. By this setup discharge, positive wall charges are accumulated on the address electrode X and the common sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y. After the rising ramp waveform Ramp-up is supplied in the set-down period SD, the falling ramp waveform Ramp-down falling at the positive voltage lower than the peak voltage of the rising ramp waveform Ramp-up is applied to the scan electrodes ( Is simultaneously applied to Y). Ramp-down causes a slight erase discharge in the cells, thereby partially erasing the excessively formed wall charge. By this set-down discharge, the wall charges such that the address discharge can be stably generated remain uniformly in the cells.

In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes Y, and the positive data pulse data is applied to the address electrodes X in synchronization with the scan pulse scan. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when a sustain voltage is applied.

The common sustain electrode Z is supplied with a positive DC voltage Zdc during the setdown period and the address period. The DC voltage Zdc causes a setdown discharge between the common sustain electrode Z and the scan electrode Y in the setdown period, and discharges between the scan electrode Y and the common sustain electrode Z in the address period. The voltage difference is set between the common sustain electrode Z and the scan electrode Y or between the common sustain electrode Z and the address electrode X so as not to occur greatly.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the common sustain electrodes Z. FIG. The cell selected by the address discharge has a sustain discharge, i.e., a display between the scan electrode Y and the common sustain electrode Z every time the sustain pulse sus is applied as the wall voltage and the sustain pulse sus are added. Discharge occurs.

Finally, after the sustain discharge is completed, a ramp waveform (erase) having a small pulse width and a low voltage level is supplied to the common sustain electrode Z to erase wall charge remaining in the cells of the full screen.

However, the conventional PDP has a problem in that driving is unstable, such as discharge does not occur when operating in a high temperature environment. For example, when the PDP is divided into the upper half and the lower half as shown in FIG. 4 and the upper half is scanned from the top to the bottom, and the lower half is scanned from the bottom to the upper portion as shown in FIG. Discharge does not occur. If no address discharge occurs in the selected cell in this way, the image cannot be displayed because the sustain discharge does not occur in the selected cell even when the sustain voltage is applied. Similarly, when the PDP is sequentially scanned from the first line to the last line as shown in FIG. 5 at a high temperature of 40 ° C. or higher, no address discharge occurs in the lower portion 51 of the screen having a late scanning order.

As a result of many experiments and analysis of the experiments, the main cause of miss discharge in high temperature environment is that the later the scanning sequence increases the amount of wall charges generated during the initialization period increases. The reason for this is explained based on the change of discharge characteristics in the cell. First, as the internal / external temperature of the cell rises, the insulation characteristics of the dielectric material and the protective layer material in the cell deteriorate, and leakage current occurs and the wall charges leak. . In particular, when the wall charges of the scan electrode Y and the common sustain electrode Z leak, the address discharge is likely to be miss discharged.

Second, as the movement of space charges in a cell caused by discharge in high temperature environment becomes active, recombination of the space charge and the electron-lost atom easily occurs, so that wall charge and space charge that contribute to discharge have a long time. It is lost over time.

On the other hand, in the conventional PDP, the panel temperature increases when the panel is driven (at the time of sustain driving). In other words, when the ambient temperature is a high temperature, the panel temperature is higher than the temperature of caution to deepen the high temperature mis-discharge phenomenon. That is, since the sustain pulse sus of a high voltage is supplied in the sustain period, the temperature of the panel increases during the sustain period, thereby increasing the high temperature mis-discharge phenomenon.

Accordingly, it is an object of the present invention to provide a driving apparatus and a driving method of a PDP capable of operating stably even at high temperatures.

In order to achieve the above object, the driving apparatus of the PDP according to the present invention includes a scan driver for supplying a first sustain pulse to the scan electrode during the sustain period; A sustain driver for supplying a second sustain pulse to the sustain electrode during the sustain period; A temperature sensing unit for monitoring an ambient temperature at which the panel is driven and generating a bit control signal corresponding to the ambient temperature at which the panel is driven; And a timing controller for generating a timing control signal and supplying the timing control signal to the scan driver and the sustain driver in response to the bit control signal so that the periods of the first and second sustain pulses can be adjusted. The timing controller generates the timing control signal so that the first and second sustain pulses having a wide period may be supplied as the ambient temperature at which the panel is driven increases in response to the bit control signal. The temperature sensing unit generates different bit control signals at room temperature and high temperature, and separates the temperature of the high temperature environment into a plurality of temperature levels to generate the bit control signal. The period of the first and second sustain pulses is set wide by the width and the interval of the first and second sustain pulses being constantly widened. The period of the first and second sustain pulses is set wide by keeping the interval of the first and second sustain pulses constant and the width of the first and second sustain pulses constant. The period of the first and second sustain pulses is set wide by the width of the first and second sustain pulses being kept constant and the interval being widened. As the temperature around the panel is driven increases, the ground distance between the first and second sustain pulses increases. The driving method of the PDP according to the present invention sets the period of the sustain pulse supplied at room temperature to be shorter than the period of the sustain pulse supplied at high temperature. The high temperature is divided into a plurality of temperature levels, and the higher the temperature level is, the wider the period of the sustain pulse is set. When the period of the sustain pulse is widened, the width and interval of the sustain pulse are equally widened. When the period of the sustain pulse is widened, any one of the width and the interval of the sustain pulse is set wide.

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Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 6 to 10C.

FIG. 6 is a view showing a driving apparatus of a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 6, the driving apparatus of the PDP according to the first embodiment of the present invention is provided to the data driver 62 for supplying data to the address electrodes X1 to Xm and to the scan electrodes Y1 to Ym. Controls the scan driver 64 for supplying the initialization voltage, the scan voltage, and the sustain voltage, the sustain driver 66 for supplying the sustain voltage to the common sustain electrode Z, and the drivers 62, 64, and 66. The timing controller 60, the sustain power supply unit 68 for supplying different sustain voltages according to the driving temperature of the panel 61, and the driving temperature of the panel 61, and thus the sustain power supply unit 68 It is provided with a control unit 70 for controlling.

The data driver 62 performs inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then outputs data mapped to each subfield by a subfield mapping circuit (not shown). After latching by one line under the control of, the latched data is simultaneously supplied to the address electrodes X1 to Xm.

The scan driver 64 supplies the rising ramp waveform and the falling ramp waveform to the scan electrodes Y1 to Ym in the initialization period, and then scans the scan pulses for selecting the scan line in the address period. Feed sequentially. The scan driver 64 simultaneously supplies sustain pulses to the scan electrodes Y1 to Ym to cause sustain discharge for the selected cell in the address period.

Here, the scan driver 64 lowers the voltage level of the sustain pulse when the panel 61 is driven at a high temperature of approximately 40 ° C. or higher to supply the scan electrodes Y1 to Ym. As such, when the voltage level of the sustain pulse is lowered in a high temperature environment, the temperature of the panel 61 is prevented from rising above the ambient temperature, thereby reducing high temperature misdischarge.

The sustain driver 66 supplies a DC voltage in the set down period and the address period, and also supplies a sustain pulse in the sustain period. Here, the sustain driver 66 lowers the voltage level of the sustain pulse and supplies it to the common sustain electrode Z when the panel 61 is driven in a high temperature environment (approximately 90 ° C. or less) of approximately 40 ° C. or higher. As such, when the voltage level of the sustain pulse is lowered in the high temperature environment, the temperature of the panel 61 is prevented from rising, thereby reducing the high temperature misdischarge.

The timing controller 60 receives a vertical / horizontal synchronization signal, generates a timing control signal for each driver 62, 64, 66, and supplies the timing control signal to each driver 62, 64, 66. do.

The control unit 70 controls the sustain power supply unit 68 while monitoring the driving temperature of the panel 61. The sustain power supply 68 supplies the scan driver 64 and the sustain driver 66 with any one of various sustain voltages under the control of the controller 70.

To this end, the control unit 70 includes a temperature sensing unit 74 and a switch control unit 72 as shown in FIG. 7, and the sustain power supply unit 68 includes various sustain voltage sources Vs1, Vs2, ..., Vsi (i is a natural number). ) And switching elements Sw1, Sw2, ..., Swi.

The voltage values of the sustain voltage sources Vs1, Vs2, ..., Vsi included in the sustain power supply unit 68 are set differently from each other. For example, the voltage of the first sustain voltage Vs1 is set equal to the conventional sustain voltage (for example, 170V). The voltage of the second sustain voltage Vs2 is the voltage of the first sustain voltage Vs1. It is set lower than the value (for example, 167V). The i-sustain voltage Vsi is set lower than the second sustain voltage Vs2. (For example, 150V) That is, the sustain according to the embodiment of the present invention. The power supply unit 68 includes a plurality of sustain voltage sources Vs1, Vs2, ..., Vsi, which are set lower gradually from the conventional sustain voltage.

The switching elements Sw1, Sw2, ..., Swi are respectively installed between the sustain voltage sources Vs1, Vs2, ..., Vsi, the scan driver 64 and the sustain driver 66 to control the switch controller 72. By turning it on and off.

The temperature sensing unit 74 supplies a predetermined bit control signal to the switch control unit 72 while monitoring the ambient temperature at which the panel 61 is driven. For example, the temperature detector 74 may supply a 4-bit control signal to the switch controller 72. The temperature sensing unit 74 supplies a signal of "0000" when the ambient temperature at which the panel 61 is driven is less than about 40 ° C.

The switch control unit 72 receiving the bit control signal of "0000" from the temperature sensing unit 74 turns on the first switch Sw1. When the first switch Sw1 is turned on, the first sustain voltage Vs1 is supplied to the scan driver 64 and the sustain driver 66 as shown in FIG. 8. That is, when the ambient temperature at which the panel 61 is driven is less than about 40 ° C., the plasma display panel is driven at the same voltage as in the prior art. In other words, when the driven ambient temperature of the panel 61 is not high temperature, the voltage level of the sustain pulse is kept the same as before.

On the other hand, the temperature sensing unit 74 supplies a bit control signal of "0001" to the switch control unit 72 when the ambient temperature at which the panel 61 is driven is approximately 42 ° C. The switch control unit 72 receiving the bit control signal of “0001” from the temperature sensing unit 74 turns on the second switch Sw2. When the second switch Sw2 is turned on, the second sustain voltage Vs2 having a voltage lower than the first sustain voltage Vs1 is supplied to the scan driver 64 and the sustain driver 66 as shown in FIG. 8. That is, when the ambient temperature at which the panel 61 is driven is a high temperature, the voltage level of the sustain pulse is lowered.

As such, when the voltage level of the sustain pulse is lowered when driving at the high temperature of the panel 61, the driving temperature of the panel 61 can be prevented from rising higher than the ambient temperature, thereby reducing the high temperature mis-discharge. have.

On the other hand, the temperature sensing unit 74 supplies a bit control signal of “1111” to the switch control unit 72 when the ambient temperature at which the panel 61 is driven is approximately 80 ° C. The switch control unit 72 receiving the bit control signal of “1111” from the temperature detecting unit 74 turns on the i-th switch Swi. When the i th switch Swi is turned on, the i th sustain voltage Vsi having a voltage lower than the second sustain voltage Vs2 is supplied to the scan driver 64 and the sustain driver 66 as shown in FIG. 8.

That is, in the first embodiment of the present invention, the driving temperature of the panel 61 is set to be lower than the voltage level of the sustain pulse supplied to the panel 61 at the high temperature driving by setting the voltage of the sustain pulse supplied to the panel 61 at the high temperature driving. It can be prevented from going up higher, whereby high temperature misdischarge can be reduced. In addition, in the present invention, the high temperature is divided into a plurality of levels, and as the level is raised, a sustain pulse having a lower voltage level is supplied.

9 is a view showing a driving apparatus of a plasma display panel according to a second embodiment of the present invention.

Referring to FIG. 9, a driving apparatus of a PDP according to a second embodiment of the present invention may include a data driver 82 for supplying data to address electrodes X1 to Xm and scan electrodes Y1 to Ym. Controls the scan driver 84 for supplying the initialization voltage, the scan voltage, and the sustain voltage, the sustain driver 86 for supplying the sustain voltage to the common sustain electrode Z, and the respective drive units 82, 84, and 86. The timing controller 80 and a temperature sensing unit 88 for sensing the driving temperature of the panel 81 are provided.

The data driver 82 performs inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then outputs data mapped to each subfield by a subfield mapping circuit (not shown). After latching by one line under the control of, the latched data is simultaneously supplied to the address electrodes X1 to Xm.

The scan driver 84 supplies the rising ramp waveform and the falling ramp waveform to the scan electrodes Y1 to Ym in the initialization period, and then scans the scan pulses for selecting the scan line in the address period. Feed sequentially. The scan driver 84 simultaneously supplies sustain pulses to the scan electrodes Y1 to Ym to cause sustain discharge for the selected cell in the address period.

Here, the scan driver 84 supplies a wide range of sustain pulses to the scan electrodes Y1 to Ym when the panel 81 is driven at a high temperature of about 40 ° C. or more. As such, when the period of the sustain pulse is set to be wide in a high temperature environment, the sustain voltage driving margin is improved to reduce high temperature misdischarge.

The sustain driver 86 supplies a DC voltage in the set down period and the address period, and also supplies a sustain pulse in the sustain period. Here, the sustain driver 86 supplies the common sustain electrode Z by setting a wide period of the sustain pulse when the panel 81 is driven in a high temperature environment (approximately 90 ° C. or less) of approximately 40 ° C. or more. As such, when the period of the sustain pulse is set to be wide in a high temperature environment, the sustain voltage driving margin is improved to reduce high temperature misdischarge.

The temperature sensing unit 88 supplies a predetermined bit control signal to the timing controller 80 while monitoring the driving temperature of the panel 81.

The timing controller 80 receives a vertical / horizontal synchronization signal, generates a timing control signal for each driver 82, 84, 86, and supplies the timing control signal to each driver 82, 84, 86. do. At this time, the timing controller 80 generates a timing control signal so that the period of the width of the sustain pulse can be set differently in response to the bit control signal supplied from the temperature sensing unit 88.

The operation process will be described in detail assuming that the temperature sensing unit 88 supplies a 4-bit control signal to the timing controller 80. First, the temperature detector 88 supplies a signal of "0000" when the ambient temperature at which the panel 81 is driven is room temperature (less than 40 ° C). The timing controller 80 receives the control signal of " 0000 " from the temperature sensing unit 88, so that timing control such that a sustain pulse having the same pulse width Ta and interval Tb as in the prior art can be supplied as shown in FIG. The signal is generated and supplied to the scan driver 84 and the sustain driver 86. That is, when the ambient temperature at which the panel 81 is driven is not high temperature, the voltage level of the sustain pulse is kept the same as before.

On the other hand, the temperature sensing unit 88 supplies a bit control signal of "0001" to the timing controller 80 when the ambient temperature at which the panel 81 is driven is high, for example, 42 ° C. Timing controller 80 receives a bit control signal of "0001" from the temperature sensing unit 88, the timing control so that the sustain pulse having a wider period than the sustain pulse supplied at room temperature can be supplied as shown in Figure 10a The signal is generated and supplied to the scan driver 84 and the sustain driver 86. At this time, the width Ta 'and the interval Tb' of the sustain pulse are set to be wide by predetermined intervals.

As such, when the period of the sustain pulse is widened, the sustain voltage driving margin is improved. That is, in the width of the conventional sustain pulse, even the voltage at which the discharge does not occur can be discharged by widening the period of the sustain pulse. Therefore, in the present invention, high temperature misdischarge can be prevented by setting the period of the sustain pulse wide at a high temperature.

Meanwhile, in the present invention, as shown in FIG. 10B, the width Tc of the sustain pulse can be increased while keeping the interval Tb of the sustain pulse the same. As the width Tc of the sustain pulse increases in this way, the sustain voltage driving margin is improved, thereby preventing high temperature mis-discharge. In addition, in the present invention, as shown in FIG. 10C, the width Ta of the sustain pulse can be increased while maintaining the same width Ta of the sustain pulse. In this way, the sustain voltage driving margin is improved by increasing the interval Td of the sustain pulses, thereby preventing high temperature mis-discharge.

In addition, in the present invention, as shown in FIG. 11, the ground interval Tg between the sustain pulses may be set wide regardless of the width and intervals of the sustain pulses. In this way, when the ground interval Tg between the sustain pulses is set to be wide, the sustain voltage driving margin is improved, and thus high temperature misdischarge can be prevented.

Meanwhile, as the ambient temperature increases, the temperature detector 88 supplies a high bit control signal to the timing controller 80 in response to the increase in ambient temperature. At this time, the timing controller 80 generates a timing control signal to supply the scan driver 84 and the sustain driver 86 so that a sustain pulse having an increasingly wider period can be supplied in response to the high bit control signal. That is, in the second embodiment of the present invention, high temperature misdischarge can be prevented by dividing into a predetermined step of high temperature and supplying a sustain pulse having a wider period as the step goes up.

In addition, in the present invention, the first embodiment and the second embodiment can be applied simultaneously. That is, high temperature misdischarge can be prevented by setting the period of the sustain pulse wide at a high temperature and lowering the voltage value of the sustain pulse. In other words, in the present invention, the sustain pulse voltage margin can be improved by setting the period of the sustain pulse wide in a high temperature environment, and the voltage value of the sustain pulse can be set low to prevent the panel temperature from rising.

As described above, according to the driving apparatus and driving method of the plasma display panel according to the present invention, it is possible to set the voltage of the sustain pulse low in a high temperature environment, or to set the period of the sustain pulse wide to prevent high temperature mis-discharge.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a conventional three-electrode AC surface discharge type plasma display panel.

2 is a view showing one frame of a conventional AC surface discharge type plasma display panel.

3 is a waveform diagram showing a driving waveform supplied to electrodes during the subfield shown in FIG.

4 and 5 are diagrams illustrating regions in which misdischarge is generated in a high temperature environment in a conventional plasma display panel.

FIG. 6 is a view showing a driving device of a plasma display panel according to a first embodiment of the present invention; FIG.

7 is a view showing in detail the sustain power supply and the control unit shown in FIG.

FIG. 8 is a view showing the voltage level of the sustain pulse supplied by the driving device shown in FIG. 6; FIG.

9 is a view showing a driving apparatus for a plasma display panel according to a second embodiment of the present invention.

10A to 10C are diagrams showing the period of the sustain pulse supplied by the drive unit shown in Fig. 9;

FIG. 11 is a diagram showing a sustain pulse supplied by the driving device shown in FIG. 9; FIG.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12Y, 12Z: transparent electrode

13Y, 13Z: metal bus electrode 14, 22: dielectric layer

16: protective film 18: lower substrate

20X: address electrode 24: partition wall

26: phosphor layer 30Y: scan electrode

30Z: common sustain electrode 60,80: timing controller

61,81: Panel 62,82: Data driver

64,84: scan driver 66,86: sustain driver

68: sustain power supply unit 70: control unit

72: switch controller 74,88: temperature sensing unit

Claims (19)

delete delete delete delete delete delete delete In the driving apparatus of the plasma display panel having a scan electrode, a sustain electrode and an address electrode and driven in an initialization period for initializing a discharge cell, an address period for selecting the discharge cell, and a sustain period for implementing gradation according to the number of discharges. , A scan driver for supplying a first sustain pulse to the scan electrode during the sustain period; A sustain driver for supplying a second sustain pulse to the sustain electrode during the sustain period; A temperature sensing unit for monitoring an ambient temperature at which the panel is driven and generating a bit control signal corresponding to the ambient temperature at which the panel is driven; A timing controller for generating a timing control signal and supplying the timing control signal to the scan driver and the sustain driver in response to the bit control signal so that periods of the first and second sustain pulses can be adjusted; The timing controller generates the timing control signal to supply the first and second sustain pulses having a wide period as the ambient temperature at which the panel is driven increases in response to the bit control signal. Drive of display panel. The method of claim 8, And the period of the first and second sustain pulses is set wider by the width and the interval of the first and second sustain pulses being constant. The method of claim 8, And the period of the first and second sustain pulses is set wide by keeping the interval between the first and second sustain pulses constant and the width of the first and second sustain pulses constant. The method of claim 8, And the period of the first and second sustain pulses is set wide by keeping the width of the first and second sustain pulses constant and the intervals widen. In the driving apparatus of the plasma display panel having a scan electrode, a sustain electrode and an address electrode and driven in an initialization period for initializing a discharge cell, an address period for selecting the discharge cell, and a sustain period for implementing gradation according to the number of discharges. , A scan driver for supplying a first sustain pulse to the scan electrode during the sustain period; A sustain driver for supplying a second sustain pulse to the sustain electrode during the sustain period; A temperature sensing unit for monitoring an ambient temperature at which the panel is driven and generating a bit control signal corresponding to the ambient temperature at which the panel is driven; A timing controller for generating a timing control signal and supplying the timing control signal to the scan driver and the sustain driver in response to the bit control signal so that periods of the first and second sustain pulses can be adjusted; The timing controller controls the scan driver and the sustain driver to increase the ground distance between the first and second sustain pulses as the temperature of the panel is increased in response to the bit control signal. Driving device of plasma display panel. delete A driving method of a plasma display panel driven in an initialization period for initializing a discharge cell, an address period for selecting the discharge cell, and a sustain period for implementing gradation according to the number of discharges, And a period of the sustain pulse supplied at room temperature is shorter than a period of the sustain pulse supplied at high temperature. The method of claim 14, Wherein the high temperature is divided into a plurality of temperature levels, and as the temperature level increases, the period of the sustain pulse is set to be wider. The method of claim 15, And a width and an interval of the sustain pulse are equally wider when the period of the sustain pulse is wider. The method of claim 15, And any one of a width and an interval of the sustain pulse is wide when the period of the sustain pulse is widened. delete delete