KR100561643B1 - Apparatus for driving plasma display panel - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus for a plasma display panel. The present invention relates to a plasma display panel in which a plurality of cells are formed at intersections of a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes. A device for driving including a sustain period, comprising: a temperature sensor for sensing a temperature of the plasma display panel; A falling ramp waveform in which the voltage is gradually lowered is applied to the first electrode, and the first electrode driving unit lowers the voltage level of the falling ramp waveform when the temperature is high.

Description

A driving device of the plasma display panel {APPARATUS FOR DRIVING PLASMA DISPLAY PANEL}

1 is a plan view schematically showing an electrode arrangement of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a waveform diagram of FIG. 1.

3 is a waveform diagram illustrating a conventional method for solving the deterioration of the discharge characteristic caused by the temperature change.

4 is a waveform diagram illustrating another conventional method for solving the deterioration of the discharge characteristic caused by the temperature change.

5 is a waveform diagram illustrating a method of driving a plasma display panel according to a first embodiment of the present invention.

FIG. 6 is a block diagram illustrating a driving device for generating the driving waveform shown in FIG. 5.

7 is a waveform diagram illustrating a method of driving a plasma display panel according to a second embodiment of the present invention.

FIG. 8 is a block diagram illustrating a driving device for generating the driving waveform shown in FIG. 7.

<Description of Symbols for Main Parts of Drawings>

61, 81: timing controller 62, 82: data driver

63, 83: scan driver 64, 84: sustain driver

65, 85: drive voltage generator 66, 86: temperature sensor

The present invention relates to a plasma display panel, and more particularly to a driving device of the plasma display panel.

Plasma Display Panel (hereinafter referred to as "PDP") is used to excite and emit phosphors by using ultraviolet rays generated when an inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is discharged. Will be displayed. Such PDPs are not only thin and large in size, but also have improved in image quality due to recent technology development.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP has an address orthogonal to the scan electrodes Y1 to Yn and the sustain electrode Z, and the scan electrodes Y1 to Yn and the sustain electrode Z. Electrodes X1 to Xm are provided.

Cells 1 for displaying any one of red, green and blue are formed at the intersections of the scan electrodes Y1 to Yn, the sustain electrode Z and the address electrodes X1 to Xm. The scan electrodes Y1 to Yn and the sustain electrode Z are formed on an upper substrate (not shown). On the upper substrate, a dielectric layer and an MgO protective layer (not shown) are stacked. The address electrodes X1 to Xm are formed on the lower substrate (not shown). On the lower substrate, partition walls are formed to prevent optical and electrical interference between horizontally adjacent cells. Phosphors are excited on the lower substrate and the partition walls to be excited by vacuum ultraviolet rays and emit visible light. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space between the upper substrate and the lower substrate.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into a reset period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray scale according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period and the number of sustain pulses allocated thereto are 2 ⁿ (n = 0,1,2,3,4,5,6) in each subfield. , 7).

2 illustrates a driving waveform for driving the PDP as shown in FIG. 1.

Referring to FIG. 2, at the beginning of the reset period, a rising ramp waveform Rup in which the voltage gradually rises from the sustain voltage Vs to the setup voltage Vsetup is applied to all the scan electrodes Y simultaneously. While the rising ramp waveform Rup is supplied to the scan electrodes Y, 0 [V] is applied to the sustain electrodes Z and the address electrodes X. The setup discharge causing the formation of wall charges between the scan electrode (Y) and the address electrode (X) and between the scan electrode (Y) and the sustain electrode (Z) in the cells of the full screen by the rising ramp waveform (Rup). Happens. Following the rising ramp waveform Rup, the falling ramp waveform Rdn, whose voltage falls from the sustain voltage Vs to the negative voltage -Vy, is simultaneously applied to the scan electrodes Y. While the falling ramp waveform Rdn is supplied to the scan electrodes Y, a positive sustain voltage Vs is applied to the sustain electrodes Z, and 0 [V] is applied to the address electrodes X. . Due to the falling ramp waveform Rdn, almost no light is generated between the scan electrode Y and the sustain electrode Z, and a set-down discharge occurs as an erase dark discharge that causes the wall charges to be erased. As a result of this set-down discharge, excess wall charges are erased among the wall charges accumulated on each electrode (X, Y, Z) during setup discharge, so that wall charges remain uniformly in all cells.

In the address period, the scan pulse scp of the scan voltage Vsc falling to the negative voltage -Vy is sequentially applied to the scan electrodes Y and the positive data voltage synchronized with the scan pulse scp. The data pulse dp of Vd is applied to the address electrodes X. As the voltage difference between the scan pulse scp and the data pulse dp and the wall voltage in the cell initialized in the reset period are added, an address discharge is generated in the cell to which the data pulse dp is applied.

During the address period, the sustain electrodes V are supplied with a positive sustain voltage Vs.

In the sustain period, the sustain pulse sus of the sustain voltage Vs is applied to the scan electrodes Y and the sustain electrodes Z alternately. In the cell selected by the address discharge, as the wall voltage and the sustain voltage Vs in the cell are added, a sustain discharge, that is, a display discharge occurs between the scan electrode Y and the sustain electrode Z at each sustain pulse su.

After the sustain discharge is completed, an erase ramp waveform ers gradually increasing to the sustain voltage Vs during the erase period is applied to the sustain electrodes Z. 0V is applied to the scan electrodes Y and the address electrodes X during this erase period. The erase ramp waveform ers erases wall charges remaining in the cell by the sustain discharge by causing an erase discharge between the scan electrode Y and the sustain electrode Z. FIG.

PDP has a problem in that the discharge characteristics become incomplete as the temperature changes. This is due to the change in the pressure in the cell due to the temperature change and the discharge voltage due to the pressure change. The discharge voltage Vf may be defined as in Equation 1 below.

Vf = p × d

Where p is pressure and d is the distance between electrodes.

When the temperature of the PDP is higher than the optimum temperature corresponding to the normal driving waveform, the pressure in the discharge cell rises and the discharge voltage Vf increases due to the pressure rise. In this case, when the PDP is driven with a normal driving voltage, it is easy to cause a miss discharge in which no discharge occurs. On the contrary, when the temperature of the PDP is lowered, the pressure in the discharge cell drops and the discharge voltage Vf decreases due to the pressure drop. In this case, when the temperature is lowered, driving the PDP with a normal driving voltage is likely to cause an erroneous discharge in which a discharge occurs in a discharge cell in which discharge should not occur.

In order to solve the problem that the discharge characteristics become unstable with respect to the temperature change, methods for changing the driving voltage of the driving waveform in response to the temperature change have been proposed. One of them is a method of increasing or decreasing the pulse widths of the scan pulse scp and the data pulse dp as shown in FIG. 3. As another method, as shown in FIG. 4, the voltage Vsetup of the rising ramp waveform Rup is increased or decreased with temperature.

However, when the scan time tsc is increased as shown in FIG. 3, the address period becomes longer, so that the sustain period, which is the display period, becomes relatively short, and thus the luminance is reduced. In addition, if the address period becomes longer, the driving time is insufficient, so that the method shown in FIG. 3 cannot cope with high resolution, and it is difficult to divide or add subfields in order to reduce image quality deterioration factors such as moving picture noise.

As shown in FIG. 4, the method of varying the setup voltage Vsetup according to temperature changes the wall charges accumulated on the electrodes X, Y, and Z during setup discharge due to a change in the setup voltage Vsetup. Since -Vy) is fixed, the amount of erasing during set-down discharge becomes constant. As a result, the initialization of the cells may be uneven by the method as shown in FIG. 4. In particular, since the wall charge initialization in the cell depends on the set-down discharge, if only the setup voltage Vsetup is changed as shown in FIG. 4, the discharge characteristic may become more unstable.

Accordingly, an object of the present invention is to provide a PDP driving apparatus that stably drives the PDP even when the temperature is changed by adaptively varying the driving waveform of the PDP.

In order to achieve the above object, a method of driving a PDP according to an embodiment of the present invention resets a PDP in which a plurality of cells are formed at intersections of a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes. A method for driving by dividing into an address period and a sustain period, the method comprising: sensing a temperature of the PDP; A falling ramp waveform in which the voltage is gradually lowered is applied to the first electrode. When the temperature rises to a high temperature, the falling ramp waveform lowers the voltage level of the falling ramp waveform, while when the temperature falls to a low temperature, the voltage of the falling ramp waveform. Raising the level; And applying a DC voltage to the second electrode while the falling ramp waveform is supplied to the first electrode.
The falling slope on the falling ramp waveform is the same at the low temperature and the high temperature.
According to another aspect of the present invention, there is provided a method of driving a PDP, comprising: sensing a temperature of the PDP; Applying a falling ramp waveform to which the voltage is gradually lowered to the first electrode; Applying a DC voltage to the second electrode while the falling ramp waveform is supplied to the first electrode, and controlling the DC voltage applied to the second electrode differently according to the temperature.
Controlling the DC voltage differently according to the temperature may lower the DC voltage applied to the second electrode when the temperature rises to a higher temperature than a predetermined reference voltage, whereas when the temperature decreases to a low temperature, The applied DC voltage is higher than the predetermined reference voltage.
An apparatus for driving a PDP according to an embodiment of the present invention includes a temperature sensor for sensing a temperature of the PDP; A first electrode driver which applies a falling ramp waveform in which the voltage is gradually lowered to the first electrode, but lowers the voltage level of the falling ramp waveform, while increasing the voltage level of the falling ramp waveform when the temperature falls to a low temperature. Wow; And a second electrode driver configured to apply a DC voltage to the second electrode while the falling ramp waveform is supplied to the first electrode.
According to another embodiment of the present invention, a driving apparatus of a PDP includes: a temperature sensor configured to sense a temperature of the PDP; A first electrode driver for applying a falling ramp waveform in which voltage is gradually lowered to the first electrode; While the falling ramp waveform is supplied to the first electrode, a direct current voltage is applied to the second electrode, and a second electrode driver for controlling the direct current voltage applied to the second electrode according to the temperature is provided.

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

delete

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 8.

Referring to FIG. 5, in the driving method of the PDP according to the first embodiment of the present invention, the PDP is driven by time-dividing one frame period into a plurality of subfields, and the sustain electrodes Z are applied to at least one subfield. The driving voltage supplied is varied according to the temperature.

At the beginning of the reset period, a rising ramp waveform Rup in which the voltage gradually rises from the sustain voltage Vs to the setup voltage Vsetup is applied to all the scan electrodes Y simultaneously. While the rising ramp waveform Rup is supplied to the scan electrodes Y, 0 [V] is applied to the sustain electrodes Z and the address electrodes X. Due to the rising ramp waveform Rup, almost no light is generated between the scan electrode Y and the address electrode X and between the scan electrode Y and the sustain electrode Z in the cells of the full screen. A setup discharge occurs with a write dark discharge that causes As a result of this setup discharge, positive wall charges are accumulated on the address electrode X and the sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y.

Following the rising ramp waveform Rup, the falling ramp waveform Rdn, whose voltage falls from the sustain voltage Vs to the negative voltage -Vy, is simultaneously applied to the scan electrodes Y. While the falling ramp waveform Rdn is supplied to the scan electrodes Y, 0 V is applied to the address electrodes X, and positive voltages Vz1, Vs, and Vz2 that vary with temperature to the sustain electrodes Z. ) Is applied. Due to the falling ramp waveform Rdn, almost no light is generated between the scan electrode Y and the sustain electrode Z, and a set-down discharge occurs as an erase dark discharge that causes the wall charges to be erased. As a result of this set-down discharge, excess wall charges are erased among the wall charges accumulated on each electrode (X, Y, Z) during setup discharge, so that wall charges remain uniformly in all cells.

Looking at the change in the wall charge distribution during the setup discharge and the setdown discharge, the positive wall charges on the address electrode X formed during the setup discharge are almost unchanged during the setdown discharge. The negative wall charges on the scan electrode Y, which were formed during the setup discharge, are partially reduced by the setdown discharge. The wall charges on the sustain electrode (Z) have positive wall charges formed at the time of setup discharge, but the polarity becomes negative as the wall charges accumulate on themselves by the decrease of the negative wall charge of the scan electrode (Y) during the set-down discharge. Is reversed.

The voltage levels Vz1, Vs, and Vz2 of the voltages applied to the sustain electrodes Z during the setdown discharge are varied according to the temperature change, thereby correcting the discharge characteristics of the PDP. When the temperature of the PDP is higher than the normal use temperature, the pressure in the cell is increased and the discharge voltage Vf is increased. When the PDP is driven with the ramp ramp Rdn of the normal driving voltage under such a high temperature environment, the erase discharge is weakly generated between the scan electrode Y and the address electrode X, and thus, on the scan electrode Y and the address electrode X. Wall charges may not be sufficiently erased. The driving method of the PDP according to the present invention is a voltage Vz2 lower than the normal voltage, for example, the sustain voltage Vs, to the sustain electrodes Z while the falling ramp waveform Rdn is applied to the scan electrodes Y in a high temperature environment. ) To weakly induce the erase discharge between the scan electrode (Y) and the sustain electrode (Z) to increase the wall voltage and the space charge in the cell to compensate for the high discharge voltage at high temperatures.

In contrast, when the temperature of the PDP is lower than the normal use temperature, the pressure in the cell is lowered and the discharge voltage Vf is lowered. In such a low temperature environment, when the PDP is driven with the falling ramp waveform Rdn of the normal driving voltage, an erase discharge is strongly generated between the scan electrode Y and the address electrode X, and thus, on the scan electrode Y and the address electrode X. Wall charge may be excessively erased. The driving method of the PDP according to the present invention is a voltage Vz1 higher than the normal voltage, for example, the sustain voltage Vs, to the sustain electrodes Z while the falling ramp waveform Rdn is applied to the scan electrodes Y in a low temperature environment. ), The erase discharge between the scan electrode (Y) and the sustain electrode (Z) is strongly induced to lower the wall voltage and the space charge in the cell, thereby compensating for the low discharge voltage at low temperatures.

In the address period, the scan pulse scp of the scan voltage Vsc falling to the negative voltage -Vy is sequentially applied to the scan electrodes Y and the positive data voltage synchronized with the scan pulse scp. The data pulse dp of Vd is applied to the address electrodes X. As the voltage difference between the scan pulse scp and the data pulse dp and the wall voltage in the cell initialized in the reset period are added, an address discharge is generated in the cell to which the data pulse dp is applied. In the cells selected by the address discharge, wall charges are generated to the extent that discharge can occur when the sustain voltage Vs is applied.

The positive sustain voltage Vs is supplied to the sustain electrodes Z so that the negative wall charges do not disappear on the sustain electrodes Z during the address period.

In the sustain period, the sustain pulse sus of the sustain voltage Vs is applied to the scan electrodes Y and the sustain electrodes Z alternately. In the cell selected by the address discharge, as the wall voltage and the sustain voltage Vs in the cell are added, a sustain discharge occurs between the scan electrode Y and the sustain electrode Z at each sustain pulse su.

After the sustain discharge is completed, an erase ramp waveform ers gradually increasing to the sustain voltage Vs during the erase period is applied to the sustain electrodes Z. 0V is applied to the scan electrodes Y and the address electrodes X during this erase period. The erase ramp waveform ers erases wall charges remaining in the cell as a result of the sustain discharge by causing an erase discharge between the scan electrode Y and the sustain electrode Z. FIG.

6 shows an apparatus for driving a PDP according to a first embodiment of the present invention.

Referring to FIG. 6, the driving apparatus of the PDP according to the first embodiment of the present invention provides a temperature sensor 66 for sensing the temperature of the PDP, and for supplying data to the address electrodes X1 to Xm of the PDP. A data driver 62, a scan driver 63 for driving the scan electrodes Y1 to Yn, a sustain driver 64 for driving the sustain electrodes Z differently depending on the temperature of the PDP, and A timing controller 61 for controlling the drivers 62, 63, and 64, and a driving voltage generator 65 for supplying driving voltages to the drivers 62, 63, and 64 are provided.

The temperature sensor 66 is installed at a position close to the PDP to detect the temperature of the PDP in real time to generate a temperature detection signal St and supply the temperature detection signal St to the timing controller 61.

The data driver 62 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like not shown, and then data mapped to the subfield pattern for each bit is supplied by the subfield mapping circuit. The data driver 62 samples and latches data under the control of the timing controller 61, and then supplies the data to the address electrodes X1 to Xm.

The scan driver 63 supplies the rising ramp waveform Rup and the falling ramp waveform Rdn to the scan electrodes Y1 to Yn during the reset period under the control of the timing controller 61, and scans for the address period. The pulse scp is sequentially supplied to the scan electrodes Y1 to Yn. The scan driver 63 supplies the sustain pulses sus to the scan electrodes Y1 to Ym during the sustain period under the control of the timing controller 61.

The sustain driver 64 supplies a positive DC voltage to the sustain electrodes Z in synchronization with the falling ramp waveform Rdn during the reset period under the control of the timing controller 61 and whose voltage level varies depending on the temperature of the PDP. A positive DC bias voltage of a predetermined voltage is supplied to the sustain electrodes Z during the period. The sustain driver 64 alternately operates with the scan driver 63 during the sustain period under the control of the timing controller 61 to supply the sustain pulse su to the sustain electrodes Z.

The timing controller 61 receives the vertical / horizontal synchronization signals and generates timing control signals CTRX, CTRY, and CTRZ required for each of the driving units 62, 63, and 64, and generates the timing control signals CTRX, CTRY, and CTRZ. Each of the driving units 62, 63, 64 is controlled by supplying the driving units 62, 63, 64. In particular, the timing controller 61 includes a sustain driver such that the voltage level of the positive voltage supplied to the sustain electrodes Z varies in response to the temperature of the PDP in response to the temperature sensing signal St from the temperature sensor 66. 64). The timing control signal CTRX supplied to the data driver 62 includes a sampling clock for latching data, a latch control signal, a switch control signal for controlling on / off time of the energy recovery circuit and the driving switch element. The timing control signal CTRY applied to the scan driver 63 includes a switch control signal for controlling on / off time of the energy recovery circuit and the driving switch element in the scan driver 63. The timing control signal CTRZ applied to the sustain driver 64 includes a switch control signal for controlling the on / off time of the energy recovery circuit and the driving switch element in the sustain driver 64.

The driving voltage generator 65 is configured according to the setup voltage Vsetup of the rising ramp waveform, the negative voltage of the scan electrode (-Vy), the scan voltage Vsc, the data voltage Vd, the sustain voltage Vs, and the temperature. Positive voltages Vz1 and Vz2 of the selected sustain electrode are generated. These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

As a result, the driving method and apparatus of the PDP according to the first embodiment of the present invention vary the voltage applied to the sustain electrodes Z during the set-down discharge according to the change in the ambient temperature of the PDP, thereby changing the cell condition of the PDP. Even if this changes, the wall voltage condition between the scan electrode Y and the sustain electrode Z is the same, and the space charge immediately before the scan is started is also controlled regardless of the temperature change.

7 and 8 illustrate a method and apparatus for driving a PDP according to a second embodiment of the present invention.

Referring to FIG. 7, the PDP driving method according to the second embodiment of the present invention time-divides one frame period into a plurality of subfields to drive the PDP, and a period for inducing setdown discharge in at least one subfield. Variable.

First, between the scan electrode (Y) and the address electrode (X) and between the scan electrode (Y) and the sustain electrode (Z) in the cells of the full screen by the rising ramp waveform (Rup) applied to the scan electrodes (Y) There is little light in the room, and setup discharge occurs as a write dark discharge that causes the formation of wall charges.

Following the rising ramp waveform Rup, the falling ramp waveform Rdn is applied to the scan electrodes Y at the same time, in which the voltage application period varies depending on the temperature of the PDP. Since the falling ramp waveform Rdn varies in voltage application period at the same slope, the lower limit voltage is selected at various voltage levels such as -Vy1, -Vy2, and -Vy3. While the falling ramp waveform Rdn is supplied to the scan electrodes Y, 0V is applied to the address electrodes X, and positive voltages Vz1, Vs, which vary with temperature to the sustain electrodes Z. Vz2) is applied. Due to the falling ramp waveform Rdn, almost no light is generated between the scan electrode Y and the sustain electrode Z, and a set-down discharge occurs as an erase dark discharge that causes the wall charges to be erased. As a result of this set-down discharge, excess wall charges are erased among the wall charges accumulated on each electrode (X, Y, Z) during setup discharge, so that wall charges remain uniformly in all cells.

The voltage application period and the voltage level of the falling ramp waveform Rdn varying with temperature during setdown discharge correct the discharge characteristics of the PDP that become unstable when the temperature changes. When the temperature of the PDP is higher than the normal use temperature, the pressure in the cell is increased and the discharge voltage Vf is increased. The driving method of the PDP according to the second embodiment of the present invention reduces the voltage application period or decreases the voltage level of the falling ramp waveform Rdn while the falling ramp waveform Rdn is applied to the scan electrodes Y in a high temperature environment. By raising from -Vy2 to -Vy1, the erase discharge between the scan electrode Y and the sustain electrode Z is weakly induced. When the erase discharge is weakly generated, the wall voltage and the space charge in the cell are increased, and the discharge can be stably generated even when the discharge voltage is increased at high temperature.

In contrast, when the temperature of the PDP is lower than the normal use temperature, the pressure in the cell is lowered and the discharge voltage Vf is lowered. The driving method of the PDP according to the second embodiment of the present invention is to increase the voltage application period of the falling ramp waveform Rdn in a low temperature environment or to lower the voltage level from -Vy2 to -Vy3 to scan electrode Y and sustain electrode. The erase discharge between (Z) is strongly induced. When the erase discharge is strongly generated, the wall voltage and the space charge in the cell are lowered, so that the discharge can be stably generated even at a low temperature at the low temperature.

Since the address period, the sustain period, and the erase period are substantially the same as in the above-described embodiment, detailed description thereof will be omitted.

8 shows an apparatus for driving a PDP according to a second embodiment of the present invention.

Referring to FIG. 8, the driving apparatus of the PDP according to the second embodiment of the present invention provides a temperature sensor 86 for sensing a temperature of the PDP, and for supplying data to the address electrodes X1 to Xm of the PDP. A data driver 82, a scan driver 83 for driving the scan electrodes Y1 to Yn, a sustain driver 84 for driving the sustain electrodes Z differently according to the temperature of the PDP, and And a timing controller 81 for controlling the driving units 82, 83, and 84, and a driving voltage generation unit 85 for supplying driving voltages to the driving units 82, 83, and 84.

The temperature sensor 86 is installed at a position close to the PDP to sense the temperature of the PDP in real time to generate a temperature detection signal St and supply the temperature detection signal St to the timing controller 81.

The data driver 82 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to a subfield pattern for each bit is supplied by the subfield mapping circuit. The data driver 82 samples and latches data under the control of the timing controller 81, and then supplies the data to the address electrodes X1 to Xm.

The scan driver 83 supplies the rising ramp waveform Rup to the scan electrodes Y1 to Yn as shown in FIG. 7 during the reset period under the control of the timing controller 81, and then the voltage application period and the voltage level are changed according to the temperature. The falling ramp waveform Rdn is supplied to the scan electrodes Y1 to Yn. During the address period, the scan driver 83 sequentially supplies the scan pulse scp to the scan electrodes Y1 to Yn as shown in FIG. 7. The scan driver 83 supplies the sustain pulse su to the scan electrodes Y1 to Ym as shown in FIG. 7 during the sustain period under the control of the timing controller 61.

The sustain driver 84 supplies the DC bias voltage to the sustain electrodes Z as shown in FIG. 7 during the period in which the falling ramp waveform Rdn is supplied to the scan electrodes Y1 to Yn and the address period under the control of the timing controller 81. ) And alternately with the scan driver 83 during the sustain period to supply the sustain pulse su to the sustain electrodes Z.

The timing controller 81 receives the vertical / horizontal synchronization signals and generates timing control signals CTRX, CTRY, and CTRZ required for each of the driving units 82, 83, and 84, and generates the timing control signals CTRX, CTRY, and CTRZ. Each of the driving units 82, 83, 84 is controlled by supplying the driving units 62, 63, 64. In particular, the timing controller 81 has a voltage application period and voltage level of the falling ramp waveform Rdn supplied to the scan electrodes Y1 to Yn in response to the temperature sensing signal St from the temperature sensor 86. The scan driver 83 causes the voltage applying period and the voltage to be selected so as to vary depending on the temperature. The timing control signal CTRX supplied to the data driver 82 includes a sampling clock for latching data, a latch control signal, a switch control signal for controlling on / off time of the energy recovery circuit and the driving switch element. . The timing control signal CTRY applied to the scan driver 83 includes a switch control signal for controlling on / off time of the energy recovery circuit and the driving switch element in the scan driver 83. The timing control signal CTRZ applied to the sustain driver 84 includes a switch control signal for controlling the on / off time of the energy recovery circuit and the driving switch element in the sustain driver 84.

The driving voltage generator 85 includes a negative voltage (-Vy1, -Vy2, -Vy3), a scan voltage (Vsc), and a data voltage of the scan electrode selected according to the setup voltage Vsetup of the rising ramp waveform and the temperature of the PDP. (Vd), sustain voltage (Vs), and the like. These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

As a result, the method and apparatus for driving a PDP according to the second embodiment of the present invention vary the voltage application period and voltage level of the falling ramp waveform Rdn during the set-down discharge by varying the ambient temperature of the PDP, thereby changing the PDP. Even if the cell condition of the cell is changed, the wall voltage condition between the scan electrode (Y) and the sustain electrode (Z) is the same, and the space charge immediately before the scan is started is also controlled regardless of the temperature change.

On the other hand, the method and apparatus for driving a PDP according to the present invention can further stabilize the discharge characteristics of the PDP according to the temperature change by using the above-described embodiments in combination. In addition, the method and apparatus for driving a PDP according to the present invention may be applied to other set-down driving conditions such as the voltage application period of the falling ramp waveform or the voltage level or the voltage of the sustain electrode as well as the slope of the falling ramp waveform to cause the set-down discharge. You can control it differently.

As described above, the driving device of the PDP according to the present invention detects the temperature of the PDP in real time and adjusts the voltage or the erasing period for causing the erasure according to the temperature change of the PDP, and the discharge characteristic of the cell generated when the temperature changes. By minimizing the instability of the PDP, it is possible to minimize miss discharge or false discharge in the PDP. Therefore, the driving method and apparatus of the PDP according to the present invention can stably drive the PDP even if the temperature changes by adaptively varying the driving waveform of the PDP in response to the temperature change.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (18)

delete delete delete delete delete delete delete delete An apparatus for driving a plasma display panel including a reset period, an address period, and a sustain period, in which a plurality of cells are formed at intersections of a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes, A temperature sensor for sensing a temperature of the plasma display panel; A driving device of the plasma display panel, comprising: applying a falling ramp waveform in which the voltage gradually decreases to the first electrode, and lowering the voltage level of the falling ramp waveform when the temperature is high; . The method of claim 9, And a second electrode driver configured to apply a DC voltage to the second electrode while the falling ramp waveform is supplied to the first electrode. delete delete The method of claim 9, And the first electrode driver increases the voltage level of the falling ramp waveform when the temperature is low. An apparatus for driving a plasma display panel in which a plurality of cells are formed at intersections of a plurality of first electrodes, a plurality of second electrodes, and a plurality of third electrodes is divided into a reset period, an address period, and a sustain period. A temperature sensor for sensing a temperature of the plasma display panel; A first electrode driver for applying a falling ramp waveform in which voltage is gradually lowered to the first electrode; While the falling ramp waveform is supplied to the first electrode, a DC voltage is applied to the second electrode, and a second electrode driver for controlling the DC voltage applied to the second electrode differently according to the temperature is provided. A drive device for a plasma display panel. The method of claim 14, The second electrode driver, And when the temperature rises to a high temperature, the DC voltage applied to the second electrode is lower than a predetermined reference voltage. The method of claim 14, The second electrode driver, And when the temperature is lowered to a low temperature, the DC voltage applied to the second electrode is increased to be higher than a predetermined reference voltage. delete delete

Images