KR100719576B1 - Method for driving plasma display panel - Google Patents

Abstract

An object of the present invention is to provide a method of driving a plasma display panel that is stable and uniform address discharge is performed according to the temperature of the panel.

In order to achieve the above object, according to the present invention, discharge cells are defined in an area where a plurality of electrodes intersect, a unit frame displaying an image is divided into a plurality of subfields, and each subfield initializes all of the discharge cells. A reset period, an address period for distinguishing a cell to be turned on and a cell not to be turned on, and a sustain period for performing sustain discharge according to a gray scale weight assigned to each subfield in a discharge cell selected as a cell to be turned on In the method of driving a plasma display panel divided into: In the reset period, a falling pulse is applied to a first electrode of the plurality of electrodes, the application period of the falling pulse is a first period gradually falling with a falling slope and And a second period of rapidly falling to maintain the first voltage, and the higher the temperature of the panel is, the lower The falling slope of the strong pulse is steep, and the lower the temperature of the panel is, the lower the falling slope of the falling pulse is, and the scanning pulse is applied to the first electrode in the address period, regardless of the temperature change of the panel. A method of driving a plasma display panel which applies the low level of the scan pulse and the first voltage at the same voltage level is always provided.

Description

Method for driving plasma display panel {Method for driving plasma display panel}

1 is a timing diagram showing a conventional driving signal for driving a plasma display panel.

2 is a diagram illustrating an electrode arrangement of a plasma display panel to which the method of driving a plasma display panel of the present invention can be applied.

3 is a timing diagram briefly illustrating a method of driving an address display separation (ADS).

4 is a block diagram schematically illustrating a plasma display apparatus to which a method of driving a plasma display panel of the present invention can be applied.

5 is a timing diagram illustrating an example of a method of driving a plasma display panel.

 FIG. 6 is a diagram illustrating the reset period of FIG. 5 in detail, and illustrates a timing diagram showing that the slope of the falling pulse is changed according to the temperature of the panel.

Explanation of symbols on the main parts of the drawings

Y1, ..., Yn ... first electrodes or scan electrodes

X1, ..., Xn ... second electrodes or sustain electrodes

A1, ..., Am ... third electrodes or address electrodes

Vsch ... high level of injection pulse

Vscl ... low level or first voltage of the injection pulse

Vs ... high level of maintenance pulse

Vg ... low-level or ground voltage of the holding pulse

High level Vb ... bias voltage of Va ... display data signal

Th1, Th2 ... First and second periods during the application of the falling pulse at high panel temperature

Tm1, Tm2 ... First and second periods of the application period of the falling pulse at room temperature

Tl1, Tl2 ... The first and second periods of the application period of the falling pulse at the temperature of the panel

ΔV ... potential difference between the lowest level of the first period and the low level of the scanning pulse

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a plasma display panel to stably perform an address discharge according to a panel temperature.

Recently, a plasma display panel, which is drawing attention as a replacement of a conventional cathode ray tube display device, is discharged after a discharge gas is filled between two substrates on which a plurality of electrodes are formed. The phosphor formed in a predetermined pattern by the ultraviolet rays is excited to obtain a desired image.

1 is a timing diagram showing a conventional driving signal for driving a plasma display panel.

The unit frame for displaying an image is divided into a plurality of subfields, and each subfield is driven in time division by being divided into a reset period, an address period, and a sustain period.

In the drawing, during the reset period, the rising pulse and the falling pulse are applied to the scan electrodes, and the bias voltage is applied to the sustain electrodes when the falling pulse is applied to initialize the entire discharge cell. In the address period, scan pulses are sequentially applied to the scan electrodes, display data signals are applied to the address electrodes to perform address discharge, and in the sustain period, sustain pulses are alternately applied to the scan electrodes and sustain electrodes. Thus, the sustain discharge is performed in the discharge cells in which the address discharge is performed, that is, divided into the cells to be turned on.

As described above, according to the driving signal of the conventional plasma display panel, a constant driving signal is applied to each electrode.

On the other hand, the rising pulse in the reset period serves to accumulate negative wall charges around the scan electrodes, and the falling pulse serves to erase the accumulated negative wall charges. When the falling pulse is applied, the bias voltage serves to accumulate an appropriate amount of negative charges that are erased in the vicinity of the scan electrode. Since the scan electrode performs address discharge with the address electrode during the address period, it is important to control the wall charge by applying the falling pulse and the bias voltage in the reset period. In the related art, as shown in FIG. 1, the lowest level of the falling pulse is higher than the low level of the scanning pulse. Thus, when the lowest level of the falling pulse is applied higher than the low level of the scanning pulse, the amount of wall charges erased in the vicinity of the scanning electrode is not erased in an appropriate amount, so that the address discharge is not stable. That is, there is a possibility that the address discharge is performed with over discharge. On the other hand, the amount of wall charges in the discharge cells varies depending on the temperature of the plasma display panel. This characteristic is due to the change in the emission coefficient of the MgO layer emitting secondary electrons in the discharge cell depending on the temperature. Therefore, as shown in FIG. 1, if the slope of the falling pulse is kept constant regardless of the temperature characteristic of the panel, the amount of wall charges in the discharge cells that are erased finely due to the application of the falling pulse is changed. A problem arises in that the address discharge at s is not performed uniformly.

SUMMARY OF THE INVENTION The present invention has been made to solve various problems including the above problems, and an object thereof is to provide a method of driving a plasma display panel in which a stable and uniform address discharge is performed according to the panel temperature.

In order to achieve the above object, according to the present invention, discharge cells are defined in an area where a plurality of electrodes intersect, and a unit frame for displaying an image is divided into a plurality of subfields, and each subfield is divided into entire discharge cells. To perform the oilfield transformation according to the reset period for initializing, the address period for distinguishing the cells to be turned on and the cells not to be turned on among all the discharge cells, and the gray scale weights assigned to each subfield in the discharge cells selected as the cells to be turned on. In the driving method of the plasma display panel divided into the sustain period,

In the reset period, a falling pulse is applied to a first electrode of the plurality of electrodes, and the applying period of the falling pulse is a first period having a falling slope and gradually falling, and rapidly falling to maintain a first voltage. Two periods, wherein the higher the temperature of the panel is, the steeper the falling slope of the falling pulse is, and the lower the temperature of the panel is, the lowering slope of the falling pulse is gentler. The present invention provides a method of driving a plasma display panel, wherein a scan pulse is applied, and a low level of the scan pulse and the first voltage are always applied at the same voltage level regardless of a change in temperature of the panel.

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According to another feature of the present invention, the rising pulse may be further applied to the first electrode before the falling pulse is applied.

According to another aspect of the present invention, it is preferable that the rising slope of the rising pulse increases as the temperature of the panel increases, and decreases as the temperature of the panel decreases.

According to another aspect of the present invention, in the reset period, the bias voltage is applied to the second electrode extending in parallel with the first electrode from the time of applying the falling pulse.

According to another aspect of the present invention, in the address period, a scan pulse having a low level is sequentially applied while maintaining a high level to the first electrode, and a scan pulse is applied to the third electrode extending across the first electrode. In response, a display data signal having a high level is applied, and a bias voltage is applied to a second electrode extending in parallel with the first electrode.

According to another aspect of the present invention, in the sustain period, sustain pulses having a high level and a low level are alternately applied to the first electrode and the second electrode extending in parallel with the first electrode.

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Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

2 is a diagram illustrating an electrode arrangement of a plasma display panel to which the method of driving a plasma display panel of the present invention can be applied.

The first electrodes (scan electrodes, Y1, ... Yn) and the second electrodes (hold electrodes, X1, ..., Xn) extend in parallel with each other, and the third electrodes (address electrodes, A1). Am extends in a direction intersecting the first electrodes (scanning electrodes, Y1, ... Yn) and the second electrodes (holding electrodes, X1, ..., Xn). Discharge cells are defined in the intersecting area.

2 illustrates an electrode arrangement of a plasma display panel having a three electrode structure, the method of driving the plasma display panel of the present invention may be applied to a plasma display panel having a two electrode structure in addition to the plasma display panel having a three electrode structure. The following description will be based on the three-electrode structure.

The structure of the plasma display panel will be briefly described with reference to FIG. 2. The plasma display panel includes a first substrate and a second substrate, and a plurality of electrodes intersecting with each other between the first substrate and the second substrate, and the crossing regions. And a partition wall forming a discharge space together with the first substrate and the second substrate, a phosphor layer disposed in the discharge cell, and a discharge gas so as to define the discharge cells. In addition, the plasma display panel may further include a dielectric layer covering the electrodes and an MgO layer that facilitates secondary electron emission upon discharge in order to prevent energization of the plurality of electrodes. Herein, the MgO layer exhibits a property in which the electron emission coefficient varies depending on the temperature of the panel in relation to the present invention. In general, the higher the temperature of the panel, the higher the amount of electron emission, and the lower the temperature of the panel, the lower the amount of electron emission.

3 is a timing diagram briefly illustrating a method of driving an address display separation (ADS).

Referring to this, the unit frame for displaying an image is divided into a plurality of subfields, and each subfield is divided into a reset period, an address period, and a sustain period. The reset period is a period for initializing all the discharge cells, and the address period is a period for distinguishing the discharge cells that should be turned on and the discharge cells that should not be turned on among all the discharge cells, and the sustain period is a discharge cell selected as the discharge cells to be turned on. A sustain discharge period is performed according to the gray scale weights allocated to each subfield. The plasma display panel is driven by a time division driving method for applying a driving signal in accordance with the reset, address, and sustain periods for each subfield as described above.

In the drawing, the unit frame is divided into eight subfields SF1 to SF8, each subfield is divided into a reset period (not shown), an address period A1 to A8, and a sustain period S1 to S8. The gray scale weight is allocated from the first subfield to the eighth subfield as 1T, 2T, ... 128T, but this is only an example and the present invention is not limited thereto. That is, the number of subfields of a unit frame may be less or more than eight, and the allocation of gray scale weights for each subfield may be changed according to a design specification, unlike illustrated.

4 is a block diagram schematically illustrating a plasma display apparatus to which a method of driving a plasma display panel of the present invention can be applied.

Referring to the drawings, the plasma display apparatus of FIG. 4 once includes an image processor 300, a logic controller 302, a Y driver 304, an address driver 306, an X driver 308, and a plasma display panel ( 1) is provided.

The image processor 300 receives an external video signal such as a PC signal, a DVD signal, a video signal, or a TV signal from the outside, converts an analog signal into a digital signal, and processes the digital signal into an internal video signal. The internal video signals are 8-bit red (R), green (G), and blue (B) image data, clock signals, and vertical and horizontal sync signals, respectively.

The logic controller 302 receives the internal image signal from the image processor 300 and undergoes a gamma correction and an automatic power control (APC) step, respectively, to drive the Y drive control signal SY and the A drive control signal SA. And an X drive control signal SX.

The Y driver 304 receives the Y drive control signal SY from the logic controller 302 and applies a drive signal to the first electrode (scanning electrode), and the address driver 306 receives the logic signal from the logic controller 302. The driving signal is applied to the third electrode (address electrode) by receiving the address driving control signal SA, and the X driving unit 308 receives the X driving control signal SX from the logic controller 302 to the second electrode (holding electrode). Is applied to the drive signal. Hereinafter, the first electrode will also be described as a scan electrode, the second electrode will be described as a scan electrode, and the third electrode will be described as an address electrode.

The Y driver 304 applies a reset pulse to the scan electrodes in the reset period. The reset pulse may be composed of only the falling pulse, and may be composed of the rising pulse and the falling pulse. The discharge cells are initialized while the wall charges are accumulated or erased in the discharge cells by the reset pulse. In addition, while maintaining the high level in the address period, the scan pulses having the low level are sequentially applied, and the sustain pulses having the high level and the low level are applied in the sustain period. In connection with the present invention, the falling pulse is applied over a first period with a falling slope and gradually falling, and a second period for rapidly falling to maintain the first voltage Vscl, the falling slope being variable depending on the temperature of the panel. Do it. That is, the higher the temperature of the panel, the larger the size of the down slope. Dividing the falling pulse into a first period of gradually falling and a second period of rapidly falling to maintain the first voltage may be implemented using a zener diode connected to a first voltage source (not shown). On the other hand, varying the slope in accordance with the temperature of the panel, it will be possible to implement by varying the R of the RC time constant, that is, using a variable resistor. In addition to the falling pulse, the slope of the rising pulse can also be varied depending on the temperature of the panel.

The address driver 306 applies a display data signal having a high level in accordance with the scan pulse in the address period. The address discharge is performed in the address period by the display data signal and the scanning pulse.

The X driver 308 applies a bias voltage from when the falling pulse is applied among the reset pulses to the end of the address period. In the sustain period, a sustain pulse having a high level and a low level is applied, but alternately with a sustain pulse output from the Y driver.

5 is a timing diagram illustrating an example of a method of driving a plasma display panel, which is a driving signal for solving the problem of the driving signal of FIG. 1, and FIG. 6 illustrates the reset period of FIG. 5 in detail. Is a timing chart showing that the slope of the falling pulse is varied according to.

In Fig. 1, a scan in which the lowest level Vnf of falling pulses applied to the scan electrodes Y1, ..., Yn in the reset period is applied to the scan electrodes Y1, ..., Yn in the address period. There is a problem that the address discharge is overdischarged in the address period by being applied higher than the low level Vscl of the pulse. In order to solve this problem, according to the driving signal of the present invention of FIG. 5, once, the application period of the falling pulse has a first slope having a downward slope and gradually falls, and the first voltage (which is rapidly lowered to be equal to the low level of the scanning pulse) Vscl). In addition, in order to solve the problem that the address discharge is not uniform as the amount of wall charges accumulated in the discharge cells varies according to the temperature characteristics of the panel, the falling slope of the first period is varied according to the temperature of the panel. That is, if the temperature of the panel is a high temperature (above the first temperature), the magnitude of the falling slope is increased (steeping the falling slope), and the panel temperature is a second temperature lower than the first temperature while being at room temperature (less than the first temperature). Or more), the falling slope is similar to that of the falling pulse of FIG. 1, and when the panel temperature is low (less than the second temperature), the size of the falling slope is made small (slowing the falling slope).

5 to 6, rising and falling pulses are applied to the scan electrodes Y1,..., And Yn in the reset period PR1 of the first subfield. The rising pulse rises from the sustain discharge voltage, i.e., the high level Vs of the sustain pulse, rises to the rise maximum voltage Vs + Vset, and the fall pulse falls from the sustain discharge voltage Vs. The application of the rising pulse begins to accumulate negative wall charges near the scan electrodes, and the application of the falling pulse begins to erase the negative wall charges accumulated near the scan electrodes. In particular, the falling pulse erases the wall charge accumulated excessively by applying the rising pulse so that the address discharge is stably performed between the scan electrode and the address electrode in the address period, that is, an appropriate amount of wall charge is accumulated. The lowest level and the slope of the falling pulse are important.

First, the application period of the falling pulse is divided into a first period having a falling slope and gradually falling, and a second period of rapidly falling to maintain the first voltage Vscl. Here, the lowest level of the first period has a voltage larger by ΔV than the first voltage. In the first period, the falling pulse is gradually lowered to finely control the amount of wall charges that are erased. In the second period, the first pulse is the same voltage as the lowest level of the scanning pulse so that unnecessary wall charges do not accumulate more, that is, only a proper amount of wall charges remain. Voltage Vscl is applied. As a result, in the conventional drive signal of FIG. 1, the problem of address overdischarge caused by the lowest level of the falling pulse is higher than the lowest level of the scanning pulse is solved.

In addition, the present invention varies the falling slope of the first period according to the temperature of the panel. FIG. 6A illustrates the case where the panel temperature is high temperature, and FIG. 6B illustrates the case where the panel temperature is room temperature, and FIG. 6C illustrates the case where the panel temperature is low temperature.

If the temperature of the panel is high, the magnitude of the falling slope is increased (slightly steep), and if the temperature of the panel is low temperature, the magnitude of the falling slope is reduced (slow the magnitude of the falling slope). The higher the temperature of the panel, the sharper the fall slope, so that the greater amount of wall charges are erased. The lower the temperature of the panel, the lower the slope, the less the amount of wall charges are erased.

Thus, since the falling slope varies with the temperature of the panel, the first period varies with Th1, Tm1, and Tl1, respectively, depending on the temperature of the panel, and a relationship of Th1 <Tm1 <Tl1 is established. Meanwhile, the second periods are Th2, Tm2 and Tl2, respectively, which may be the same or different, but are preferably the same.

On the other hand, although not shown in the figure, the slope of the rising pulse can also be varied depending on the temperature of the panel. That is, it is preferable that the higher the temperature of the panel is, the larger the magnitude of the rising pulse is, and the lower the temperature of the panel is, the smaller the magnitude of the rising pulse is.

Meanwhile, the bias voltage Vb is applied to the sustain electrodes X1,..., Xn and the ground voltage Vg is applied to the address electrodes A1,..., Am when the falling pulse is applied. do. The bias voltage Vb, together with the falling pulse, causes the wall charges in the discharge cells to remain at an appropriate amount at the end of the reset period.

At the end of the reset period SF1 of the first subfield, a uniform wall charge state is formed by the drive signal shown in FIGS. 5 to 6 regardless of the panel temperature, and unlike the conventional art, the lowest level of the falling pulse Since (Vscl) and the lowest level (Vscl) of the scanning pulses are made the same, the address discharge is performed uniformly and stably.

In the address period PA1 of the first subfield, the scan electrodes Y1,..., And Yn maintain the high level Vsch and sequentially apply the scan pulses having the low level Vscl. The display data signal having the high level Va is applied to (A1, ..., Am) in accordance with the scan pulse, and the sustain pulses (X1, ..., Xn) are applied when the falling pulse of the reset period is applied. The applied bias voltage Vb is applied. The address discharge is performed in the discharge cells to be turned on, so that positive wall charges are accumulated near the scan electrodes in the discharge cells where the address discharge has been performed, and negative wall charges are accumulated near the sustain electrodes.

In the reset period PR1 of the first subfield, since there is no influence of the panel temperature and the lowest level of the falling pulse and the lowest level of the scanning pulse, the address discharge is stably and uniformly performed such that overdischarge is prevented. do.

In the sustain period PS1 of the first subfield, the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., Xn have a high level Vs and a low level Vg. Alternating holding pulses are applied alternately. The sustain pulse is applied such that sustain discharge is performed by the gray scale weight of the first subfield SF1.

In the reset period, the address period, and the sustain period after the second subfield, the same driving signals as the reset period, the address period, and the sustain period of the first subfield described above may be applied. However, in the sustain period, the length of the sustain pulse applied depends on the gray scale weight.

On the other hand, the driving signal of Fig. 5 applies only the falling pulse in the reset period PR2 of the second subfield, and adopts the selective reset driving method.

In the selective reset driving method, first, a rising pulse and a falling pulse are applied in the reset period PR2 of the first subfield to accumulate negative wall charges due to the application of the rising pulse near the scan electrode in the discharge cell. All the discharge cells are initialized by erasing the negative wall charges accumulated by the application of the pulse. Next, during the reset periods PR2 to PR8 after the second subfield, only the falling pulse is applied, and in the discharge cell in which the sustain discharge has been performed, the wall charge accumulated by the sustain discharge is erased by applying the falling pulse, thereby discharging the discharge cell. In the discharge cell in which the wall charge state of? Is initialized, but the sustain discharge is not performed, the initialization state without accumulated wall charge is kept, so that the wall charge is not erased despite the application of the falling pulse. The wall charges are erased only in the discharge cells in which the sustain discharge has been performed by the selective driving method. However, at the end of the reset period, the wall charges of all the discharge cells are maintained in the initialized state. Such a selective reset method can shorten the reset period by applying only the falling pulse in the reset period after the second subfield, and can assign the shortened period to the address period or the sustain period, in particular, high-quality plasma display. It is suitable for driving the panel.

As shown in the figure, the reset period PR2 of the second subfield applies the falling pulse to the scan electrodes Y1, ..., Yn, while the applying period of the falling pulse is the reset period of the first subfield. As in (PR1), it is divided into a first period having a falling slope and gradually falling, and a second period of rapidly falling to maintain the first voltage Vscl, and the falling slope is variable according to the temperature of the panel. That is, the higher the temperature of the panel, the greater the magnitude of the falling slope, and the lower the temperature of the panel, the smaller the magnitude of the downward slope. The bias voltage Vb is applied to the sustain electrodes X1, ..., Xn according to the temperature of the panel, and the ground voltage Vg is applied to the address electrodes A1, ..., Am. By applying the above drive signal, an appropriate amount of wall charges accumulated in the discharge cells after the reset period is accumulated so that the address discharges are not over discharged, and a certain amount is accumulated regardless of the temperature of the panel. Therefore, address discharge is performed uniformly and stably.

The driving signal applied to the address period PA2 and the sustain period PS2 of the second subfield is the same as the driving signal applied to the address period PA1 and the sustain period PS1 of the first subfield. However, the length of the sustain pulse applied to the sustain period PS2 of the second subfield is determined by the gray scale weight of the second subfield SF2.

According to the present invention as described above, the following effects can be obtained.

First, since the slope of the falling pulse and / or the rising pulse is varied according to the panel temperature, the amount of wall charges accumulated in the discharge cell is constant according to the temperature characteristic of the panel, so that the address discharge in the address period is uniform and stable. do.

Secondly, the application period of the falling pulse is divided into a first period of gradually falling with a falling slope and a second period of rapidly falling to maintain a first voltage Vscl, so that an appropriate amount of wall charge near the scan electrode is appropriate. Since the address discharge is not performed by overdischarge, it is stably performed.

Third, by adopting the selective reset driving method, the reset period is shortened, and can be further allocated to the address period or the sustain period by the shortened period, so that the plasma display panel can be driven with high quality.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (8)

Discharge cells are defined in an area where a plurality of electrodes cross each other, and a unit frame displaying an image is divided into a plurality of subfields, and each subfield must be turned on during a reset period for initializing all discharge cells. A driving method of a plasma display panel divided into an address period for distinguishing a cell to be turned on and a cell not to be turned on, and a sustain period for performing sustain discharge according to a gray scale weight assigned to each subfield in a discharge cell selected as a cell to be turned on, In the reset period, a falling pulse is applied to a first electrode of the plurality of electrodes, and the applying period of the falling pulse is a first period having a falling slope and gradually falling, and rapidly falling to maintain a first voltage. Two periods, the higher the temperature of the panel is, the steeper the falling slope of the falling pulse, the lower the temperature of the panel is gentler the falling slope of the falling pulse, In the address period, a scanning pulse is applied to the first electrode, And a low level of the scanning pulse and the first voltage are always applied at the same voltage level regardless of the temperature change of the panel. delete The method of claim 1, A rising pulse is further applied to the first electrode before the falling pulse is applied. The method of claim 3, The rising slope of the rising pulse increases as the temperature of the panel increases, and decreases as the temperature of the panel decreases. The method of claim 1, And a bias voltage is applied to the second electrode extending in parallel with the first electrode during the reset period. The method of claim 1, In the address period, a display pulse having a high level is sequentially applied to the first electrode, and a scan pulse having a low level is sequentially applied, and a display having a high level in accordance with the scan pulse to a third electrode extending across the first electrode. A data signal is applied, and a bias voltage is applied to a second electrode extending in parallel with the first electrode. The method of claim 1, And in the sustain period, sustain pulses alternately having a high level and a low level are alternately applied to the first electrode and the second electrode extending parallel to the first electrode. delete

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