KR100495485B1 - Driving method and apparatus of plasma display panel - Google Patents

Abstract

The present invention relates to a driving apparatus of a plasma display panel that can be stably operated even at a high temperature.

The driving apparatus of the plasma display panel of the present invention includes a scan driver for supplying scan pulses to scan electrodes, a scan voltage source connected to the scan driver and having a plurality of voltage sources for determining a voltage level of the scan pulses, and a panel; A temperature sensor for generating a bit control signal by sensing a driving temperature of the switch; and a switch controller configured to receive the bit control signal and connect any one of a plurality of voltage sources included in the scan voltage source to the scan driver; The switch control unit may control the scan voltage source so that a voltage having a lower voltage is supplied to the scan driver as the temperature level increases at the high temperature.

Description

DRIVING METHOD AND APPARATUS OF PLASMA DISPLAY PANEL}

The present invention relates to a driving apparatus and a driving method of a plasma display panel, and more particularly, to a driving apparatus and a driving method of a plasma display panel that can be stably operated even at high temperature.

Plasma Display Panel (hereinafter referred to as "PDP") is an ultraviolet light generated when an inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne, etc. discharges to display an image by emitting phosphors. do. Such PDPs are not only thin and large in size, but also have improved in image quality due to recent technology development.

Referring to FIG. 1, a discharge cell of a three-electrode alternating surface discharge type PDP includes a sustain electrode pair including a scan electrode 30Y and a common sustain electrode 30Z formed on the upper substrate 10, and orthogonal to the sustain electrode pair. The address electrode 20X is formed on the lower substrate 18. Each of the scan electrode 30Y and the common sustain electrode 30Z has a structure in which transparent electrodes 12Y and 12Z and metal bus electrodes 13Y and 13Z are stacked. The upper dielectric layer 14 and the MgO passivation layer 16 are stacked on the upper substrate 10 having the scan electrode 30Y and the common sustain electrode 30Z side by side. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into an initialization period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges. The initialization period is divided into a setup period in which the rising ramp waveform is supplied and a set down period in which the falling ramp waveform is supplied.

For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period is increased at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. .

3 shows driving waveforms of a PDP supplied to two subfields.

In Fig. 3, Y represents a scan electrode and Z represents a common sustain electrode. And X represents an address electrode.

Referring to FIG. 3, the PDP is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, the rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y in the setup period SU. This rising ramp waveform (Ramp-up) causes a discharge in the cells of the full screen. By this setup discharge, positive wall charges are accumulated on the address electrode X and the common sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y. After the rising ramp waveform Ramp-up is supplied in the set-down period SD, the falling ramp waveform Ramp-down falling at the positive voltage lower than the peak voltage of the rising ramp waveform Ramp-up is applied to the scan electrodes ( Is simultaneously applied to Y). Ramp-down causes a slight erase discharge in the cells, thereby partially erasing the excessively formed wall charge. By this set-down discharge, the wall charges such that the address discharge can be stably generated remain uniformly in the cells.

In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes Y, and the positive data pulse data is applied to the address electrodes X in synchronization with the scan pulse scan. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when a sustain voltage is applied.

The common sustain electrode Z is supplied with a positive DC voltage Zdc during the setdown period SD and the address period. The DC voltage Zdc causes a setdown discharge between the common sustain electrode Z and the scan electrode Y in the setdown period SD and between the scan electrode Y and the common sustain electrode Z in the address period. The voltage difference is set between the common sustain electrode Z and the scan electrode Y or between the common sustain electrode Z and the address electrode X so that the discharge does not occur largely.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the common sustain electrodes Z. FIG. The cell selected by the address discharge has a sustain discharge, i.e., a display between the scan electrode Y and the common sustain electrode Z every time the sustain pulse sus is applied as the wall voltage and the sustain pulse sus are added. Discharge occurs.

Finally, after the sustain discharge is completed, a ramp waveform (erase) having a small pulse width and a low voltage level is supplied to the common sustain electrode Z to erase wall charge remaining in the cells of the full screen.

However, the conventional PDP has a problem in that driving is unstable, such as discharge does not occur when operating in a high temperature environment. For example, when the PDP is divided into the upper half and the lower half as shown in FIG. 4 and the upper half is scanned from the top to the bottom, and the lower half is scanned from the bottom to the upper portion as shown in FIG. Discharge does not occur. If no address discharge occurs in the selected cell in this way, the image cannot be displayed because the sustain discharge does not occur in the selected cell even when the sustain voltage is applied. Similarly, when the PDP is sequentially scanned from the first line to the last line as shown in FIG. 5 at a high temperature of approximately 40 ° C. or higher, no address discharge occurs in the lower portion 51 of the screen having a late scanning order.

As a result of many experiments and analysis of the experiments, the main cause of miss discharge in high temperature environment is that the later the scanning sequence increases the amount of wall charges generated during the initialization period increases. The reason for this is explained based on the change of discharge characteristics in the cell. First, as the internal / external temperature of the cell rises, the insulation characteristics of the dielectric material and the protective layer material in the cell deteriorate, and leakage current occurs and the wall charges leak. . In particular, when the wall charges of the scan electrode Y and the common sustain electrode Z leak, the address discharge is likely to be miss discharged.

Second, as the movement of space charges in a cell caused by discharge in high temperature environment becomes active, recombination of the space charge and the electron-lost atom easily occurs, so that wall charge and space charge that contribute to discharge have a long time. It is lost over time.

Accordingly, an object of the present invention is to provide a driving apparatus and a driving method of a plasma display panel which can be stably operated even at high temperature.

In order to achieve the above object, a plasma display panel driving apparatus includes a scan driver for supplying scan pulses to a scan electrode, and a scan driver connected to the scan driver and having a plurality of voltage sources for determining the voltage level of the scan pulses. A switch for connecting a voltage source, a temperature sensor for sensing a driving temperature of the panel to generate a bit control signal, and connecting one of the voltage sources of the plurality of voltage sources included in the scan voltage source to the scan driver. Equipped.

The scan voltage source includes a plurality of switches respectively installed between the plurality of voltage sources and the scan driver and turned on by the control of the switch controller.

The temperature sensor generates a bit control signal at a high temperature and a temperature below the high temperature, and separates the high temperature into a plurality of temperature levels to generate a bit control signal.

The switch control unit sets the voltage level of the voltage source supplied at a high temperature in correspondence with the bit control signal to be lower than the voltage level of the voltage source supplied at a temperature below the high temperature.

The switch controller controls the scan voltage source so that a voltage having a lower voltage is supplied to the scan driver as the temperature level increases at a high temperature.

The driving apparatus of the plasma display panel of the present invention includes a data driver for supplying data pulses to an address electrode, a data voltage source connected to the data driver and having a plurality of voltage sources for determining a voltage level of the data pulses, and driving the panel. A temperature sensor for sensing a temperature and generating a bit control signal, and a switch controller for receiving a bit control signal and connecting any one of a plurality of voltage sources included in the data voltage source to the data driver.

The data voltage source includes a plurality of switches respectively installed between the plurality of voltage sources and the data driver and turned on by the control of the switch controller.

The temperature sensor generates a bit control signal at a high temperature and a temperature below the high temperature, and separates the high temperature into a plurality of temperature levels to generate a bit control signal.

The switch control unit controls the data voltage source so that the voltage level of the voltage source supplied at a high temperature is set higher than the voltage level of the voltage source supplied at a temperature below the high temperature in response to the bit control signal.

The switch controller controls the data voltage source so that a voltage having a higher voltage can be supplied to the data driver as the temperature level increases at a high temperature.

The driving apparatus of the plasma display panel according to the present invention includes a scan driver for supplying scan pulses to the scan electrodes, a data driver for supplying data pulses to the address electrodes, and a scan driver for determining the voltage level of the scan pulses. A scan voltage source having a plurality of first voltage sources, a data voltage source having a plurality of second voltage sources connected to the data driver and determining a voltage level of the data pulse, and generating a bit control signal by sensing a driving temperature of the panel And a plurality of second voltage sources included in the data voltage source while connecting the first voltage source of any one of the plurality of first voltage sources included in the scan voltage source by receiving a temperature sensor and a bit control signal. A switch control unit for connecting the second voltage source of any one of the The.

The scan voltage source includes a plurality of first switches respectively installed between the plurality of first voltage sources and the data driver and turned on under the control of a switch controller, and the data voltage source is provided between the plurality of second voltage sources and the scan driver. And a plurality of second switches, each of which is installed at and turned on by the control of the switch controller.

The temperature sensor generates a bit control signal at a high temperature and a temperature below the high temperature, and separates the high temperature into a plurality of temperature levels to generate a bit control signal.

The switch controller controls the scan voltage source so that the voltage level of the first voltage source supplied at a high temperature is set lower than the voltage level of the first voltage source supplied at a temperature below a high temperature in response to a bit control signal. The data voltage source is controlled such that the voltage level of the second voltage source is set higher than the supply level of the second voltage source supplied at a temperature below the high temperature.

The switch controller controls the scan voltage source so that a first voltage having a lower voltage is supplied to the scan driver as the temperature level increases at a high temperature, and a second voltage having a high voltage is supplied to the scan driver as the temperature level increases. To control the data voltage source.

The method of driving a plasma display panel of the present invention is a method of driving a plasma display panel which supplies data pulses and scan pulses to an address period during a reset period for initializing a cell, an address period for selecting a cell, and a sustain discharge period for holding a selected cell. Wherein the data pulses supplied at a high temperature are set higher than the voltage level of the data pulses supplied at a temperature below the high temperature and the scan pulses supplied at a temperature below the high temperature It characterized in that it comprises at least one step of being set lower than the voltage level of.

delete

The temperature is divided into a plurality of high temperature levels, and as the temperature level increases, the voltage level of the data pulse increases.

delete

The temperature is divided into a plurality of high temperature levels, and as the temperature level increases, the voltage level of the scan pulse is lowered.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 6 to 13.

FIG. 6 is a view showing a driving apparatus of a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 6, the driving apparatus of the PDP according to the first embodiment of the present invention includes a data driver 62 for supplying data pulses to the address electrodes X1 to Xm, and the scan electrodes Y1 to Ym. A scan driver 64 for supplying initialization pulses, scan pulses and sustain pulses, a sustain driver 66 for supplying a positive DC voltage and sustain pulses to the common sustain electrode Z, and each driver 62, A timing controller 60 for controlling the 64 and 66, a temperature sensor 74 for monitoring the driving temperature of the panel 61, and a scan having at least two different levels of voltages in the scan driver 64; A scan voltage source 70 for supplying any of the voltages and a switch controller 72 for controlling the switches included in the scan voltage source 70 are provided.

The data driver 62 performs inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then outputs data mapped to each subfield by a subfield mapping circuit (not shown). After latching by one line under the control of, the latched data is simultaneously supplied to the address electrodes X1 to Xm.

The scan driver 64 supplies the rising ramp waveform and the falling ramp waveform to the scan electrodes Y1 to Ym in the initialization period, and then scans the scan pulses for selecting the scan line in the address period. Feed sequentially. The scan driver 64 simultaneously supplies sustain pulses to the scan electrodes Y1 to Ym to cause sustain discharge for the selected cell in the address period.

The scan driver 64 supplies the scan pulse using the scan voltage supplied from the scan voltage source 70. Therefore, the voltage level of the scan pulse is determined by the scan voltage supplied from the scan voltage source 70.

The sustain driver 66 supplies a DC voltage in the set down period and the address period, and also supplies a sustain pulse in the sustain period.

The timing controller 60 receives a vertical / horizontal synchronization signal to generate a timing control signal for each driver 62, 64, 66, and supplies the timing control signal to each driver 62, 64, 66. .

The temperature sensor 74 supplies a predetermined bit control signal to the switch controller 72 while monitoring the drive temperature of the panel 61. As such, the temperature sensor 74 generates a bit control signal different from each other when the panel 61 is driven at a high temperature (approximately 40 ° C. or more) and at a temperature below the high temperature, and supplies it to the switch controller 72. .

In addition, the temperature sensor 74 divides a temperature higher than a high temperature into a plurality of levels, generates a different bit control signal as the temperature increases, that is, increases the temperature level, and supplies the same to the switch controller 72. For example, the temperature sensor 74 may generate a 4-bit control signal corresponding to the driving temperature of the panel 61 and supply it to the switch controller 72.

The scan voltage source 70 includes a plurality of voltage sources Vy1, Vy2, ..., Vyi and voltage sources Vy1, Vy2, ..., Vyi and the scan driver 64 having different voltage levels as shown in FIG. The switches Sw1, Sw2, ..., Swi are provided. Here, the voltage values of the voltage sources Vy1, Vy2, ..., Vyi are set to be gradually lowered from the voltage levels of the conventional scan pulses.

For example, the voltage value of Vy1 may be set equal to the voltage value of a conventional scan pulse. The voltage value of Vy2 is set lower than the voltage value of Vy1. Similarly, the voltage value of Vyi is set lower than the voltage value of Vy2. The switches Sw1, Sw2,..., Swi are turned on under the control of the switch controller 72.

The switch controller 72 turns on any one of the plurality of switches included in the scan voltage source 70 in response to the bit control signal input from the temperature sensor 74. The switch controller 72 controls the switches Sw1, Sw2,..., Swi so that a scan pulse having a low voltage level may be supplied as the driving temperature of the panel 61 increases to a high temperature.

In detail, the temperature sensor 74 first supplies a predetermined bit control signal, for example, a control signal of “0000” to the switch controller 72 when the panel 61 operates at a temperature below a high temperature. do. The switch control unit 72 receiving the control signal of "0000" from the temperature sensor 74 turns on the first switch Sw1 so that a scan pulse having the same voltage level as that of the conventional scan pulse can be supplied. At this time, the voltage of Vy1 is supplied to the scan driver 64.

Accordingly, the scan driver 64 supplies a scan pulse scan having a voltage level of Vy1 to the scan electrode Y as shown in FIG. 8 during the address period. On the other hand, the data driver 62 supplies data pulses having a voltage level of Va to the address electrode X in the address period. Therefore, the voltage value of the data pulse data and the voltage value of the scan pulse scan are added together (va + vy1) to cause address discharge.

On the other hand, the temperature sensor 74 supplies a control signal of “0001” to the switch control unit 72 when the panel 61 operates at the first temperature level (for example, 42 ° C.) among the plurality of temperature levels. The switch control unit 72 receiving the control signal of "0001" from the temperature sensor 74 turns on the second switch Sw2 so that the scan voltage of Vy2 can be supplied.

At this time, the scan driver 64 supplies a scan pulse scan having a voltage level of Vy2 to the scan electrode Y as shown in FIG. 8. On the other hand, the data driver 62 supplies a data pulse having a voltage level of Va in the address period. Therefore, the voltage value of the data pulse data and the voltage value of the scan pulse scan are added together (va + vy2) to cause address discharge. At this time, since the voltage level of the scan pulse is lowered, the voltage difference between the data pulse and the scan pulse is set larger than at a temperature below the high temperature.

That is, in the present invention, the voltage difference between the data pulse and the scan pulse is set large by lowering the voltage value of the scan pulse in the high temperature environment. As such, when a large voltage difference is set between the data pulse and the scan pulse, a strong address discharge occurs as compared to a temperature below a high temperature, and thus many wall charges are formed. As such, when a large number of wall charges are formed by the address discharge in a high temperature environment, high temperature false discharge can be prevented. In other words, a strong address discharge is generated in a high temperature environment to compensate for the amount of wall charges dissipated by recombination of wall charges and the like, thereby preventing high temperature misdischarge.

In addition, when the voltage difference between the data pulse and the scan pulse is set large in a high temperature environment, stable address discharge may occur. Therefore, high temperature misdischarge can be prevented.

In the present invention, as the driving temperature of the panel 61 increases, scan pulses having a lower voltage level are supplied. That is, as shown in FIG. 8, at the i (i is an integer greater than 2) temperature level, a scan pulse having a voltage level of Vyi lower than Vy2 is supplied to prevent high temperature misdischarge.

9 is a view showing a driving apparatus of a plasma display panel according to a second embodiment of the present invention.

Referring to FIG. 9, the PDP driving apparatus according to the second embodiment of the present invention includes a data driver 82 for supplying data pulses to the address electrodes X1 to Xm, and the scan electrodes Y1 to Ym. A scan driver 84 for supplying initialization pulses, scan pulses and sustain pulses, a sustain driver 86 for supplying a positive DC voltage and sustain pulses to the common sustain electrode Z, and each driver 82, Timing controller 80 for controlling 84,86, temperature sensor 92 for monitoring the driving temperature of panel 81, and data having at least two different levels of voltages in data driver 82; A data voltage source 88 for supplying any one of the voltages and a switch controller 90 for controlling the switches included in the data voltage source 88 are provided.

The data driver 82 performs inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then outputs data mapped to each subfield by a subfield mapping circuit (not shown). After latching by one line, the latched data (i.e., data pulses) is simultaneously supplied to the address electrodes X1 to Xm.

The data driver 82 supplies the data pulses to the address electrodes X1 to Xm using the data voltage supplied from the data voltage source 88. Therefore, the voltage level of the data pulse is determined by the data voltage supplied from the data voltage source 88.

The scan driver 84 supplies the rising ramp waveform and the falling ramp waveform to the scan electrodes Y1 to Ym in the initialization period, and then scans the scan pulses for selecting the scan line in the address period. Feed sequentially. The scan driver 84 simultaneously supplies sustain pulses to the scan electrodes Y1 to Ym to cause sustain discharge for the selected cell in the address period.

The sustain driver 86 supplies a DC voltage in the set down period and the address period, and also supplies a sustain pulse in the sustain period.

The timing controller 80 receives a vertical / horizontal synchronization signal to generate a timing control signal for each driver 82, 84, 86, and supplies the timing control signal to each driver 82, 84, 86. .

The temperature sensor 92 supplies a predetermined bit control signal to the switch controller 90 while monitoring the driving temperature of the panel 81. As such, the temperature sensor 92 generates and supplies different bit control signals to the switch controller 90 when the panel 81 is driven at a high temperature (about 40 ° C. or more) and when driven at a temperature below the high temperature. .

In addition, the temperature sensor 92 divides a temperature higher than a high temperature into a plurality of levels, generates a different bit control signal as the temperature increases, that is, increases the temperature level, and supplies the same to the switch controller 90. For example, the temperature sensor 92 may generate and supply a 4-bit control signal corresponding to the driving temperature of the panel 81 to the switch controller 90.

The data voltage source 88 is disposed between the plurality of voltage sources Va1, Va2,..., Va, and the voltage sources Va1, Va2,..., Va and the data driver 82 having different levels as shown in FIG. 10. Switches Sw1, Sw2, ..., Swi. Here, the voltage values of the voltage sources Va1, Va2, ..., Va are set to gradually increase from the voltage levels of the conventional data pulses.

For example, the voltage value of Va1 may be set equal to the voltage value of a conventional data pulse. The voltage value of Va2 is set higher than the voltage value of Va1. Similarly, the voltage value of Vai is set higher than the voltage value of Va2. The switches Sw1, Sw2,..., Swi are turned on under the control of the switch controller 90.

The switch controller 90 turns on any one of the plurality of switches included in the data voltage source 88 in response to the bit control signal input from the temperature sensor 92. The switch controller 90 controls the switches Sw1, Sw2,..., Swi so that the data pulse having a high voltage level is supplied as the driving temperature of the panel 81 increases to a high temperature.

In detail, the temperature sensor 92 first supplies a predetermined bit control signal, for example, a control signal of "0000" to the switch controller 90 when the panel 81 operates at a temperature below a high temperature. do. The switch controller 90 receiving the control signal of "0000" from the temperature sensor 92 turns on the first switch Sw1 so that a data pulse having the same voltage level as that of the conventional data pulse can be supplied. At this time, the data driver 82 is supplied with a voltage of Va1.

Therefore, the data driver 82 supplies the data pulse data having the voltage level of Va1 to the address electrode X as shown in FIG. 11 during the address period. On the other hand, the scan driver 84 supplies a scan pulse scan having a voltage level of Vy to the scan electrode Y in the address period. At this time, the voltage value of the data pulse data and the voltage value of the scan pulse scan are added together (vy + va1) to cause address discharge.

Meanwhile, the temperature sensor 92 supplies a control signal of “0001” to the switch controller 90 when the panel 81 operates at the first temperature level (eg, 42 ° C.) among the plurality of temperature levels. The switch controller 90 receiving the control signal of "0001" from the temperature sensor 92 turns on the second switch Sw2 so that the data voltage of Va2 can be supplied.

At this time, the data driver 82 supplies the data pulse data having a voltage level of Va2 to the address electrode X as shown in FIG. 11. On the other hand, the scan driver 84 supplies a scan pulse scan having a voltage level of Vy to the scan electrode Y in the address period. Therefore, the voltage value of the data pulse data and the voltage value of the scan pulse scan are added together (va2 + vy) to cause address discharge. At this time, since the voltage level of the data pulse is increased, the voltage difference between the data pulse and the scan pulse is set larger than at a temperature below the high temperature.

That is, in the second embodiment of the present invention, the voltage difference between the data pulse and the scan pulse is increased by increasing the voltage value of the data pulse in the high temperature environment. As such, when a large voltage difference is set between the data pulse and the scan pulse, a strong address discharge occurs as compared to a temperature below a high temperature, and thus many wall charges are formed. As such, when a large number of wall charges are formed by the address discharge in a high temperature environment, high temperature false discharge can be prevented. In other words, a strong address discharge is generated in a high temperature environment to compensate for the amount of wall charges dissipated by recombination of wall charges and the like, thereby preventing high temperature misdischarge.

In addition, when the voltage difference between the data pulse and the scan pulse is set large in a high temperature environment, stable address discharge may occur. Therefore, high temperature misdischarge can be prevented.

Meanwhile, in the present invention, as the driving temperature of the panel 81 increases, data pulses having a higher voltage level are supplied. That is, as shown in FIG. 11, at a temperature level of j (j is an integer greater than 42), a data pulse having a voltage level of Vai higher than Va2 is supplied to prevent high temperature mis-discharge.

In addition, in the present invention, the first and second embodiments may be simultaneously applied as shown in FIG.

12 is a view showing a driving apparatus of a plasma display panel according to a third embodiment of the present invention.

Referring to FIG. 12, the driving apparatus of the PDP according to the third embodiment of the present invention includes a data driver 102 for supplying data pulses to the address electrodes X1 to Xm, and the scan electrodes Y1 to Ym. A scan driver 104 for supplying initialization pulses, scan pulses and sustain pulses, a sustain driver 106 for supplying a positive DC voltage and sustain pulses to the common sustain electrode Z, and respective drivers 102, 104 and 106 Any one of a timing controller 100 for controlling the voltage, a temperature sensor 114 for monitoring the driving temperature of the panel 101, and a data voltage having at least two different levels of voltages in the data driver 102. The data voltage source 110 for supplying the data, the scan voltage source 108 for supplying any one of the scan voltage having at least two different levels of voltage to the scan driver 104, the data voltage source 110 and the scan I'm And a switch controller 112 for controlling the switches included in the voltage source 108.

The data driver 102 performs inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then outputs data mapped to each subfield by a subfield mapping circuit (not shown). After latching by one line, the latched data (i.e., data pulses) is simultaneously supplied to the address electrodes X1 to Xm.

The data driver 102 supplies the data pulses to the address electrodes X1 to Xm using the data voltage supplied from the data voltage source 110. Therefore, the voltage level of the data pulse is determined by the data voltage supplied from the data voltage source 110.

The scan driver 104 supplies the rising ramp waveform and the falling ramp waveform to the scan electrodes Y1 to Ym in the initialization period, and then scans the scan pulses for selecting the scan line in the address period. Feed sequentially. The scan driver 104 simultaneously supplies sustain pulses to the scan electrodes Y1 to Ym to cause sustain discharge for the selected cell in the address period.

The scan driver 104 supplies the scan pulse using the scan voltage supplied from the scan voltage source 108. Thus, the voltage level of the scan pulse is determined by the scan voltage supplied from the scan voltage source 108.

The sustain driver 106 supplies a DC voltage in the set down period and the address period, and also supplies a sustain pulse in the sustain period.

The timing controller 100 receives a vertical / horizontal synchronization signal to generate a timing control signal for each driver 102, 104, 106, and supplies the timing control signal to each driver 102, 104, 106.

The temperature sensor 114 supplies a predetermined bit control signal to the switch controller 112 while monitoring the driving temperature of the panel 101. As such, the temperature sensor 114 generates and supplies different bit control signals to the switch controller 112 when the panel 101 is driven at a high temperature (about 40 ° C. or more) and when driven at a temperature below the high temperature. .

In addition, the temperature sensor 114 divides a temperature higher than a high temperature into a plurality of levels, generates a different bit control signal as the temperature increases, that is, increases the temperature level, and supplies the same to the switch controller 112. For example, the temperature sensor 114 may generate a 4-bit control signal corresponding to the driving temperature of the panel 101 and supply it to the switch controller 112.

The data voltage source 110 is disposed between the plurality of voltage sources Va1, Va2,..., Va, and the voltage sources Va1, Va2,..., Va and the data driver 102 having different levels as shown in FIG. 10. Switches Sw1, Sw2, ..., Swi. Here, the voltage values of the voltage sources Va1, Va2, ..., Va are set to gradually increase from the voltage levels of the conventional data pulses.

The scan voltage source 108 is a plurality of voltage sources (Vy1, Vy2, ..., Vyi) and voltage sources (Vy1, Vy2, ..., Vyi) having a different voltage level as shown in Figure 7, respectively, and the scan driver 104 The switches Sw1, Sw2, ..., Swi are provided. Here, the voltage values of the voltage sources Vy1, Vy2, ..., Vyi are set to be gradually lowered from the voltage levels of the conventional scan pulses.

The switch controller 112 turns on any one of a plurality of switches included in the data voltage source 110 and the scan voltage source 108 in response to the bit control signal input from the temperature sensor 114. . The switch controller 112 may switch the switches Sw1, Sw2,..., Swi so that the data pulse having a high voltage level and the scan pulse having a low voltage level may be supplied as the driving temperature of the panel 101 increases to a high temperature. To control.

Referring to the operation process in detail, first, the temperature sensor 114 supplies a predetermined bit control signal, for example, a control signal of "0000" to the switch controller 112 when the panel 101 operates at a temperature below a high temperature. do. The switch control unit 112 supplied with a control signal of "0000" from the temperature sensor 114 turns on the first switch Sw1 so that a data pulse and a scan pulse having the same voltage level as in the related art can be supplied. At this time, the voltage of Va1 is supplied to the data driver 102 and the voltage of Vy1 is supplied to the scan driver 104.

 Accordingly, the data driver 102 supplies the data pulse data having the same voltage level as Va1 to the address electrode X as shown in FIG. 13 in the address period. The scan driver 104 supplies a scan pulse (scan) having the same voltage level of Vy1 to the scan electrode (Y) in the address period. At this time, the voltage value of the data pulse data and the voltage value of the scan pulse scan are added together (vy1 + va1) to cause address discharge.

Meanwhile, the temperature sensor 114 supplies a control signal of “0001” to the switch controller 112 when the panel 101 operates at a first temperature level (eg, 42 ° C.) among a plurality of temperature levels. The switch control unit 112 supplied with the control signal of “0001” from the temperature sensor 114 turns on the second switch Sw2 so that the voltages Va2 and Vy2 can be supplied.

At this time, the data driver 102 supplies the data pulse data having a voltage level of Va2 to the address electrode X as shown in FIG. 13. The scan driver 104 supplies a scan pulse scan having a voltage level of Vy2 to the scan electrode Y in the address period. Therefore, the voltage value of the data pulse data and the voltage value of the scan pulse scan are added together (va2 + vy2) to cause address discharge. At this time, since the voltage level of the data pulse and the voltage level of the scan pulse are lowered, the voltage difference between the data pulse and the scan pulse is set larger than at a temperature below the high temperature.

That is, in the third embodiment of the present invention, the voltage difference between the data pulse and the scan pulse is increased by increasing the voltage value of the data pulse and lowering the voltage value of the scan pulse in a high temperature environment. Set large. As such, when a large voltage difference is set between the data pulse and the scan pulse, a strong address discharge occurs as compared to a temperature below a high temperature, and thus many wall charges are formed. As such, when a large number of wall charges are formed by the address discharge in a high temperature environment, high temperature false discharge can be prevented. In other words, a strong address discharge is generated in a high temperature environment to compensate for the amount of wall charges dissipated by recombination of wall charges and the like, thereby preventing high temperature misdischarge.

In addition, when the voltage difference between the data pulse and the scan pulse is set large in a high temperature environment, stable address discharge may occur. Therefore, high temperature misdischarge can be prevented.

Meanwhile, in the present invention, as the driving temperature of the panel 101 increases, a data pulse having a higher voltage level is supplied and a scan pulse having a lower voltage level is supplied. That is, as shown in FIG. 13, at the temperature level i (i is an integer greater than 2), data pulses having a voltage level of Vai higher than Va2 and data pulses having a voltage level of Vyi lower than Vy2 are supplied. It prevents high temperature mis-discharge.

As described above, according to the driving apparatus and driving method of the plasma display panel according to the present invention, the voltage difference between the scan pulse and the data pulse is largely set by lowering the voltage of the scan pulse or increasing the voltage of the data pulse in a high temperature environment. As such, when the voltage difference between the scan pulse and the data pulse is set large in a high-comfort environment, stable address discharge may occur. In addition, a strong address discharge is generated between the scan electrode and the address electrode to compensate for the wall charge amount lost at high temperature.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a conventional three-electrode AC surface discharge type plasma display panel.

2 is a view showing one frame of a conventional AC surface discharge type plasma display panel.

3 is a waveform diagram showing a driving waveform supplied to electrodes during the subfield shown in FIG.

4 and 5 are diagrams illustrating regions in which misdischarge is generated in a high temperature environment in a conventional plasma display panel.

Fig. 6 is a block diagram showing a driving device of the plasma display panel according to the first embodiment of the present invention.

FIG. 7 shows details of the scan voltage source shown in FIG. 6; FIG.

FIG. 8 is a waveform diagram illustrating scan pulses and data pulses supplied by the driving apparatus shown in FIG. 6.

9 is a block diagram showing an apparatus for driving a plasma display panel according to a second embodiment of the present invention.

FIG. 10 is a detailed view of the data voltage source shown in FIG. 9; FIG.

FIG. 11 is a waveform diagram showing scan pulses and data pulses supplied by the driving apparatus shown in FIG. 9; FIG.

12 is a block diagram showing a driving apparatus of a plasma display panel according to a third embodiment of the present invention.

FIG. 13 is a waveform diagram showing scan pulses and data pulses supplied by the driving apparatus shown in FIG. 12; FIG.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12Y, 12Z: transparent electrode

13Y, 13Z: metal bus electrode 14, 22: dielectric layer

16: protective film 18: lower substrate

20X: address electrode 24: partition wall

26: phosphor layer 30Y: scan electrode

30Z: common sustain electrode 60,80,100: timing controller

61,81,101: Panel 62,82,102: Data driver

64,84,104: scan driver 66,86,106: sustain driver

70,108: scan voltage source 72,90,112: switch control unit

74,92,114: temperature sensor 88,110: data voltage source

Claims (20)

A scan driver for supplying scan pulses to the scan electrodes; A scan voltage source connected to the scan driver and having a plurality of voltage sources for determining a voltage level of the scan pulse; A temperature sensor for generating a bit control signal by sensing a driving temperature of the panel; A switch controller configured to receive the bit control signal and connect one of the plurality of voltage sources included in the scan voltage source to the scan driver; And the switch controller controls the scan voltage source so that a voltage having a lower voltage is supplied to the scan driver as the temperature level increases at the high temperature. The method of claim 1, The scan voltage source may include a plurality of switches respectively provided between the plurality of voltage sources and the scan driver to be turned on under the control of the switch controller. The method of claim 1, And the temperature sensor generates a different bit control signal at a high temperature and a temperature below the high temperature, and separates the high temperature into a plurality of temperature levels to generate the bit control signal. The method of claim 3, wherein And the switch controller controls the scan voltage source so that the voltage level of the voltage source supplied at the high temperature is set lower than the voltage level of the voltage source supplied at the temperature below the high temperature in response to the bit control signal. Drive. delete A data driver for supplying a data pulse to the address electrode; A data voltage source connected to the data driver and having a plurality of voltage sources for determining a voltage level of the data pulse; A temperature sensor for generating a bit control signal by sensing a driving temperature of the panel; A switch controller configured to receive the bit control signal and connect one of the plurality of voltage sources included in the data voltage source to the data driver; And the switch controller controls the data voltage source so that a voltage having a higher voltage is supplied to the data driver as the temperature level increases at the high temperature. The method of claim 6, And the data voltage source includes a plurality of switches respectively provided between the plurality of voltage sources and the data driver to be turned on under the control of the switch controller. The method of claim 6, And the temperature sensor generates a different bit control signal at a high temperature and a temperature below the high temperature, and separates the high temperature into a plurality of temperature levels to generate the bit control signal. The method of claim 8, And the switch controller controls the data voltage source so that the voltage level of the voltage source supplied at the high temperature is set higher than the voltage level of the voltage source supplied at the temperature below the high temperature in response to the bit control signal. Drive. delete A scan driver for supplying scan pulses to the scan electrodes; A data driver for supplying a data pulse to the address electrode; A scan voltage source connected to the scan driver and having a plurality of first voltage sources for determining a voltage level of the scan pulse; A data voltage source connected to the data driver and having a plurality of second voltage sources for determining a voltage level of the data pulse; A temperature sensor for generating a bit control signal by sensing a driving temperature of the panel; The bit control signal is input to connect any one of a plurality of first voltage sources included in the scan voltage source to the scan driver, and among the plurality of second voltage sources included in the data voltage source. A switch control unit for connecting one second voltage source to the data driver, The switch control unit controls the scan voltage source so that the first voltage having a lower voltage is supplied to the scan driver as the temperature level increases at the high temperature, and the second voltage having a higher voltage as the temperature level increases. And controlling the data voltage source to be supplied to the data driver. The method of claim 11, The scan voltage source includes a plurality of first switches that are respectively installed between the plurality of first voltage sources and the data driver, and are turned on by the control of the switch controller. And the data voltage source includes a plurality of second switches respectively provided between the plurality of second voltage sources and the scan driver to be turned on under the control of the switch controller. The method of claim 11, And the temperature sensor generates a different bit control signal at a high temperature and a temperature below the high temperature, and separates the high temperature into a plurality of temperature levels to generate the bit control signal. The method of claim 13, The switch control unit controls the scan voltage source so that the voltage level of the first voltage source supplied at the high temperature in response to the bit control signal is set lower than the voltage level of the first voltage source supplied at the temperature below the high temperature. And control the data voltage source so that the voltage level of the second voltage source supplied at a high temperature is set higher than the supply level of the second voltage source supplied at a temperature below the high temperature. delete A method of driving a plasma display panel for supplying data pulses and scan pulses in an address period during a reset period for initializing a cell, an address period for selecting a cell, and a sustain discharge period for holding a selected cell, The data pulse supplied at a high temperature is set higher than the voltage level of the data pulse supplied at a temperature below the high temperature, and the voltage level of the scan pulse supplied at a temperature below the high temperature A method of driving a plasma display panel comprising at least one of the steps set lower. delete The method of claim 16, And a voltage level of the data pulse increases as the temperature level rises. delete The method of claim 16, And a voltage level of the scan pulse is lowered as the temperature level is increased and the temperature level is increased.