KR100473197B1 - 집적회로를 위한 위상 시프트 및 트림 마스크를 결정하는방법 및 장치 - Google Patents

집적회로를 위한 위상 시프트 및 트림 마스크를 결정하는방법 및 장치 Download PDF

Info

Publication number
KR100473197B1
KR100473197B1 KR10-2002-7004059A KR20027004059A KR100473197B1 KR 100473197 B1 KR100473197 B1 KR 100473197B1 KR 20027004059 A KR20027004059 A KR 20027004059A KR 100473197 B1 KR100473197 B1 KR 100473197B1
Authority
KR
South Korea
Prior art keywords
mask
phase
region
integrated circuit
trim
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-2002-7004059A
Other languages
English (en)
Korean (ko)
Other versions
KR20020041814A (ko
Inventor
코브니콜라스베일리
사카지리쿄헤이
Original Assignee
멘터 그래픽스 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23612127&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=KR100473197(B1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 멘터 그래픽스 코포레이션 filed Critical 멘터 그래픽스 코포레이션
Publication of KR20020041814A publication Critical patent/KR20020041814A/ko
Application granted granted Critical
Publication of KR100473197B1 publication Critical patent/KR100473197B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/26Phase shift masks [PSM]; PSM blanks; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/70Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • G03F7/2022Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • G03F7/2026Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure for the removal of unwanted material, e.g. image or background correction

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Networks Using Active Elements (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
KR10-2002-7004059A 1999-09-28 2000-07-28 집적회로를 위한 위상 시프트 및 트림 마스크를 결정하는방법 및 장치 Expired - Fee Related KR100473197B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/407,447 1999-09-28
US09/407,447 US6335128B1 (en) 1999-09-28 1999-09-28 Method and apparatus for determining phase shifts and trim masks for an integrated circuit

Publications (2)

Publication Number Publication Date
KR20020041814A KR20020041814A (ko) 2002-06-03
KR100473197B1 true KR100473197B1 (ko) 2005-03-10

Family

ID=23612127

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2002-7004059A Expired - Fee Related KR100473197B1 (ko) 1999-09-28 2000-07-28 집적회로를 위한 위상 시프트 및 트림 마스크를 결정하는방법 및 장치

Country Status (8)

Country Link
US (2) US6335128B1 (https=)
EP (1) EP1218798B1 (https=)
JP (2) JP3916462B2 (https=)
KR (1) KR100473197B1 (https=)
AT (1) ATE343157T1 (https=)
AU (1) AU6388700A (https=)
DE (1) DE60031429T2 (https=)
WO (1) WO2001023961A1 (https=)

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6228539B1 (en) * 1996-09-18 2001-05-08 Numerical Technologies, Inc. Phase shifting circuit manufacture method and apparatus
JP2001235850A (ja) * 2000-02-24 2001-08-31 Sony Corp フォトマスクパターンの設計方法、レジストパターンの形成方法および半導体装置の製造方法
US6524752B1 (en) * 2000-07-05 2003-02-25 Numerical Technologies, Inc. Phase shift masking for intersecting lines
US6503666B1 (en) * 2000-07-05 2003-01-07 Numerical Technologies, Inc. Phase shift masking for complex patterns
US6681379B2 (en) 2000-07-05 2004-01-20 Numerical Technologies, Inc. Phase shifting design and layout for static random access memory
US7083879B2 (en) 2001-06-08 2006-08-01 Synopsys, Inc. Phase conflict resolution for photolithographic masks
US6978436B2 (en) 2000-07-05 2005-12-20 Synopsys, Inc. Design data format and hierarchy management for phase processing
US6733929B2 (en) * 2000-07-05 2004-05-11 Numerical Technologies, Inc. Phase shift masking for complex patterns with proximity adjustments
US6777141B2 (en) 2000-07-05 2004-08-17 Numerical Technologies, Inc. Phase shift mask including sub-resolution assist features for isolated spaces
US6811935B2 (en) * 2000-07-05 2004-11-02 Numerical Technologies, Inc. Phase shift mask layout process for patterns including intersecting line segments
US7028285B2 (en) * 2000-07-05 2006-04-11 Synopsys, Inc. Standard cell design incorporating phase information
US6787271B2 (en) * 2000-07-05 2004-09-07 Numerical Technologies, Inc. Design and layout of phase shifting photolithographic masks
US6541165B1 (en) * 2000-07-05 2003-04-01 Numerical Technologies, Inc. Phase shift mask sub-resolution assist features
US6866971B2 (en) * 2000-09-26 2005-03-15 Synopsys, Inc. Full phase shifting mask in damascene process
US6584610B1 (en) 2000-10-25 2003-06-24 Numerical Technologies, Inc. Incrementally resolved phase-shift conflicts in layouts for phase-shifted features
US6901575B2 (en) 2000-10-25 2005-05-31 Numerical Technologies, Inc. Resolving phase-shift conflicts in layouts using weighted links between phase shifters
US6622288B1 (en) 2000-10-25 2003-09-16 Numerical Technologies, Inc. Conflict sensitive compaction for resolving phase-shift conflicts in layouts for phase-shifted features
US6635393B2 (en) 2001-03-23 2003-10-21 Numerical Technologies, Inc. Blank for alternating PSM photomask with charge dissipation layer
US6553560B2 (en) * 2001-04-03 2003-04-22 Numerical Technologies, Inc. Alleviating line end shortening in transistor endcaps by extending phase shifters
US6566019B2 (en) 2001-04-03 2003-05-20 Numerical Technologies, Inc. Using double exposure effects during phase shifting to control line end shortening
US6573010B2 (en) 2001-04-03 2003-06-03 Numerical Technologies, Inc. Method and apparatus for reducing incidental exposure by using a phase shifter with a variable regulator
US6569583B2 (en) 2001-05-04 2003-05-27 Numerical Technologies, Inc. Method and apparatus for using phase shifter cutbacks to resolve phase shifter conflicts
US6593038B2 (en) 2001-05-04 2003-07-15 Numerical Technologies, Inc. Method and apparatus for reducing color conflicts during trim generation for phase shifters
KR100498442B1 (ko) * 2001-05-23 2005-07-01 삼성전자주식회사 광 마스크 세트 및 그의 제조 방법
US6852471B2 (en) * 2001-06-08 2005-02-08 Numerical Technologies, Inc. Exposure control for phase shifting photolithographic masks
US6721938B2 (en) 2001-06-08 2004-04-13 Numerical Technologies, Inc. Optical proximity correction for phase shifting photolithographic masks
US7178128B2 (en) * 2001-07-13 2007-02-13 Synopsys Inc. Alternating phase shift mask design conflict resolution
US6523165B2 (en) 2001-07-13 2003-02-18 Numerical Technologies, Inc. Alternating phase shift mask design conflict resolution
US6664009B2 (en) 2001-07-27 2003-12-16 Numerical Technologies, Inc. Method and apparatus for allowing phase conflicts in phase shifting mask and chromeless phase edges
US6738958B2 (en) 2001-09-10 2004-05-18 Numerical Technologies, Inc. Modifying a hierarchical representation of a circuit to process composite gates
US6698007B2 (en) 2001-10-09 2004-02-24 Numerical Technologies, Inc. Method and apparatus for resolving coloring conflicts between phase shifters
US6981240B2 (en) 2001-11-15 2005-12-27 Synopsys, Inc. Cutting patterns for full phase shifting masks
US6749970B2 (en) * 2001-12-11 2004-06-15 Advanced Micro Devices, Inc. Method of enhancing clear field phase shift masks with border regions around phase 0 and phase 180 regions
US7122281B2 (en) * 2002-02-26 2006-10-17 Synopsys, Inc. Critical dimension control using full phase and trim masks
US6605481B1 (en) 2002-03-08 2003-08-12 Numerical Technologies, Inc. Facilitating an adjustable level of phase shifting during an optical lithography process for manufacturing an integrated circuit
JP3813562B2 (ja) * 2002-03-15 2006-08-23 富士通株式会社 半導体装置及びその製造方法
US6704921B2 (en) 2002-04-03 2004-03-09 Numerical Technologies, Inc. Automated flow in PSM phase assignment
US6785879B2 (en) * 2002-06-11 2004-08-31 Numerical Technologies, Inc. Model-based data conversion
US6821689B2 (en) 2002-09-16 2004-11-23 Numerical Technologies Using second exposure to assist a PSM exposure in printing a tight space adjacent to large feature
KR100462887B1 (ko) * 2002-10-22 2004-12-17 삼성전자주식회사 필드 게이트 이미지의 폭을 보강하는 위상 에지 위상 변이마스크 및 제조방법
US7135255B2 (en) * 2003-03-31 2006-11-14 International Business Machines Corporation Layout impact reduction with angled phase shapes
US6993741B2 (en) * 2003-07-15 2006-01-31 International Business Machines Corporation Generating mask patterns for alternating phase-shift mask lithography
US7279209B2 (en) * 2003-12-05 2007-10-09 Ricoh Electronics, Inc. Runnable splice
KR20050079730A (ko) * 2004-02-06 2005-08-11 삼성전자주식회사 이종 프로토콜 노드들을 연결하는 방법 및 장치
US7015148B1 (en) 2004-05-25 2006-03-21 Advanced Micro Devices, Inc. Reduce line end pull back by exposing and etching space after mask one trim and etch
US7071085B1 (en) 2004-05-25 2006-07-04 Advanced Micro Devices, Inc. Predefined critical spaces in IC patterning to reduce line end pull back
US7617473B2 (en) 2005-01-21 2009-11-10 International Business Machines Corporation Differential alternating phase shift mask optimization
JP4909729B2 (ja) * 2006-12-13 2012-04-04 株式会社東芝 検査データ作成方法および検査方法
JP5833437B2 (ja) * 2011-12-29 2015-12-16 ルネサスエレクトロニクス株式会社 シミュレーション装置およびシミュレーションプログラム

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2590376A1 (fr) 1985-11-21 1987-05-22 Dumant Jean Marc Procede de masquage et masque utilise
JP2710967B2 (ja) 1988-11-22 1998-02-10 株式会社日立製作所 集積回路装置の製造方法
US5328807A (en) 1990-06-11 1994-07-12 Hitichi, Ltd. Method of forming a pattern
US5364716A (en) 1991-09-27 1994-11-15 Fujitsu Limited Pattern exposing method using phase shift and mask used therefor
US5308741A (en) 1992-07-31 1994-05-03 Motorola, Inc. Lithographic method using double exposure techniques, mask position shifting and light phase shifting
US5302477A (en) 1992-08-21 1994-04-12 Intel Corporation Inverted phase-shifted reticle
US5563012A (en) 1994-06-30 1996-10-08 International Business Machines Corporation Multi mask method for selective mask feature enhancement
US5573890A (en) 1994-07-18 1996-11-12 Advanced Micro Devices, Inc. Method of optical lithography using phase shift masking
US5538833A (en) * 1994-08-03 1996-07-23 International Business Machines Corporation High resolution phase edge lithography without the need for a trim mask
US5537648A (en) 1994-08-15 1996-07-16 International Business Machines Corporation Geometric autogeneration of "hard" phase-shift designs for VLSI
US5595843A (en) 1995-03-30 1997-01-21 Intel Corporation Layout methodology, mask set, and patterning method for phase-shifting lithography
US5663017A (en) 1995-06-07 1997-09-02 Lsi Logic Corporation Optical corrective techniques with reticle formation and reticle stitching to provide design flexibility
US6228539B1 (en) * 1996-09-18 2001-05-08 Numerical Technologies, Inc. Phase shifting circuit manufacture method and apparatus
US5858580A (en) 1997-09-17 1999-01-12 Numerical Technologies, Inc. Phase shifting circuit manufacture method and apparatus
US5807649A (en) 1996-10-31 1998-09-15 International Business Machines Corporation Lithographic patterning method and mask set therefor with light field trim mask
US5795685A (en) 1997-01-14 1998-08-18 International Business Machines Corporation Simple repair method for phase shifting masks
US5883813A (en) 1997-03-04 1999-03-16 International Business Machines Corporation Automatic generation of phase shift masks using net coloring
US6057063A (en) * 1997-04-14 2000-05-02 International Business Machines Corporation Phase shifted mask design system, phase shifted mask and VLSI circuit devices manufactured therewith
JP3307313B2 (ja) 1998-01-23 2002-07-24 ソニー株式会社 パターン生成方法及びその装置
US6120952A (en) 1998-10-01 2000-09-19 Micron Technology, Inc. Methods of reducing proximity effects in lithographic processes

Also Published As

Publication number Publication date
US6335128B1 (en) 2002-01-01
JP4218972B2 (ja) 2009-02-04
JP3916462B2 (ja) 2007-05-16
KR20020041814A (ko) 2002-06-03
EP1218798A1 (en) 2002-07-03
EP1218798B1 (en) 2006-10-18
US6455205B1 (en) 2002-09-24
ATE343157T1 (de) 2006-11-15
AU6388700A (en) 2001-04-30
JP2003510652A (ja) 2003-03-18
JP2006178498A (ja) 2006-07-06
WO2001023961A1 (en) 2001-04-05
DE60031429D1 (de) 2006-11-30
DE60031429T2 (de) 2007-08-30
US20020081500A1 (en) 2002-06-27

Similar Documents

Publication Publication Date Title
KR100473197B1 (ko) 집적회로를 위한 위상 시프트 및 트림 마스크를 결정하는방법 및 장치
JP4104574B2 (ja) エッジ・フラグメントのタグ付けを使用してエッジ配置歪みを補正するサブミクロンic設計のための改善された方法および装置
US7103870B2 (en) Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI
US5847421A (en) Logic cell having efficient optical proximity effect correction
US7386433B2 (en) Using a suggested solution to speed up a process for simulating and correcting an integrated circuit layout
US6787459B2 (en) Method for fabricating a semiconductor device
US6978437B1 (en) Photomask for eliminating antenna effects in an integrated circuit and integrated circuit manufacture with same
JP4700898B2 (ja) 移相器の拡張によるトランジスタエンドキャップにおけるラインエンド収縮の緩和
US7594216B2 (en) Method and system for forming a mask pattern, method of manufacturing a semiconductor device, system forming a mask pattern on data, cell library and method of forming a photomask
US20060236298A1 (en) Convergence technique for model-based optical and process correction
JP2000112114A (ja) 半導体装置及び半導体装置の製造方法
JP2006527398A (ja) レチクルを設計し、半導体素子をレチクルで作製する方法
US6698007B2 (en) Method and apparatus for resolving coloring conflicts between phase shifters
US7859645B2 (en) Masks and methods of manufacture thereof
US7005215B2 (en) Mask repair using multiple exposures
US20020108098A1 (en) Method for correcting optical proximity effects
JP3119202B2 (ja) マスクパターン自動発生方法およびマスク
US6605481B1 (en) Facilitating an adjustable level of phase shifting during an optical lithography process for manufacturing an integrated circuit
US20030188283A1 (en) Method and apparatus for identifying an identical cell in an IC layout with an existing solution
CN113093470B (zh) 基于平面型全耗尽绝缘体上硅器件的图形解析能力的提升方法
JP3603027B6 (ja) エッジ・フラグメントのタグ付けを使用してエッジ配置歪みを補正するサブミクロンic設計のための改善された方法および装置
Yan et al. A new method for model based frugal OPC

Legal Events

Date Code Title Description
A201 Request for examination
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

FPAY Annual fee payment

Payment date: 20130130

Year of fee payment: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

FPAY Annual fee payment

Payment date: 20140129

Year of fee payment: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

FPAY Annual fee payment

Payment date: 20141222

Year of fee payment: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

FPAY Annual fee payment

Payment date: 20151230

Year of fee payment: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

FPAY Annual fee payment

Payment date: 20161229

Year of fee payment: 13

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 13

FPAY Annual fee payment

Payment date: 20180102

Year of fee payment: 14

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 14

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20190216

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20190216

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000