KR100451487B1 - 반도체웨이퍼에칭방법 - Google Patents

반도체웨이퍼에칭방법 Download PDF

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Publication number
KR100451487B1
KR100451487B1 KR10-1998-0706372A KR19980706372A KR100451487B1 KR 100451487 B1 KR100451487 B1 KR 100451487B1 KR 19980706372 A KR19980706372 A KR 19980706372A KR 100451487 B1 KR100451487 B1 KR 100451487B1
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KR
South Korea
Prior art keywords
layer
chemical
etching
tin
etch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-1998-0706372A
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English (en)
Korean (ko)
Other versions
KR19990082633A (ko
Inventor
수잔 씨. 아브라함
Original Assignee
램 리서치 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 램 리서치 코포레이션 filed Critical 램 리서치 코포레이션
Publication of KR19990082633A publication Critical patent/KR19990082633A/ko
Application granted granted Critical
Publication of KR100451487B1 publication Critical patent/KR100451487B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/53—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone involving the removal of at least part of the materials of the treated article, e.g. etching, drying of hardened concrete
    • C04B41/5338—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/952—Utilizing antireflective layer

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Materials Engineering (AREA)
  • Structural Engineering (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR10-1998-0706372A 1996-02-15 1997-02-14 반도체웨이퍼에칭방법 Expired - Fee Related KR100451487B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US8/602,251 1996-02-15
US08/602,251 1996-02-15
US08/602,251 US6004884A (en) 1996-02-15 1996-02-15 Methods and apparatus for etching semiconductor wafers

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR10-2003-7016594A Division KR100491199B1 (ko) 1996-02-15 1997-02-14 반도체 웨이퍼 에칭에 의한 집적 회로

Publications (2)

Publication Number Publication Date
KR19990082633A KR19990082633A (ko) 1999-11-25
KR100451487B1 true KR100451487B1 (ko) 2004-12-08

Family

ID=24410621

Family Applications (2)

Application Number Title Priority Date Filing Date
KR10-2003-7016594A Expired - Fee Related KR100491199B1 (ko) 1996-02-15 1997-02-14 반도체 웨이퍼 에칭에 의한 집적 회로
KR10-1998-0706372A Expired - Fee Related KR100451487B1 (ko) 1996-02-15 1997-02-14 반도체웨이퍼에칭방법

Family Applications Before (1)

Application Number Title Priority Date Filing Date
KR10-2003-7016594A Expired - Fee Related KR100491199B1 (ko) 1996-02-15 1997-02-14 반도체 웨이퍼 에칭에 의한 집적 회로

Country Status (7)

Country Link
US (1) US6004884A (enExample)
EP (1) EP0880799B1 (enExample)
JP (1) JP3957319B2 (enExample)
KR (2) KR100491199B1 (enExample)
DE (1) DE69718142T2 (enExample)
TW (1) TW287304B (enExample)
WO (1) WO1997030472A1 (enExample)

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US6004884A (en) 1999-12-21
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TW287304B (en) 1996-10-01
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JP3957319B2 (ja) 2007-08-15
KR19990082633A (ko) 1999-11-25
DE69718142T2 (de) 2003-08-21
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