KR100392901B1 - 비대칭약간도프된드레인(lcd)mos소자의제조방법 - Google Patents
비대칭약간도프된드레인(lcd)mos소자의제조방법 Download PDFInfo
- Publication number
- KR100392901B1 KR100392901B1 KR1019970703986A KR19970703986A KR100392901B1 KR 100392901 B1 KR100392901 B1 KR 100392901B1 KR 1019970703986 A KR1019970703986 A KR 1019970703986A KR 19970703986 A KR19970703986 A KR 19970703986A KR 100392901 B1 KR100392901 B1 KR 100392901B1
- Authority
- KR
- South Korea
- Prior art keywords
- source
- gate structure
- region
- transistor
- mask layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/356,766 | 1994-12-15 | ||
| US08/356,766 US5580804A (en) | 1994-12-15 | 1994-12-15 | Method for fabricating true LDD devices in a MOS technology |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR980700683A KR980700683A (ko) | 1998-03-30 |
| KR100392901B1 true KR100392901B1 (ko) | 2003-11-20 |
Family
ID=23402876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019970703986A Expired - Fee Related KR100392901B1 (ko) | 1994-12-15 | 1995-11-22 | 비대칭약간도프된드레인(lcd)mos소자의제조방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5580804A (enExample) |
| EP (1) | EP0797841A1 (enExample) |
| JP (1) | JP4314346B2 (enExample) |
| KR (1) | KR100392901B1 (enExample) |
| TW (1) | TW279262B (enExample) |
| WO (1) | WO1996019010A1 (enExample) |
Families Citing this family (41)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100212455B1 (ko) * | 1996-11-04 | 1999-08-02 | 정선종 | 이중 게이트 구조의 반도체 소자 제조 방법 |
| US5900666A (en) * | 1996-12-03 | 1999-05-04 | Advanced Micro Devices, Inc. | Ultra-short transistor fabrication scheme for enhanced reliability |
| US5926714A (en) * | 1996-12-03 | 1999-07-20 | Advanced Micro Devices, Inc. | Detached drain MOSFET |
| US6020232A (en) * | 1996-12-03 | 2000-02-01 | Advanced Micro Devices, Inc. | Process of fabricating transistors having source and drain regions laterally displaced from the transistors gate |
| US5898202A (en) * | 1996-12-03 | 1999-04-27 | Advanced Micro Devices, Inc. | Selective spacer formation for optimized silicon area reduction |
| US5834355A (en) * | 1996-12-31 | 1998-11-10 | Intel Corporation | Method for implanting halo structures using removable spacer |
| US5905210A (en) * | 1997-01-09 | 1999-05-18 | Automotive Systems Laboratory, Inc. | Villari effect seat weight sensor |
| US6039345A (en) * | 1998-01-16 | 2000-03-21 | Automotive Systems Laboratory, Inc. | System and method for sensing vehicle door edge movement |
| JP4527814B2 (ja) * | 1997-06-11 | 2010-08-18 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| US5925914A (en) * | 1997-10-06 | 1999-07-20 | Advanced Micro Devices | Asymmetric S/D structure to improve transistor performance by reducing Miller capacitance |
| US6372590B1 (en) | 1997-10-15 | 2002-04-16 | Advanced Micro Devices, Inc. | Method for making transistor having reduced series resistance |
| US5918128A (en) * | 1998-06-08 | 1999-06-29 | Advanced Micro Devices, Inc. | Reduced channel length for a high performance CMOS transistor |
| US6124610A (en) | 1998-06-26 | 2000-09-26 | Advanced Micro Devices, Inc. | Isotropically etching sidewall spacers to be used for both an NMOS source/drain implant and a PMOS LDD implant |
| US6153455A (en) | 1998-10-13 | 2000-11-28 | Advanced Micro Devices | Method of fabricating ultra shallow junction CMOS transistors with nitride disposable spacer |
| US6362054B1 (en) | 2000-03-13 | 2002-03-26 | Agere Systems Guardian Corp. | Method for fabricating MOS device with halo implanted region |
| WO2001071804A2 (en) * | 2000-03-22 | 2001-09-27 | The Board Of Trustees Of The University Of Illinois | Lateral asymmetric lightly doped drain mosfet |
| US6448121B1 (en) * | 2000-05-31 | 2002-09-10 | Texas Instruments Incorporated | High threshold PMOS transistor in a surface-channel process |
| US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
| US6465307B1 (en) * | 2001-11-30 | 2002-10-15 | Texas Instruments Incorporated | Method for manufacturing an asymmetric I/O transistor |
| DE10224956A1 (de) * | 2002-06-05 | 2004-01-08 | Infineon Technologies Ag | Verfahren zur Einstellung der Einsatzspannung eines Feldeffekttansistors, Feldeffekttransistor sowie integrierte Schaltung |
| US7049667B2 (en) | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
| AU2003293540A1 (en) * | 2002-12-13 | 2004-07-09 | Raytheon Company | Integrated circuit modification using well implants |
| US6746924B1 (en) | 2003-02-27 | 2004-06-08 | International Business Machines Corporation | Method of forming asymmetric extension mosfet using a drain side spacer |
| US6916716B1 (en) * | 2003-10-24 | 2005-07-12 | Advanced Micro Devices, Inc. | Asymmetric halo implants |
| US7176095B1 (en) | 2004-03-01 | 2007-02-13 | Advanced Micro Devices, Inc. | Bi-modal halo implantation |
| US7064396B2 (en) * | 2004-03-01 | 2006-06-20 | Freescale Semiconductor, Inc. | Integrated circuit with multiple spacer insulating region widths |
| US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
| US7144782B1 (en) * | 2004-07-02 | 2006-12-05 | Advanced Micro Devices, Inc. | Simplified masking for asymmetric halo |
| US8168487B2 (en) | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
| US20090090980A1 (en) * | 2007-10-08 | 2009-04-09 | Mingchu King | Asymmetric-ldd mos device |
| US7974119B2 (en) | 2008-07-10 | 2011-07-05 | Seagate Technology Llc | Transmission gate-based spin-transfer torque memory unit |
| US9030867B2 (en) | 2008-10-20 | 2015-05-12 | Seagate Technology Llc | Bipolar CMOS select device for resistive sense memory |
| US7936580B2 (en) | 2008-10-20 | 2011-05-03 | Seagate Technology Llc | MRAM diode array and access method |
| US7936583B2 (en) | 2008-10-30 | 2011-05-03 | Seagate Technology Llc | Variable resistive memory punchthrough access method |
| US7825478B2 (en) * | 2008-11-07 | 2010-11-02 | Seagate Technology Llc | Polarity dependent switch for resistive sense memory |
| US8178864B2 (en) | 2008-11-18 | 2012-05-15 | Seagate Technology Llc | Asymmetric barrier diode |
| US8203869B2 (en) | 2008-12-02 | 2012-06-19 | Seagate Technology Llc | Bit line charge accumulation sensing for resistive changing memory |
| US8159856B2 (en) | 2009-07-07 | 2012-04-17 | Seagate Technology Llc | Bipolar select device for resistive sense memory |
| US8158964B2 (en) | 2009-07-13 | 2012-04-17 | Seagate Technology Llc | Schottky diode switch and memory units containing the same |
| US9000525B2 (en) * | 2010-05-19 | 2015-04-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for alignment marks |
| US8648426B2 (en) | 2010-12-17 | 2014-02-11 | Seagate Technology Llc | Tunneling transistors |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5349225A (en) * | 1993-04-12 | 1994-09-20 | Texas Instruments Incorporated | Field effect transistor with a lightly doped drain |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4318216A (en) * | 1978-11-13 | 1982-03-09 | Rca Corporation | Extended drain self-aligned silicon gate MOSFET |
| JPS60182171A (ja) * | 1984-02-29 | 1985-09-17 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
| JPH01186676A (ja) * | 1988-01-14 | 1989-07-26 | Pioneer Electron Corp | 電界効果トランジスタ |
| US4965213A (en) * | 1988-02-01 | 1990-10-23 | Texas Instruments Incorporated | Silicon-on-insulator transistor with body node to source node connection |
| JP2549689B2 (ja) * | 1988-02-19 | 1996-10-30 | 三菱電機株式会社 | Mosトランジスタ及びその製造方法 |
| US5144390A (en) * | 1988-09-02 | 1992-09-01 | Texas Instruments Incorporated | Silicon-on insulator transistor with internal body node to source node connection |
| DE69224453T2 (de) * | 1991-10-01 | 1998-09-24 | Nippon Electric Co | Verfahren zur Herstellung von einem LDD-MOSFET |
| JPH05129325A (ja) * | 1991-10-31 | 1993-05-25 | Sanyo Electric Co Ltd | 半導体デバイス |
| JP3221766B2 (ja) * | 1993-04-23 | 2001-10-22 | 三菱電機株式会社 | 電界効果トランジスタの製造方法 |
| US5432366A (en) * | 1993-05-28 | 1995-07-11 | Board Of Regents Of The University Of Texas System | P-I-N MOSFET for ULSI applications |
| US5409853A (en) * | 1994-05-20 | 1995-04-25 | International Business Machines Corporation | Process of making silicided contacts for semiconductor devices |
-
1994
- 1994-12-15 US US08/356,766 patent/US5580804A/en not_active Expired - Lifetime
-
1995
- 1995-07-29 TW TW084107883A patent/TW279262B/zh not_active IP Right Cessation
- 1995-11-22 WO PCT/US1995/015021 patent/WO1996019010A1/en not_active Ceased
- 1995-11-22 KR KR1019970703986A patent/KR100392901B1/ko not_active Expired - Fee Related
- 1995-11-22 EP EP95940745A patent/EP0797841A1/en not_active Withdrawn
- 1995-11-22 JP JP51887296A patent/JP4314346B2/ja not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5349225A (en) * | 1993-04-12 | 1994-09-20 | Texas Instruments Incorporated | Field effect transistor with a lightly doped drain |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10510951A (ja) | 1998-10-20 |
| WO1996019010A1 (en) | 1996-06-20 |
| US5580804A (en) | 1996-12-03 |
| EP0797841A1 (en) | 1997-10-01 |
| KR980700683A (ko) | 1998-03-30 |
| TW279262B (enExample) | 1996-06-21 |
| JP4314346B2 (ja) | 2009-08-12 |
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St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
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| P13-X000 | Application amended |
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| E701 | Decision to grant or registration of patent right | ||
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