KR100389023B1 - Apparatus and Method for Correcting Gamma Voltage of Liquid Crystal Display - Google Patents

Abstract

The present invention relates to a gamma voltage correction method and apparatus of a liquid crystal display device capable of compensating a luminance difference between scan lines using an alternating gamma voltage.

A gamma voltage correction method of a liquid crystal display of the present invention includes the steps of generating a line pulse toggled every predetermined horizontal period; Generating a plurality of direct current gamma voltages having different voltage levels according to the video signal, and adding the line pulses to the direct current gamma voltages to generate alternating gamma voltages in which the potential is alternately changed in the predetermined horizontal period. Characterized in that it comprises a.

According to the present invention, the gamma voltage is corrected by an alternating gamma voltage whose potential changes every predetermined horizontal period, thereby making it possible to compensate the luminance difference between lines in the 2-dot inversion scheme.

Description

Apparatus and Method for Correcting Gamma Voltage of Liquid Crystal Display

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a method and apparatus for correcting a gamma voltage of a liquid crystal display device capable of compensating a difference in luminance between lines by using an AC gamma voltage.

Conventional liquid crystal display devices display an image by adjusting the light transmittance of the liquid crystal in accordance with an image signal. In such a liquid crystal display, a gamma characteristic in which the gray level of an image does not change linearly but varies linearly with the voltage level of an image signal is displayed. This is due to the fact that the light transmittance of the liquid crystal does not change linearly with the voltage level of the image signal, and the gray scale of the image does not change linearly with the light transmittance of the liquid crystal. In order to prevent image deterioration due to this gamma characteristic, gamma voltages are used to change the intervals between voltage levels of the video signal differently. In other words, the liquid crystal display corrects the gamma characteristic by adding a preset gamma voltage as an offset voltage to the voltage level of the image signal so as to have a different level according to the voltage level of the image signal.

To this end, the liquid crystal display device includes a liquid crystal panel 2 in which liquid crystal cells are arranged in a matrix form as shown in FIG. 1, and a gate driver for driving gate lines GL1 to GLn of the liquid crystal panel 2. 4), a data driver 6 for driving the data lines DL1 to DLm of the liquid crystal panel 2, a gamma voltage generator 8 for supplying a gamma voltage to the data driver 6, A control unit 10 for controlling the gate driver 4 and the data driver 6 is provided.

In FIG. 1, the liquid crystal panel 2 is a thin film transistor TFT formed at intersections of liquid crystal cells arranged in a matrix form and n gate lines GL1 to GLn and m data lines DL1 to DLm. ). The thin film transistor TFT supplies a video signal from the data lines DL1 to DLm to the liquid crystal cell in response to the gate signal from the gate lines GL1 to GLn. The liquid crystal cell may be equivalently represented by a liquid crystal capacitor Clc including a common electrode facing the liquid crystal and a pixel electrode connected to the thin film transistor. In the liquid crystal cell, a storage capacitor Cst is formed to maintain the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged. The storage capacitor Cst is formed between the previous gate electrode and the pixel electrode. In addition, a plurality of parasitic capacitors are formed in the thin film transistor TFT and the liquid crystal cell, such as a parasitic capacitor Cpp between the pixel electrode and the next storage capacitor Cst. These parasitic capacitors cause the data voltage charged in the liquid crystal capacitor Clc to vary by a predetermined amount. The gate driver 4 sequentially supplies gate signals to the gate lines GL1 to GLn to drive the thin film transistors TFT connected to the corresponding gate line. The data driver 6 converts the video data signal into an analog signal and supplies one horizontal line of video signal to the data lines DL1 through DLn during one horizontal period in which the gate signal is supplied to the gate line GL. At this time, the gamma voltage generator 8 supplies the data driver 6 with a preset DC gamma voltage to have a different voltage level according to the voltage level of the video data signal. Accordingly, the data driver 6 adds the gamma voltage from the gamma voltage generator 8 to the video signal to supply the data lines DL1 to DLn so that the gamma characteristic of the liquid crystal display device is corrected. The controller 10 controls the driving timing of the gate driver 4 and the data driver 6 in response to clock signals and horizontal and vertical synchronization signals input through the input line 11. In other words, the controller 10 generates and supplies a gate clock signal, a gate control signal, a gate start pulse, and the like to the gate driver 4 in response to the clock signal and the horizontal and vertical synchronization signals. In addition, the controller 10 generates a data clock signal, a data control signal, and the like in response to the input clock signal and the horizontal and vertical synchronization signals Hsync and Vsync, and supplies the same to the data driver signal. The red (R), green (G), and blue (B) video data input through the input line 11 are supplied to the data driver 6.

In such a liquid crystal display, inversion driving methods such as a frame inversion system, a line column inversion system, and a dot inversion system are used to drive liquid crystal cells on a liquid crystal panel. Used. The liquid crystal panel driving method of the frame inversion method inverts the polarity of the data signal supplied to the liquid crystal cells on the liquid crystal panel every time the frame is changed. In the liquid crystal panel driving method of the line inversion method, the polarities of the data signals supplied to the liquid crystal cells are reversed according to a line (column) on the liquid crystal panel. The dot inversion scheme allows each of the liquid crystal cells on the liquid crystal panel to be supplied with a data signal having a polarity opposite to that of the data signals supplied to adjacent liquid crystal cells in the vertical and horizontal directions. The polarities of the data signals supplied to the fields are reversed. Of these inversion driving methods, the dot inversion method provides an image having excellent image quality compared to the frame and line inversion methods. The inversion driving is performed in response to the data driver 4 in response to the polarity inversion signal supplied from the controller 10 to the data driver 4.

The gamma voltage generator 8 is composed of a positive portion for generating a positive gamma voltage and a negative portion for generating a negative gamma voltage corresponding to the inversion driving method. The configuration of the positive electrode portion is the same as that of FIG. The positive polarity portion is connected to the first to sixth resistors R1 to R6 connected in series to the voltage supply source Vdd and the divided points N1 to N5 of the first to sixth resistors R1 to R6, respectively. Buffers 12 are provided. The first to sixth resistors R1 to R6 divide the power supply voltage Vdd according to the resistance ratio to generate the first to fifth gamma voltages Vγ1 to Vγ5 at each of the five voltage dividing points N1 to N5. do. The output buffer 12 is configured as a voltage follower to buffer and output the gamma voltages Vγ1 to Vγ5 from the first to fifth voltage dividing points N1 to N5. The negative electrode portion also generates sixth to tenth negative polarity gamma voltages Vγ6 to Vγ10 divided in accordance with a resistance ratio connected in series with the negative voltage source.

A typical gamma voltage level output from the gamma voltage generator 8 having such a configuration is as shown in FIG. In FIG. 3, the gamma voltage Vγ having a low potential difference corresponds to gray close to white based on the common voltage Vcom, and the gamma voltage Vγ having a high potential difference corresponds to gray close to black. In other words, the fifth and sixth gamma voltages Vγ5 and Vγ6 having low potential differences with the common voltage Vcom are white gray and the first and tenth gamma voltages Vγ10 having high potential differences with the common voltage Vcom. The third and eighth gamma voltages Vγ8 having a silver black gray and a potential difference between the common voltage Vcom and the middle are output corresponding to the intermediate gray.

Such liquid crystal displays are generally driven by a frame frequency of 60 Hz. However, in a system requiring low power consumption such as a notebook computer, it is required to lower the frame frequency to 50 to 30 Hz. As the frame frequency is lowered, the flicker phenomenon occurs in the dot inversion method that provides excellent image quality among the inversion methods. Thus, the method of driving the liquid crystal panel of the two-dot inversion method as shown in FIGS. 4A and 4B is proposed. It became.

4A and 4B illustrate data signal polarities supplied to liquid crystal cells of a liquid crystal panel divided into odd frames and even frames by a 2-dot inversion liquid crystal panel driving method. In the odd and even frames shown in Figs. 4A and 4B, the two-dot inversion scheme changes the polarity of the data signal in the horizontal direction, as in the conventional dot inversion scheme, in the liquid crystal cell, that is, in the unit of dots. It can be seen that the drive is changed in units of 2 dots in the direction. While the two-dot inversion method has the advantage that the flicker phenomenon is reduced compared to the dot inversion method in a commercial screen driven at a frame frequency of 50 Hz, the horizontal line is generated every two scanning lines depending on the luminance difference between the scanning lines. Have.

5A and 5B illustrate horizontal lines in the odd frame and the even frame, which are caused by the two-dot inversion liquid crystal panel driving method. 5A and 5B, when the polarity of the liquid crystal cell is changed every two scan lines in the vertical direction, a horizontal phenomenon occurs due to the luminance difference between the odd scan lines G1 and the even scan lines G2. This is because, in the case of the 2-dot inversion method, the coupling effect of the pixel voltage due to the parasitic capacitor Cpp formed between the pixel electrode and the storage electrode of the liquid crystal cell adjacent in the vertical direction occurs in the liquid crystal cells. .

In detail, in the case of the dot inversion method, as shown in FIG. 6, the coupling effect of the pixel voltage due to the parasitic capacitor Cpp, that is, the variation ΔVpp of the pixel voltage occurs in all liquid crystal cells. 6 shows data voltages Vd [n] and Vd [n + charged in the nth liquid crystal cell and the n + 1th liquid crystal cell of the next line in response to the gate signals Vg [n] and Vg [n + 1]. 1]) shows the change characteristics.

In FIG. 6, ΔVp changes until the data voltage Vd charged in the liquid crystal cell is supplied in the supply period of the gate high voltage Vgh in the current frame M until the data voltage Vd of the next frame M + 1 is supplied. It is generated by the coupling effect of parasitic capacitors Cgs and Cgd formed inside the thin film transistor at a feed through voltage. [Delta] Vpp is added to the feed throw voltage [Delta] Vp and is generated by the coupling effect of the parasitic capacitor Cpp formed between the pixel electrode and the next storage electrode. Referring to FIG. 6, the data voltage Vd [n] of positive polarity (+) is charged in the nth liquid crystal cell in the current frame M, and the data voltage of negative polarity (+) is provided in the n + 1th liquid crystal cell. (Vd [n + 1]) is charged, and the data voltages Vd [n] and Vd [n + 1] polarities are reversed in the next frame M + 1. In other words, in all liquid crystal cells, a potential change occurs in the liquid crystal cell of the next scan line in a direction opposite to the polarity of the data voltage currently charged by dot inversion driving. Accordingly, in all liquid crystal cells, the same voltage change value ΔVpp is generated in the opposite direction to the polarity of the charged data voltage due to the influence of the parasitic capacitor Cpp. As a result, the luminance difference between the scan lines does not occur in the dot inversion driving.

On the other hand, in the case of the 2-dot inversion driving method, as shown in FIG. 7, the variation ΔVpp of the pixel voltage due to the parasitic capacitor Cpp is different for each scan line. 7 shows the [m, n] th and [m + 1, n] th liquid crystal cells and the [m, n + 1] th of the next line in response to the gate signals Vg [n] and Vg [n + 1]. And data voltages Vd [m, n], Vd [m + 1, n], Vd [m, n + 1], and Vd [m + 1, which are charged in the [m + 1, n + 1] th liquid crystal cell. n + 1]).

Referring to FIG. 7, the data voltages Vd [m, n] and Vd [m + of the positive polarity (+) in the [m, n] -th and [m, n + 1] -th liquid crystal cells in the current frame M 1, n]) are charged, and the negative data voltages Vd [m, n + 1], Vd are stored in the [m, n + 1] th and [m + 1, n + 1] th liquid crystal cells. [m + 1, n + 1] is charged, and in the next frame M + 1, the data voltages Vd [m, n], Vd [m + 1, n], and Vd [m, n + 1] , Vd [m + 1, n + 1]) is reversed. In other words, in the liquid crystal cells [m, n] and [m, n + 1] included in the odd scan line G1, the adjacent liquid crystal cells [m, n + 1] and [ m + 1, n + 1]) are applied with the same polarity data voltage. Accordingly, in the liquid crystal cells [m, n] and [m, n + 1], the voltage variation value ΔVpp1 is generated in the same direction as the polarity of the data voltage currently charged by the parasitic capacitor Cpp. However, in the liquid crystal cells [m, n + 1], [m + 1, n + 1] included in the even-numbered scan line G2, a data voltage of opposite polarity is applied to the liquid crystal cells adjacent in the vertical direction. do. Accordingly, in the liquid crystal cells [m, n + 1], [m + 1, n + 1], the voltage fluctuation value ΔVpp2 is opposite to the polarity of the data voltage currently charged by the parasitic capacitor Cpp. Occurs. As described above, as the voltage fluctuation values ΔVpp1 and ΔVpp2 of the parasitic capacitor Cpp are different in the radix scan line G1 and the even scan line G2, the radix scan line G1 and the even scan line are different. The luminance difference occurs between (G2). In detail, in the normal white mode, the odd-numbered scan lines G1, in which the data voltage charged by the voltage change value ΔVpp1 increases with respect to the common voltage Vcom due to the same polarity voltage as the next scan line, appear dark, and then The even-numbered scan lines G2 in which the data voltage charged by the voltage change value ΔVpp1 decreases with respect to the common voltage Vcom due to the charging of the polarity voltage opposite to the scan line become bright.

As described above, in the two-dot driving method, the luminance difference is generated between the scanning lines due to the difference in the parasitic capacitor (Cpp) coupling effect, so that a horizontal line phenomenon occurs and display quality is deteriorated. In particular, the horizontal line phenomenon has a problem of more clearly seen in the halftone.

Accordingly, an object of the present invention is to provide a method and apparatus for correcting a gamma voltage of a liquid crystal display device capable of compensating for a luminance difference between scan lines using an alternating gamma voltage.

1 is a block diagram showing the configuration of a conventional liquid crystal display device.

FIG. 2 is an equivalent circuit diagram of the gamma voltage generator shown in FIG. 1. FIG.

FIG. 3 is a waveform diagram illustrating exemplary gamma voltages output from the gamma voltage generator shown in FIG. 2.

4A and 4B are diagrams showing polar patterns of data signals supplied to liquid crystal cells of a liquid crystal panel by a 2-dot inversion driving method.

5A and 5B are diagrams showing a horizontal line phenomenon by a 2-dot inversion driving method.

6 is a characteristic diagram of change of data signals charged in liquid crystal cells by a dot inversion driving method.

7 is a characteristic diagram of change of data signals charged in liquid crystal cells by a 2-dot inversion driving method.

8 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

9 is a detailed circuit diagram of an AC gamma voltage generator configured in the gamma voltage generator shown in FIG. 8;

10 is a waveform diagram of input and output signals in the AC gamma voltage generator shown in FIG. 9;

FIG. 11 is a detailed circuit diagram of an AC gamma voltage generator according to another embodiment of the gamma voltage generator shown in FIG. 8. FIG.

12 is an input / output signal waveform diagram of the AC gamma voltage generator shown in FIG. 11;

FIG. 13 is a diagram illustrating a gamma voltage generator according to the exemplary embodiment of FIG. 8. FIG.

14 is a gamma voltage waveform diagram according to the gamma voltage correction method according to the first embodiment of the present invention.

15 is a gamma voltage waveform diagram according to a gamma voltage correction method according to a second embodiment of the present invention.

16 is a gamma voltage waveform diagram according to a gamma voltage correction method according to a third embodiment of the present invention.

17 is a configuration diagram of a gamma voltage generator according to another exemplary embodiment shown in FIG. 8.

18 is a gamma voltage waveform diagram according to a gamma voltage correction method according to a fourth embodiment of the present invention.

19 is a gamma voltage waveform diagram according to a gamma voltage correction method according to a fifth embodiment of the present invention.

20 is a gamma voltage waveform diagram according to a gamma voltage correction method according to a sixth embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

2, 34: liquid crystal panel 4, 32: gate driver

6, 30: data driver 8: gamma voltage generator

10, 28: control unit 12, 36: output buffer

20: AC gamma voltage generator 22: DC gamma voltage generator

24: line pulse generator 26: adder

25, 29: line pulse generator

In order to achieve the above object, a gamma voltage correction method of a liquid crystal display according to the present invention comprises the steps of generating a line pulse toggled every predetermined horizontal period; Generating a plurality of direct current gamma voltages having different voltage levels according to the video signal, and adding the line pulses to the direct current gamma voltages to generate alternating gamma voltages in which the potential is alternately changed in the predetermined horizontal period. Characterized in that it comprises a.

A gamma voltage correcting apparatus of a liquid crystal display according to the present invention includes: line pulse generating means for generating line pulses to be toggled every predetermined horizontal period; A gamma voltage which generates a plurality of DC gamma voltages having different voltage levels according to the video signal, adds line pulses to the DC gamma voltages, and generates AC gamma voltages in which the potential is alternately changed in the predetermined horizontal period. Generating means; And control means for generating a control signal for controlling the drive timing of the line pulse generating means.

Other objects and advantages of the present invention in addition to the above objects will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 8 to 20.

Before describing the embodiments of the present invention, the technical spirit of the present invention will be briefly described as follows. In the conventional two-dot inversion liquid crystal panel driving method, the normal white mode causes horizontal lines to appear dark in the odd scan lines where the data voltage is charged with the same polarity as the next stage, and the data voltage is charged with a different polarity than the next stage. In the even-numbered scanning lines, it can be seen that the bright phenomenon is fixed. In order to prevent such a horizontal line, a method of supplying a small liquid crystal driving voltage to the same luminance when driving the odd scan lines and a large supply of the liquid crystal driving voltage to the same luminance when driving the even scan lines may be considered. As described above, the gamma voltage is used in the present invention as a method of adjusting the liquid crystal driving voltage for each scan line. Specifically, in the present invention, the voltage fluctuation value of the parasitic capacitor Cpp is increased by supplying a small gamma voltage when driving dark scan lines, and by supplying a large gamma voltage when driving bright scan lines. The difference of (ΔVpp) is corrected. In other words, in the present invention, the difference in the voltage fluctuation value? Vpp due to the parasitic capacitor Cpp is corrected by using the AC gamma voltage whose gamma voltage changes every scan line, that is, in one horizontal period.

To this end, the liquid crystal display according to the exemplary embodiment of the present invention has a liquid crystal panel 34 in which liquid crystal cells are arranged in a matrix form as shown in FIG. 8, and gate lines GL1 to GLn of the liquid crystal panel 34. Supplies an AC gamma voltage (Vγ) to the gate driver 32 for driving the LED, the data driver 30 for driving the data lines DL1 to DLm of the liquid crystal panel 34, and the data driver 30. An AC gamma voltage generator 20, a gate driver 32, a data driver 30, and a controller 28 for controlling driving timing of the AC gamma voltage generator 20 are provided.

In FIG. 8, the liquid crystal panel 34 includes liquid crystal cells arranged in a matrix and thin film transistors formed at intersections of n gate lines GL1 to GLn and m data lines DL1 to DLm, respectively. do. The thin film transistor supplies a video signal from the data lines DL1 to DLm to the liquid crystal cell in response to the gate signal from the gate lines GL1 to GLn. The liquid crystal cell may be equivalently represented by a liquid crystal capacitor Clc including a common electrode facing the liquid crystal and a pixel electrode connected to the thin film transistor. In the liquid crystal cell, a storage capacitor Cst is formed to maintain the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged. The storage capacitor Cst is formed between the previous gate electrode and the pixel electrode. In addition, a plurality of parasitic capacitors are formed in the thin film transistor TFT and the liquid crystal cell, such as a parasitic capacitor Cpp between the pixel electrode and the next storage capacitor Cst. These parasitic capacitors cause the data voltage charged in the liquid crystal capacitor Clc to vary by a predetermined amount. The gate driver 32 sequentially supplies gate signals to the gate lines GL1 to GLn to drive the thin film transistors connected to the corresponding gate lines. The data driver 30 converts an input video digital signal into an analog signal and outputs a video signal corresponding to one horizontal line during one horizontal period in which the gate signal is supplied to the gate lines GL1 through GLn. To feed. At this time, the AC gamma voltage generator 20 supplies the AC driver with a preset gamma voltage to the data driver 30 to have different offset voltages according to the voltage level of the video signal.

To this end, the AC gamma voltage generator 20 is connected to the gamma voltage generator 22 that generates a plurality of offset voltages, that is, the DC gamma voltage, and the controller 28, and is connected to the gamma voltage generator through the adder 26. It consists of the line pulse generation part 24 connected with the 22. The line pulse generator 24 generates a line pulse of one horizontal (1H) period in response to a control signal input from the controller 28. The gamma voltage generator 22 divides the supply power into a plurality of DC voltages using the divided resistors and outputs the DC gamma voltage as in the prior art. The line pulse from the line pulse generator 24 is added to the direct current gamma voltage from the gamma voltage generator 22 and output as the AC gamma voltage Vγ. Here, the adder 26 is implemented as a wired sum.

Here, the line pulses from the line pulse generator 24 may be added to or selectively added to all direct current gamma voltages from the gamma voltage generator 22. In other words, the AC gamma voltage may be supplied to all gamma voltages, or DC and gamma voltages may be selected and supplied according to the gamma voltage level. In the case of selectively supplying the AC gamma voltage, it is preferable to supply only the gamma voltage corresponding to the intermediate gray scale in which the horizontal phenomenon is prominent as the AC gamma voltage. Detailed configurations and embodiments of the gamma voltage generator 20 will be described later.

The data driver 30 adds an AC gamma voltage from the AC gamma voltage generator 8 to the video signal and supplies the data to the data lines DL1 to DLm, thereby correcting the gamma characteristic of the LCD. The controller 28 controls driving timing of the gate driver 32, the data driver 30, and the line pulse generator 24 in response to the clock signal input through the input line 27 and the horizontal and vertical synchronization signals. . In detail, the controller 28 generates a gate shift clock signal GSC, a gate control signal, a gate start pulse GSP, and the like in response to the input clock signal and the horizontal and vertical synchronization signals, and supplies the same to the gate driver 4. . In addition, the controller 28 generates a data clock signal, a data control signal, and the like in response to the clock signal and the horizontal and vertical synchronization signals, and supplies the input data to the data driver 6 and synchronizes the input line 27 with the data clock signal. Red (R), green (G), blue (B) video data input through the supply to the data driver (30). In addition, the controller 28 supplies control signals required for driving the line pulse generator 24, for example, vertical and horizontal synchronization signals, gate shift clocks GSC, and gate start pulses GSP.

FIG. 9 illustrates a detailed circuit configuration of an AC gamma voltage generator for generating one AC gamma voltage Vγ, and is included in the AC gamma voltage generator 20 shown in FIG. 8. FIG. 10 illustrates driving waveforms input and output from the AC gamma voltage generator shown in FIG. 9. The AC gamma voltage generator illustrated in FIG. 9 includes a line pulse generator 25 included in the line pulse generator 24 and a gamma voltage generator included in the gamma voltage generator 22 and connected to the line pulse generator 25. It consists of 23. The line pulse generator 25 is composed of a D flip-flop (D-FF) to generate a line pulse LP of one horizontal (1H) period as shown in FIG. 10. The gate shift clock GSC is input from the control unit 28 to the clock terminal CLK of the D flip-flop D-FF, and the gate start pulse GSP is input to the clear terminal CLR through the inverter INV. do. The output signal from the inverting output terminal Q 'is output to the input terminal D among the output terminals Q and Q' of the D flip-flop D-FF. The gate shift clock GSC is a clock signal that controls the shift operation of the shift register included in the gate driver 32 and is supplied in one horizontal (1H) period as shown in FIG. 10. The gate start pulse GSP is a control signal for starting the shift operation in the shift register of the gate driver 32 and is supplied in one vertical (1V) period as shown in FIG. 10. This gate start pulse GSP resets the D flip-flop D-FF in one vertical (1V) period. The D flip-flop D-FF is a gate shift clock as shown in FIG. 10 in response to an output signal of the inverted output terminal Q 'input to the input signals GSC and GSP and the input terminal D. FIG. The GSC outputs the line pulse LP divided into two divisions to the non-inverting output terminal Q. The input / output signals GSC, GSP, and LP in the D flip-flop D-FF typically have 3.3V as a high state potential. A resistor R11 connected in series with the output terminal Q of the D flip-flop D-FF lowers the voltage of the line pulse LP. The gamma voltage generator 23 is composed of voltage divider resistors R21 and R22 for dividing the supply voltage Vdd, and an output buffer 36 connected to the voltage divider point N between the voltage divider resistors R21 and R22. . The voltage dividing resistors R21 and R22 divide the supply voltage VdD according to the resistance ratio to generate a DC gamma voltage at the voltage dividing point N. At this voltage dividing point N, the line pulse LP from the line pulse generator 25 is added to the direct current gamma voltage and supplied to the output buffer 36 as an alternating gamma voltage Vγ. The output buffer 36 is configured as a voltage follower and buffers and outputs the AC gamma voltage Vγ from the voltage dividing point N. As shown in FIG. 10, the AC gamma voltage Vγ output from the output buffer 36 has an offset voltage equal to the DC gamma voltage and is output in a toggled fashion every one horizontal period 1H. As described above, the parasitic capacitor Cpp is used in the 2-dot inversion driving method as the AC gamma voltage Vγ, in which the potential varies alternately for each scan line, is supplied to the liquid crystal cells. By compensating for the difference in pixel voltage variation [Delta] Vpp, the luminance difference between the lines can be compensated.

FIG. 11 illustrates another embodiment of the AC gamma voltage generator configured in the AC gamma voltage generator 20 shown in FIG. 8, and FIG. 12 illustrates driving waveforms input and output from the AC gamma voltage generator shown in FIG. 11. Illustrated. In the AC gamma voltage generator illustrated in FIG. 11, the line pulse generator 29 lines the signal output from the non-inverting terminal Q by the D flip-flop D-FF of the line pulse generator 25 illustrated in FIG. 9. Unlike the supply of the pulse LP, the rest of the configuration is the same except that the signal output to the inverting terminal Q 'of the D flip-flop D-FF is used as the line pulse LP. Therefore, detailed description of the overlapping components will be omitted. The D flip-flop D-FF of the line pulse generator 29 shown in FIG. 11 responds to the output signal of the inverted output terminal Q 'input to the gate shift clock GSC and the input terminal D. As shown in FIG. 12, the non-inverting output terminal (2) is divided by the gate shift clock (GSC) and has a 180 degree phase difference, that is, a line pulse LP having a 180 degree phase difference with the line pulse LP shown in FIG. Q) will output. The gamma voltage generator 23 divides the supply voltage Vdd to generate a DC gamma voltage at the voltage dividing point N, and adds the line pulse LP from the line pulse generator 29 to the DC gamma voltage for output. The AC gamma voltage Vγ is output through the buffer 36. As shown in FIG. 12, the AC gamma voltage Vγ output through the output buffer 36 has an offset voltage equal to the DC gamma voltage and is output in a toggled fashion every one horizontal period 1H. In this way, the AC gamma voltage Vγ, in which the potential varies alternately every one horizontal period 1H, is supplied to the liquid crystal cells in addition to the data voltage, thereby changing the pixel voltage variation ΔVpp by the conventional parasitic capacitor Cpp. ) To compensate for the difference in luminance between the lines.

9 and 11, the horizontal flip signal of the same period is used for the D flip-flop D-FF of the line pulse generators 25 and 29 instead of the gate shift clock GSC or various other periods having one or more horizontal periods. The control signal can be input. In addition, instead of the gate start pulse GSP, a vertical synchronization signal having the same period may be used, or various other control signals having a period longer than one vertical period may be input. Here, when a control signal having i horizontal period of 1 horizontal period or more is input to the line pulse generators 25 and 29, a line pulse LP of a form toggled every i horizontal period is generated, and as a result, the AC gamma voltage ( Vγ) can also be supplied in a horizontal fashion, i.e., toggled per i line.

In this way, the method of driving the gamma voltage Vγ by alternating current is applied to all gamma voltage levels or selectively applied as necessary.

First, in order to supply all of the gamma voltages to the AC gamma voltage Vγ, the AC gamma voltage generator 20 shown in FIG. 8 has a detailed configuration as shown in FIG. 13. The AC gamma voltage generation unit 20 is generally composed of a positive portion for generating a positive gamma voltage and a negative portion for generating a negative gamma voltage. FIG. 13 shows a detailed configuration included in the positive polarity portion of the AC gamma voltage generator 20.

The positive polarity of the AC gamma voltage generator 20 shown in FIG. 13 is provided between the divided resistors R21 to R26 for dividing the supply voltage Vdd in order to supply all the gamma voltages to the AC gamma voltage Vγ. A line pulse generator 25 or 29 connected to each of the partial pressure points N1 to N5. The divided resistors R21 to R26 divide the supply voltage Vdd according to their resistance ratios so that different DC gamma voltages are generated at the five divided points N1 to N5. As described above, the line pulse generator 25 or 29 generates a line pulse LP that is toggled every one horizontal period 1H, that is, has two horizontal periods. Line pulses LP from the line pulse generator 25 or 29 are added to the direct current gamma voltage at each of the divided points N1 to N5 to generate positive AC gamma voltages Vγ1 to Vγ5 through the output buffer 36. Done. The negative polarity part also generates the negative AC gamma voltages Vγ6 to Vγ10 including the same configuration as that of FIG. 13 except that the polarity of the supply power source Vdd is different. Representative AC gamma voltages Vγ1, Vγ3, Vγ5, Vγ6, Vγ8, and Vγ10 output from the AC gamma voltage generator 20 including the positive and negative portions are illustrated in FIG. 13. In FIG. 13, the fifth and sixth gamma voltages Vγ5 and Vγ6 having a low potential difference based on the common voltage Vcom are white gray and the first and tenth gamma voltages Vγ10 having a high potential difference from the common voltage Vcom. ) Is black gray, and the third and eighth gamma voltages Vγ8 having an intermediate potential difference from the common voltage Vcom are used for gamma correction of the intermediate gray.

Alternatively, as shown in FIG. 15, the AC gamma voltages Vγ1 to Vγ5 may be generated only in the positive polarity portion, and the DC gamma voltages Vγ6 to Vγ10 may be generated in the negative polarity portion as in the prior art. This can be achieved by implementing the line pulse generators 25 and 29 connected to the voltage division points N1 to N5 of the gamma voltage generator, as shown in FIG. 13, and the negative electrode by the gamma voltage generator. Do.

On the other hand, as shown in FIG. 16, the AC gamma voltages Vγ5 to Vγ10 may be generated only in the negative polarity portion, and the DC gamma voltages Vγ1 to Vγ5 may be generated in the negative polarity portion as in the prior art. This can be achieved by implementing the negative polarity part such that the line pulse generators 25 and 29 are connected at every divided point N1 to N5 of the gamma voltage generation part as shown in FIG. 13, and the positive polarity part is implemented by the conventional gamma voltage generation part. Do.

Secondly, in order to selectively supply the AC gamma voltage according to the gamma voltage level, the AC gamma voltage generator 20 shown in FIG. 8 has a detailed configuration as shown in FIG. 17. In the case of selectively supplying the AC gamma voltage, it is preferable to supply only the gamma voltages Vγ3 and Vγ8 corresponding to the intermediate gray in which the horizontal phenomenon is prominent. To this end, the positive polarity of the AC gamma voltage generator 20 generates a third DC gamma voltage among the voltage dividing points N1 to N5 between the voltage dividing resistors R21 to R26 to divide the supply voltage Vdd. A line pulse generator 25 or 29 is connected to only the partial pressure point N3. This configuration has the advantage that the circuit configuration is simpler than when driving all the gamma voltage as AC as shown in FIG. The divided resistors R21 to R26 divide the supply voltage Vdd according to their resistance ratios so that different DC gamma voltages are generated at the five divided points N1 to N5. The line pulse generator 25 or 29 generates the line pulse LP which is tomada one horizontal period 1H as described above. At the third divided point N3, the line pulse LP from the line pulse generator 25 or 29 is added to the DC gamma voltage to generate the third alternating gamma voltage Vγ3 having a positive polarity through the output buffer 36. do. On the other hand, at the remaining partial pressure points N1, N2, N4, and N5, DC gamma voltages Vγ1, Vγ2, Vγ4, and Vγ5 are generated through the output buffer 36. The negative electrode also generates the eighth alternating gamma voltage Vγ8 and the direct current gamma voltages Vγ6, Vγ7, Vγ9, and Vγ10 including the same configuration as that of FIG. 17 except that the polarity of the supply power source Vdd is different. Representative AC gamma voltages Vγ1, Vγ3, Vγ5, Vγ6, Vγ8, and Vγ10 output from the AC gamma voltage generator 20 including the positive and negative portions are illustrated in FIG. 18. In FIG. 18, the fifth and sixth gamma voltages Vγ5 and Vγ6 having a low potential difference based on the common voltage Vcom are white gray and the first and tenth gamma voltages Vγ1 having a high potential difference from the common voltage Vcom. , Vγ10 is black gray, and the third and eighth gamma voltages Vγ3 and Vγ8 having a medium potential difference from the common voltage Vcom are used for gamma correction of the intermediate gray. As such, only the third and eighth gamma voltages Vγ3 and Vγ8 for gamma correction of the intermediate gray are driven by alternating current, thereby preventing the horizontal line phenomenon that is prominent in the intermediate gray.

Alternatively, as shown in FIG. 19, only the third gamma voltage Vγ3 of the positive electrode portion may be generated by alternating current and the remaining gamma voltages Vγ1, Vγ2, Vγ4 to Vγ10 may be generated. This can be achieved by implementing the line pulse generators 25 and 29 to be connected only to the third divided point N3 of the gamma voltage generator, as shown in FIG. 17, and by implementing the negative polarity part as a gamma voltage generator as in the prior art. Do.

On the other hand, as shown in FIG. 20, only the eighth gamma voltage Vγ8 of the negative electrode portion may be generated by alternating current and the remaining gamma voltages Vγ1 to Vγ7, Vγ9, and Vγ10 may be generated. This can be achieved by implementing the negative polarity part such that the line pulse generator 25 or 29 is connected to only one divided point of the gamma voltage generation part as shown in FIG. 17, and the positive polarity part is implemented by the conventional gamma voltage generation part.

As described above, in the gamma voltage correction method and apparatus of the liquid crystal display according to the present invention, the luminance difference between lines in the 2-dot inversion method is corrected by correcting the gamma voltage with an alternating gamma voltage whose potential changes every predetermined horizontal period. You can compensate. In particular, in the gamma voltage correction method and apparatus of the liquid crystal display according to the present invention, the gamma voltage of the intermediate gray is corrected by the alternating gamma voltage, thereby making it possible to correct the luminance difference between the lines that stands out in the intermediate gray. As a result, in the liquid crystal panel driven by the gamma voltage correction method and apparatus of the liquid crystal display according to the present invention, the horizontal line phenomenon due to the luminance difference between the lines is not generated and the image quality can be improved.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (15)

In a driving method of a liquid crystal display device for displaying an image by correcting a video signal to a predetermined gamma voltage, A line pulse generating step of generating a line pulse toggled every predetermined horizontal period; Gamma generates a plurality of DC gamma voltages having different voltage levels according to the video signal, and adds the line pulses to the DC gamma voltages to generate alternating gamma voltages with alternating potentials in the predetermined horizontal period. A gamma voltage correction method of a liquid crystal display device comprising the step of generating a voltage. The method of claim 1, The gamma voltage generation step And generating the AC gamma voltage with all gamma voltages by adding the line pulses to each of the plurality of DC gamma voltages. The method of claim 1, The gamma voltage generation step And generating the AC gamma voltage with a part of the gamma voltage and generating the DC gamma voltage with the remaining gamma voltage by adding the line pulse to only a part of the DC gamma voltages of the plurality of DC gamma voltages. Gamma voltage correction method of liquid crystal display device. The method of claim 3, wherein The gamma voltage correcting method of the liquid crystal display device, wherein only the gamma voltages corresponding to the middle gray among the plurality of direct current gamma voltages are generated as the AC gamma voltage. The method of claim 3, wherein A gamma voltage correcting method of a liquid crystal display device, characterized in that only positive or negative gamma voltages of the plurality of DC gamma voltages are generated as the AC gamma voltage. The method of claim 1, And the alternating gamma voltage is alternatingly alternating in potential every one horizontal period. The method of claim 1, And a gamma voltage including the AC gamma voltage is supplied to the liquid crystal cells in addition to the data voltage driven according to the 2-dot inversion driving method. A liquid crystal display for displaying an image by correcting a video signal with a preset gamma voltage. Line pulse generating means for generating line pulses toggled every predetermined horizontal period; Generating a plurality of direct current gamma voltages having different voltage levels according to the video signal, and adding the line pulses to the direct current gamma voltages to generate alternating gamma voltages with alternating potentials during the predetermined horizontal period. Gamma voltage generating means, And a control means for generating a control signal for controlling the drive timing of said line pulse generating means. The method of claim 8, The gamma voltage generating means And the line pulse is added to each of the plurality of DC gamma voltages to generate the AC gamma voltage at all gamma voltages. The method of claim 8, The gamma voltage generating means The line pulse is added to only a part of the DC gamma voltages of the plurality of DC gamma voltages to generate the AC gamma voltage with a part of the gamma voltage and the DC gamma voltage with the remaining gamma voltage. Gamma voltage correction device. The method of claim 10, The gamma voltage generating means And a gamma voltage corresponding to an intermediate gray of the plurality of gamma voltages is generated as the AC gamma voltage. The method of claim 10, A gamma voltage correcting method of a liquid crystal display device, wherein only the positive or negative gamma voltages of the plurality of gamma voltages are generated as the AC gamma voltage. The method of claim 8, The line pulse generating means And a line pulse generator independently connected to a node to which the line pulses are to be added among the nodes in which the DC gamma voltage is generated by the gamma voltage generating means. The method of claim 8, The AC gamma voltage is gamma voltage correction device of the liquid crystal display, characterized in that the potential alternately changes every one horizontal period. The method of claim 8, And the gamma voltage generating means supplies the gamma voltage to a data driver for driving data lines of the liquid crystal display according to a 2-dot inversion driving method.