KR100378197B1 - 열적 산화에 의한 금속층의 표면 모폴로지 특성 열화방지법 및 그러한 금속층을 갖는 반도체 장치의 제조 방법 - Google Patents
열적 산화에 의한 금속층의 표면 모폴로지 특성 열화방지법 및 그러한 금속층을 갖는 반도체 장치의 제조 방법 Download PDFInfo
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- KR100378197B1 KR100378197B1 KR10-2001-0018961A KR20010018961A KR100378197B1 KR 100378197 B1 KR100378197 B1 KR 100378197B1 KR 20010018961 A KR20010018961 A KR 20010018961A KR 100378197 B1 KR100378197 B1 KR 100378197B1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
- H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31683—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of metallic layers, e.g. Al deposited on the body, e.g. formation of multi-layer insulating structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
Abstract
Description
Claims (13)
- (a) 반도체 기판 상에 금속층을 형성하는 단계,(b) 상기 금속층을 제 1 온도에서 산화시켜 상기 금속층의 상단을, 상기 금속층을 이루는 금속과 산소의 혼합상이 포함되게 변환하는 단계 및(c) (b)단계 후에 산소 분위기에서 상기 금속-산소 혼합상을 갖는 금속층을 상기 제 1 온도보다 높은 제 2 온도로 열처리하는 단계를 포함하는 반도체 장치의 제조 방법.
- 제 1 항에 있어서, 상기 (b) 단계는 산소 성분을 포함하되 아르곤 성분은 포함하지 않는 플라즈마에 상기 금속층을 노출시키는 단계를 포함하는 반도체 장치의 제조 방법.
- 제 2 항에 있어서, 상기 금속층은 300초 이상 플라즈마에 노출되는 반도체 장치의 제조 방법.
- 제 2 항에 있어서, 상기 산소 성분을 포함하되 아르곤 성분은 포함하지 않는플라즈마는 He와 산소의 혼합 가스, N2와 산소의 혼합 가스, N2O, NO 또는 NO2가스를 포함하거나 이들 중의 한 가지 이상의 혼합 가스를 포함하는 반도체 장치의 제조 방법.
- 제 1 항에 있어서, 상기 (b) 단계는 상기 금속층을 오존 또는 H2O처리하는 단계를 포함하는 반도체 장치의 제조 방법.
- 제 1 항에 있어서, 상기 제 1 온도는 약 150℃인 반도체 장치의 제조 방법.
- 제 1 항에 있어서, 상기 제 2 온도는 약 400℃인 반도체 장치의 제조 방법.
- 제 1 항에 있어서, 상기 금속층은 Ru, Ir, Rh, Pd, Os 및 이들의 결합물로 이루어진 군에서 선택된 어느 하나인 반도체 장치의 제조 방법.
- 제 1 항에 있어서, (a) 단계 이전에 상기 금속층 하부에 유전막을 형성하는 단계를 더 구비하는 반도체 장치의 제조 방법.
- 제 9항에 있어서, 상기 금속층은 캐패시터의 상부 전극인 반도체 장치의 제조 방법.
- 제 10 항에 있어서, 상기 금속층은 Ru, Ir, Rh, Pd, Os 및 이들의 결합물로 이루어진 군에서 선택된 어느 하나인 반도체 장치의 제조 방법.
- 제 9항에 있어서, 상기 유전막은 Ta2O5, SrTiO3(STO), (Ba, Sr)TiO3(BST), PbTiO3, Pb(Zr,Ti)O3(PZT), SrBi2Ta2O5(SBT), (Pb, La)(Zr, Ti)O3, Bi4Ti3O12및 BaTiO3(BTO)로 이루어진 군에서 선택된 어느 하나인 반도체 장치의 제조 방법.
- 제 2 항에 있어서, 상기 금속층은 Ru로 이루어지고, 상기 금속층은 질소 성분과 산소 성분으로 이루어지는 플라즈마에 300초 이상 노출되고, 400℃이상의 산소 분위기에서 열처리되는 반도체 장치의 제조 방법.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2001-0018961A KR100378197B1 (ko) | 2001-04-10 | 2001-04-10 | 열적 산화에 의한 금속층의 표면 모폴로지 특성 열화방지법 및 그러한 금속층을 갖는 반도체 장치의 제조 방법 |
US10/101,353 US6683001B2 (en) | 2001-04-10 | 2002-03-19 | Method for manufacturing a semiconductor device whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed |
US10/690,763 US6927166B2 (en) | 2001-04-10 | 2003-10-22 | Method for manufacturing semiconductor devices and integrated circuit capacitors whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR10-2001-0018961A KR100378197B1 (ko) | 2001-04-10 | 2001-04-10 | 열적 산화에 의한 금속층의 표면 모폴로지 특성 열화방지법 및 그러한 금속층을 갖는 반도체 장치의 제조 방법 |
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KR20020078811A KR20020078811A (ko) | 2002-10-19 |
KR100378197B1 true KR100378197B1 (ko) | 2003-03-29 |
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KR10-2001-0018961A KR100378197B1 (ko) | 2001-04-10 | 2001-04-10 | 열적 산화에 의한 금속층의 표면 모폴로지 특성 열화방지법 및 그러한 금속층을 갖는 반도체 장치의 제조 방법 |
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KR (1) | KR100378197B1 (ko) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100378197B1 (ko) * | 2001-04-10 | 2003-03-29 | 삼성전자주식회사 | 열적 산화에 의한 금속층의 표면 모폴로지 특성 열화방지법 및 그러한 금속층을 갖는 반도체 장치의 제조 방법 |
US7049192B2 (en) * | 2003-06-24 | 2006-05-23 | Micron Technology, Inc. | Lanthanide oxide / hafnium oxide dielectrics |
KR100647318B1 (ko) * | 2005-02-03 | 2006-11-23 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
HU227970B1 (en) | 2007-07-10 | 2012-07-30 | Egis Gyogyszergyar Nyrt | Pharmaceutical compositions containing silicones of high volatility |
WO2011033637A1 (ja) * | 2009-09-17 | 2011-03-24 | 株式会社 東芝 | 半導体装置の製造方法 |
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KR100207467B1 (ko) * | 1996-02-29 | 1999-07-15 | 윤종용 | 반도체 장치의 커패시터 제조 방법 |
JP3512959B2 (ja) * | 1996-11-14 | 2004-03-31 | 株式会社東芝 | 半導体装置及びその製造方法 |
US6184073B1 (en) * | 1997-12-23 | 2001-02-06 | Motorola, Inc. | Process for forming a semiconductor device having an interconnect or conductive film electrically insulated from a conductive member or region |
EP0947245B1 (en) * | 1998-02-05 | 2004-04-07 | Motorola Semiconducteurs S.A. | Method of forming metal colloids and method of forming a metal oxide sensitive layer for a chemical sensor device |
US5972722A (en) * | 1998-04-14 | 1999-10-26 | Texas Instruments Incorporated | Adhesion promoting sacrificial etch stop layer in advanced capacitor structures |
JP2000012796A (ja) * | 1998-06-19 | 2000-01-14 | Hitachi Ltd | 半導体装置ならびにその製造方法および製造装置 |
US6204203B1 (en) * | 1998-10-14 | 2001-03-20 | Applied Materials, Inc. | Post deposition treatment of dielectric films for interface control |
KR100321694B1 (ko) | 1998-12-30 | 2002-03-08 | 박종섭 | 반도체소자의캐패시터전극용백금막형성방법 |
US6281543B1 (en) * | 1999-08-31 | 2001-08-28 | Micron Technology, Inc. | Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same |
KR100390938B1 (ko) * | 2000-02-09 | 2003-07-10 | 주식회사 하이닉스반도체 | 반도체 소자의 캐패시터 제조 방법 |
KR100378197B1 (ko) * | 2001-04-10 | 2003-03-29 | 삼성전자주식회사 | 열적 산화에 의한 금속층의 표면 모폴로지 특성 열화방지법 및 그러한 금속층을 갖는 반도체 장치의 제조 방법 |
US7037730B2 (en) * | 2001-07-11 | 2006-05-02 | Micron Technology, Inc. | Capacitor with high dielectric constant materials and method of making |
-
2001
- 2001-04-10 KR KR10-2001-0018961A patent/KR100378197B1/ko active IP Right Grant
-
2002
- 2002-03-19 US US10/101,353 patent/US6683001B2/en not_active Expired - Lifetime
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2003
- 2003-10-22 US US10/690,763 patent/US6927166B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
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US6683001B2 (en) | 2004-01-27 |
US20040097033A1 (en) | 2004-05-20 |
US6927166B2 (en) | 2005-08-09 |
US20020146913A1 (en) | 2002-10-10 |
KR20020078811A (ko) | 2002-10-19 |
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