KR100361082B1 - 칩 동작불능 제어회로를 구비한 반도체 소자 및 칩 동작불능 제어방법 - Google Patents

칩 동작불능 제어회로를 구비한 반도체 소자 및 칩 동작불능 제어방법 Download PDF

Info

Publication number
KR100361082B1
KR100361082B1 KR1019990023426A KR19990023426A KR100361082B1 KR 100361082 B1 KR100361082 B1 KR 100361082B1 KR 1019990023426 A KR1019990023426 A KR 1019990023426A KR 19990023426 A KR19990023426 A KR 19990023426A KR 100361082 B1 KR100361082 B1 KR 100361082B1
Authority
KR
South Korea
Prior art keywords
chip
fuse
signal
integrated circuit
semiconductor integrated
Prior art date
Application number
KR1019990023426A
Other languages
English (en)
Korean (ko)
Other versions
KR20010003220A (ko
Inventor
강상석
신경선
강기상
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR1019990023426A priority Critical patent/KR100361082B1/ko
Priority to JP2000172463A priority patent/JP2001014886A/ja
Priority to TW089111722A priority patent/TW502427B/zh
Publication of KR20010003220A publication Critical patent/KR20010003220A/ko
Priority to US10/277,573 priority patent/US6972612B2/en
Application granted granted Critical
Publication of KR100361082B1 publication Critical patent/KR100361082B1/ko

Links

Classifications

    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05D—HINGES OR SUSPENSION DEVICES FOR DOORS, WINDOWS OR WINGS
    • E05D7/00—Hinges or pivots of special construction
    • E05D7/04—Hinges adjustable relative to the wing or the frame
    • A—HUMAN NECESSITIES
    • A47—FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47B—TABLES; DESKS; OFFICE FURNITURE; CABINETS; DRAWERS; GENERAL DETAILS OF FURNITURE
    • A47B2220/00—General furniture construction, e.g. fittings
    • A47B2220/0061—Accessories
    • A47B2220/0069—Hinges
    • A47B2220/0072—Hinges for furniture
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05D—HINGES OR SUSPENSION DEVICES FOR DOORS, WINDOWS OR WINGS
    • E05D7/00—Hinges or pivots of special construction
    • E05D7/04—Hinges adjustable relative to the wing or the frame
    • E05D2007/0469—Hinges adjustable relative to the wing or the frame in an axial direction
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05Y—INDEXING SCHEME ASSOCIATED WITH SUBCLASSES E05D AND E05F, RELATING TO CONSTRUCTION ELEMENTS, ELECTRIC CONTROL, POWER SUPPLY, POWER SIGNAL OR TRANSMISSION, USER INTERFACES, MOUNTING OR COUPLING, DETAILS, ACCESSORIES, AUXILIARY OPERATIONS NOT OTHERWISE PROVIDED FOR, APPLICATION THEREOF
    • E05Y2900/00—Application of doors, windows, wings or fittings thereof
    • E05Y2900/20—Application of doors, windows, wings or fittings thereof for furniture, e.g. cabinets

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR1019990023426A 1999-06-22 1999-06-22 칩 동작불능 제어회로를 구비한 반도체 소자 및 칩 동작불능 제어방법 KR100361082B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019990023426A KR100361082B1 (ko) 1999-06-22 1999-06-22 칩 동작불능 제어회로를 구비한 반도체 소자 및 칩 동작불능 제어방법
JP2000172463A JP2001014886A (ja) 1999-06-22 2000-06-08 半導体集積回路装置及びその制御方法
TW089111722A TW502427B (en) 1999-06-22 2000-06-15 Semiconductor device with malfunction control circuit and controlling method thereof
US10/277,573 US6972612B2 (en) 1999-06-22 2002-10-21 Semiconductor device with malfunction control circuit and controlling method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019990023426A KR100361082B1 (ko) 1999-06-22 1999-06-22 칩 동작불능 제어회로를 구비한 반도체 소자 및 칩 동작불능 제어방법

Publications (2)

Publication Number Publication Date
KR20010003220A KR20010003220A (ko) 2001-01-15
KR100361082B1 true KR100361082B1 (ko) 2002-11-18

Family

ID=19594113

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990023426A KR100361082B1 (ko) 1999-06-22 1999-06-22 칩 동작불능 제어회로를 구비한 반도체 소자 및 칩 동작불능 제어방법

Country Status (3)

Country Link
JP (1) JP2001014886A (ja)
KR (1) KR100361082B1 (ja)
TW (1) TW502427B (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100475738B1 (ko) * 2002-09-17 2005-03-10 삼성전자주식회사 칩 동작불능 해제기능을 가지는 반도체 장치
JP4967532B2 (ja) 2006-08-25 2012-07-04 富士通セミコンダクター株式会社 半導体集積回路および半導体集積回路のテスト方法
CN110763969A (zh) * 2019-08-08 2020-02-07 浙江大学 发光二极管及太阳能电池老化测试系统

Also Published As

Publication number Publication date
KR20010003220A (ko) 2001-01-15
JP2001014886A (ja) 2001-01-19
TW502427B (en) 2002-09-11

Similar Documents

Publication Publication Date Title
US6256239B1 (en) Redundant decision circuit for semiconductor memory device
US8179732B2 (en) Flash memory devices including ready/busy control circuits and methods of testing the same
US8305822B2 (en) Fuse circuit and semiconductor memory device including the same
US5909142A (en) Semiconductor integrated circuit device having burn-in test capability and method for using the same
KR100314644B1 (ko) 리페어퓨즈셀의과소거확인회로
US7924646B2 (en) Fuse monitoring circuit for semiconductor memory device
US7697361B2 (en) Apparatus for electrical fuse option in semiconductor integrated circuit
US20010050578A1 (en) Semiconductor apparatus
KR100220555B1 (ko) 디코딩 어드레스 페일을 방지하기 위한 리던던시 디코딩 회로
KR100361082B1 (ko) 칩 동작불능 제어회로를 구비한 반도체 소자 및 칩 동작불능 제어방법
KR100378198B1 (ko) 반도체 장치의 모드 제어 회로 및 이를 구비하는 반도체메모리 장치
KR20030088863A (ko) 두개의 내부 전원 기준 전압 발생 회로를 구비한 내부전원 전압 제어 장치
KR100757411B1 (ko) 옵션 퓨즈 회로를 이용한 반도체 메모리 장치의 전압재설정 회로 및 그 방법
US6972612B2 (en) Semiconductor device with malfunction control circuit and controlling method thereof
US7760566B2 (en) Semiconductor memory device for preventing supply of excess specific stress item and test method thereof
JP2001013224A (ja) 半導体装置及びそのテスト方法
KR100267088B1 (ko) 반도체메모리장치의기준전압발생회로
US6262621B1 (en) Voltage boosting circuit for semiconductor device
KR100475738B1 (ko) 칩 동작불능 해제기능을 가지는 반도체 장치
US8395406B2 (en) Integrated circuit architecture for testing variable delay circuit
US6985390B2 (en) Integrated memory circuit having a redundancy circuit and a method for replacing a memory area
KR100439104B1 (ko) 안티퓨즈 제어 회로
US20070070672A1 (en) Semiconductor device and driving method thereof
KR100316708B1 (ko) 웨이퍼 테스트시 외부 전압 공급원을 사용하지 않고 활성화된 테스트 신호를 발생하는 반도체 집적회로
US20120182814A1 (en) Programming circuit using antifuse

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20121031

Year of fee payment: 11

FPAY Annual fee payment

Payment date: 20131031

Year of fee payment: 12

LAPS Lapse due to unpaid annual fee