KR100326910B1 - 반도체장치의제조방법 - Google Patents

반도체장치의제조방법 Download PDF

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Publication number
KR100326910B1
KR100326910B1 KR1019980042539A KR19980042539A KR100326910B1 KR 100326910 B1 KR100326910 B1 KR 100326910B1 KR 1019980042539 A KR1019980042539 A KR 1019980042539A KR 19980042539 A KR19980042539 A KR 19980042539A KR 100326910 B1 KR100326910 B1 KR 100326910B1
Authority
KR
South Korea
Prior art keywords
film
amorphous
region
dielectric film
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019980042539A
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English (en)
Korean (ko)
Other versions
KR19990037030A (ko
Inventor
사토시 야마우치
시노부 다케히로
마사키 요시마루
Original Assignee
오끼 덴끼 고오교 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 오끼 덴끼 고오교 가부시끼가이샤 filed Critical 오끼 덴끼 고오교 가부시끼가이샤
Publication of KR19990037030A publication Critical patent/KR19990037030A/ko
Application granted granted Critical
Publication of KR100326910B1 publication Critical patent/KR100326910B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • H10D1/682Capacitors having no potential barriers having dielectrics comprising perovskite structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019980042539A 1997-10-17 1998-10-12 반도체장치의제조방법 Expired - Fee Related KR100326910B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP285715 1997-10-17
JP28571597A JP3979711B2 (ja) 1997-10-17 1997-10-17 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR19990037030A KR19990037030A (ko) 1999-05-25
KR100326910B1 true KR100326910B1 (ko) 2002-09-05

Family

ID=17695096

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980042539A Expired - Fee Related KR100326910B1 (ko) 1997-10-17 1998-10-12 반도체장치의제조방법

Country Status (5)

Country Link
US (1) US5940677A (enExample)
JP (1) JP3979711B2 (enExample)
KR (1) KR100326910B1 (enExample)
CN (1) CN1146982C (enExample)
TW (1) TW383487B (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6258655B1 (en) * 1999-03-01 2001-07-10 Micron Technology, Inc. Method for improving the resistance degradation of thin film capacitors
US20050191765A1 (en) * 2000-08-04 2005-09-01 Cem Basceri Thin film capacitor with substantially homogenous stoichiometry
US6617266B2 (en) 2001-04-12 2003-09-09 Applied Materials, Inc. Barium strontium titanate annealing process
US6593181B2 (en) * 2001-04-20 2003-07-15 International Business Machines Corporation Tailored insulator properties for devices
KR20030013123A (ko) * 2001-08-07 2003-02-14 삼성전자주식회사 커패시터를 갖는 반도체 장치 및 그의 제조 방법
KR20030057204A (ko) * 2001-12-28 2003-07-04 동부전자 주식회사 절연막의 습식식각 또는 화학적 건식식각을 이용한 반도체커패시터 제조방법
JP3621695B2 (ja) 2002-07-29 2005-02-16 株式会社東芝 半導体装置及び素子形成用基板
US6734057B2 (en) * 2002-09-27 2004-05-11 Infineon Technologies Ag Method of patterning capacitors and capacitors made thereby
US6784478B2 (en) * 2002-09-30 2004-08-31 Agere Systems Inc. Junction capacitor structure and fabrication method therefor in a dual damascene process
US7553755B2 (en) * 2006-01-18 2009-06-30 Macronix International Co., Ltd. Method for symmetric deposition of metal layer
CN102403227B (zh) * 2010-09-17 2013-10-23 中芯国际集成电路制造(北京)有限公司 台阶状硅锗源/漏结构的制造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0516031A1 (en) * 1991-05-29 1992-12-02 Ramtron International Corporation Stacked ferroelectric memory cell and method
JPH0750395A (ja) * 1993-08-06 1995-02-21 Hitachi Ltd 半導体記憶装置およびその製造方法
US5555486A (en) * 1994-12-29 1996-09-10 North Carolina State University Hybrid metal/metal oxide electrodes for ferroelectric capacitors

Also Published As

Publication number Publication date
JP3979711B2 (ja) 2007-09-19
JPH11121695A (ja) 1999-04-30
TW383487B (en) 2000-03-01
CN1215228A (zh) 1999-04-28
US5940677A (en) 1999-08-17
KR19990037030A (ko) 1999-05-25
CN1146982C (zh) 2004-04-21

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