KR100301411B1 - 반도체 장치 - Google Patents
반도체 장치 Download PDFInfo
- Publication number
- KR100301411B1 KR100301411B1 KR1019980014488A KR19980014488A KR100301411B1 KR 100301411 B1 KR100301411 B1 KR 100301411B1 KR 1019980014488 A KR1019980014488 A KR 1019980014488A KR 19980014488 A KR19980014488 A KR 19980014488A KR 100301411 B1 KR100301411 B1 KR 100301411B1
- Authority
- KR
- South Korea
- Prior art keywords
- input
- output protection
- nmos transistor
- region
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
- H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
- H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
- H10D89/813—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements specially adapted to provide an electrical current path other than the field-effect induced current path
- H10D89/814—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements specially adapted to provide an electrical current path other than the field-effect induced current path involving a parasitic bipolar transistor triggered by the electrical biasing of the gate electrode of the FET, e.g. gate coupled transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
- H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
- H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP97-248372 | 1997-09-12 | ||
| JP9248372A JPH1187727A (ja) | 1997-09-12 | 1997-09-12 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19990029167A KR19990029167A (ko) | 1999-04-26 |
| KR100301411B1 true KR100301411B1 (ko) | 2001-09-22 |
Family
ID=17177128
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019980014488A Expired - Fee Related KR100301411B1 (ko) | 1997-09-12 | 1998-04-23 | 반도체 장치 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US6222710B1 (enExample) |
| EP (2) | EP1237196A1 (enExample) |
| JP (1) | JPH1187727A (enExample) |
| KR (1) | KR100301411B1 (enExample) |
| DE (1) | DE69806115T2 (enExample) |
| TW (1) | TW416146B (enExample) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6160292A (en) | 1997-04-23 | 2000-12-12 | International Business Machines Corporation | Circuit and methods to improve the operation of SOI devices |
| US6140184A (en) | 1998-06-01 | 2000-10-31 | Motorola, Inc. | Method of changing the power dissipation across an array of transistors |
| US6593605B2 (en) * | 1998-06-01 | 2003-07-15 | Motorola, Inc. | Energy robust field effect transistor |
| US6587320B1 (en) * | 2000-01-04 | 2003-07-01 | Sarnoff Corporation | Apparatus for current ballasting ESD sensitive devices |
| JP2001284540A (ja) * | 2000-04-03 | 2001-10-12 | Nec Corp | 半導体装置およびその製造方法 |
| US6385021B1 (en) * | 2000-04-10 | 2002-05-07 | Motorola, Inc. | Electrostatic discharge (ESD) protection circuit |
| US6583972B2 (en) | 2000-06-15 | 2003-06-24 | Sarnoff Corporation | Multi-finger current ballasting ESD protection circuit and interleaved ballasting for ESD-sensitive circuits |
| US6605981B2 (en) * | 2001-04-26 | 2003-08-12 | International Business Machines Corporation | Apparatus for biasing ultra-low voltage logic circuits |
| US6888198B1 (en) * | 2001-06-04 | 2005-05-03 | Advanced Micro Devices, Inc. | Straddled gate FDSOI device |
| TW521420B (en) * | 2001-12-21 | 2003-02-21 | Winbond Electronics Corp | Electro-static discharge protection device for integrated circuit inputs |
| US6867103B1 (en) | 2002-05-24 | 2005-03-15 | Taiwan Semiconductor Manufacturing Company | Method of fabricating an ESD device on SOI |
| US6724603B2 (en) * | 2002-08-09 | 2004-04-20 | Motorola, Inc. | Electrostatic discharge protection circuitry and method of operation |
| CN1329986C (zh) * | 2002-11-28 | 2007-08-01 | 华邦电子股份有限公司 | 集成电路输入的静电放电保护元件 |
| TWI273693B (en) * | 2004-03-19 | 2007-02-11 | Mediatek Inc | Electrostatic discharge protection device |
| JP2006019511A (ja) * | 2004-07-01 | 2006-01-19 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| TW200631584A (en) * | 2004-11-15 | 2006-09-16 | Akzo Nobel Nv | A medicament related to mirtazapine for the treatment of hot flush |
| US7446990B2 (en) * | 2005-02-11 | 2008-11-04 | Freescale Semiconductor, Inc. | I/O cell ESD system |
| DE102005019157A1 (de) * | 2005-04-25 | 2006-10-26 | Robert Bosch Gmbh | Anordnung von MOSFETs zur Steuerung von demselben |
| JP5586819B2 (ja) * | 2006-04-06 | 2014-09-10 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置 |
| US7808117B2 (en) * | 2006-05-16 | 2010-10-05 | Freescale Semiconductor, Inc. | Integrated circuit having pads and input/output (I/O) cells |
| US7777998B2 (en) | 2007-09-10 | 2010-08-17 | Freescale Semiconductor, Inc. | Electrostatic discharge circuit and method therefor |
| CN102025136A (zh) * | 2009-09-17 | 2011-04-20 | 上海宏力半导体制造有限公司 | 一种静电放电保护电路 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5489792A (en) * | 1994-04-07 | 1996-02-06 | Regents Of The University Of California | Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility |
| US5610790A (en) * | 1995-01-20 | 1997-03-11 | Xilinx, Inc. | Method and structure for providing ESD protection for silicon on insulator integrated circuits |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4989057A (en) | 1988-05-26 | 1991-01-29 | Texas Instruments Incorporated | ESD protection for SOI circuits |
| US5027263A (en) * | 1988-09-16 | 1991-06-25 | Kyushu University | Switching power source means |
| JPH02260459A (ja) | 1989-03-30 | 1990-10-23 | Ricoh Co Ltd | 入力保護回路 |
| KR940004449B1 (ko) | 1990-03-02 | 1994-05-25 | 가부시키가이샤 도시바 | 반도체장치 |
| US5283449A (en) | 1990-08-09 | 1994-02-01 | Nec Corporation | Semiconductor integrated circuit device including two types of MOSFETS having source/drain region different in sheet resistance from each other |
| JP3244581B2 (ja) | 1993-12-29 | 2002-01-07 | 株式会社リコー | デュアルゲート型cmos半導体装置 |
| US5616935A (en) * | 1994-02-08 | 1997-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor integrated circuit having N-channel and P-channel transistors |
| JPH0831948A (ja) | 1994-07-15 | 1996-02-02 | Nippondenso Co Ltd | 半導体集積回路装置 |
| JPH0837284A (ja) | 1994-07-21 | 1996-02-06 | Nippondenso Co Ltd | 半導体集積回路装置 |
| JPH08181219A (ja) | 1994-12-21 | 1996-07-12 | Nippondenso Co Ltd | 半導体集積回路装置 |
| US5753955A (en) * | 1996-12-19 | 1998-05-19 | Honeywell Inc. | MOS device having a gate to body connection with a body injection current limiting feature for use on silicon on insulator substrates |
| US6133591A (en) * | 1998-07-24 | 2000-10-17 | Philips Electronics North America Corporation | Silicon-on-insulator (SOI) hybrid transistor device structure |
-
1997
- 1997-09-12 JP JP9248372A patent/JPH1187727A/ja active Pending
-
1998
- 1998-02-12 TW TW087101897A patent/TW416146B/zh not_active IP Right Cessation
- 1998-03-11 US US09/038,144 patent/US6222710B1/en not_active Expired - Fee Related
- 1998-03-25 EP EP02008020A patent/EP1237196A1/en not_active Withdrawn
- 1998-03-25 DE DE69806115T patent/DE69806115T2/de not_active Expired - Fee Related
- 1998-03-25 EP EP98105416A patent/EP0923133B1/en not_active Expired - Lifetime
- 1998-04-23 KR KR1019980014488A patent/KR100301411B1/ko not_active Expired - Fee Related
-
2000
- 2000-12-06 US US09/729,724 patent/US6373668B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5489792A (en) * | 1994-04-07 | 1996-02-06 | Regents Of The University Of California | Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility |
| US5610790A (en) * | 1995-01-20 | 1997-03-11 | Xilinx, Inc. | Method and structure for providing ESD protection for silicon on insulator integrated circuits |
Also Published As
| Publication number | Publication date |
|---|---|
| US20010000218A1 (en) | 2001-04-12 |
| EP0923133A1 (en) | 1999-06-16 |
| US6373668B2 (en) | 2002-04-16 |
| EP0923133B1 (en) | 2002-06-19 |
| JPH1187727A (ja) | 1999-03-30 |
| EP1237196A1 (en) | 2002-09-04 |
| KR19990029167A (ko) | 1999-04-26 |
| US6222710B1 (en) | 2001-04-24 |
| DE69806115D1 (de) | 2002-07-25 |
| DE69806115T2 (de) | 2002-10-02 |
| TW416146B (en) | 2000-12-21 |
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