KR100248156B1 - Method of fabricating semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device suitable for forming an LED having low concentration of impurity regions on both sides of a gate electrode. Forming a low concentration impurity region below the first gate electrode on both sides of the first gate electrode by injecting ions of the first conductivity type into the peripheral region and covering the entire cell region; Implanting ions of the second conductivity type into the region at low concentration to form a low concentration impurity region of the second conductivity type on both sides of the second gate electrode, and insulating layer covering the first and second gate electrodes on the semiconductor substrate. Forming the first mask pattern covering the entire cell region and the insulating layer of the portion corresponding to the first gate electrode; and forming the first mask pattern. By implanting ions of the first conductivity type at a high concentration to form an LED between the first gate electrode and the first mask pattern, and to form a high concentration impurity region of the first conductivity type under the side of the first mask pattern on the peripheral area. Forming a second mask pattern covering the entire peripheral area and an insulating layer of a portion corresponding to the second gate electrode; and injecting ions of the second conductivity type at a high concentration using the second mask pattern to obtain a second mask pattern. And forming an LED between the gate electrode and the second mask pattern, and forming a high concentration impurity region of the second conductivity type under the first mask pattern side of the cell region.

Therefore, in the present invention, it is possible to prevent damage to the semiconductor substrate due to the etching process.

Description

Manufacturing Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device suitable for forming a low concentration impurity region on both sides of a gate electrode formed in a cell region and a peripheral region.

The source / drain region, which is used as an impurity region, injects ions of the first conductivity type or the second conductivity type in a high concentration, and injects ions in a low concentration in a region adjacent to the channel. Is called Eldi. This LED structure reduces the electric field between the drain and the channel region and thus can reduce the injection into the oxide layer, the collision ionization and other thermoelectronic effects.

1A to 1F are cross-sectional views of a process for forming an LED according to the prior art.

Although not shown in the figure, as shown in FIG. 1A, a field oxide film is formed on a semiconductor substrate to isolate wells of different conductivity types and active regions of elements.

In the drawing, I is a portion where a first conductive MOS transistor is to be formed in a cell region, and II is a portion where a second conductive MOS transistor is to be formed in a peripheral region.

The polysilicon layer and the insulating layer are sequentially stacked on the semiconductor substrate 100 as described above, and then patterned to form the gate electrode 102 and the cap insulating layer 104 thereon.

After the photoresist is applied to the semiconductor substrate 100 to cover the cap insulating layer 104, the photoresist is exposed and developed to cover the cell region (I) and to pattern the peripheral region (II) to expose the first mask pattern ( 106). Using the first mask pattern 106 as an ion blocking mask, a low concentration of impurity regions 108 are formed on both sides of the gate electrode 102 by implanting ions of the first conductivity type into the peripheral region II. .

As shown in FIG. 1B, the first mask pattern 106 is removed.

After the photoresist is again applied to the semiconductor substrate 100 to cover the cap insulating layer 104, the photoresist is exposed and developed to expose the cell region (I) and patterned to cover the peripheral region (II). The pattern 110 is formed. A low concentration of impurity regions 112 are formed on both sides of the gate electrode 102 by injecting ions of the second conductivity type into the cell region I at low concentration using the second mask pattern 110 as an ion blocking mask. .

As shown in FIG. 1C, the second mask pattern 110 is removed.

After the silicon nitride is deposited on the semiconductor substrate 100 to cover the cap insulating layer 104 to form the insulating layer 114, the gate electrode is etched back using an etching gas in a plasma state as shown in FIG. 1D. Sidewalls 114-1 are formed on the side surfaces of the 102 and cap insulating layers 104.

As shown in FIG. 1E, after the photoresist is applied on the semiconductor substrate 100, the photoresist is exposed and developed to cover the cell region I and to pattern the peripheral region II to form a third mask pattern 118. do. A high concentration of impurity regions 116 are formed by implanting the first conductive ions at high concentration into the peripheral region II using this third mask as an ion blocking mask.

In the peripheral region (II), the first conductive ions are implanted into the lower portion of the semiconductor substrate 100 on the sidewall 114-1 by the sidewall 114-1 and the cap insulating layer 104 serving as a mask. At this time, ion implantation is blocked by the sidewall 114-1, which is the insulating layer 114, in the impurity region L1 having a low concentration under the sidewall 114-1 formed by the foregoing process. The other low concentration impurity regions become high concentration impurity regions 116 by the first conductivity type ion implantation.

Therefore, as shown in the drawing, a low concentration impurity region L1, that is, a lightly doped drain (LDD) is formed in the peripheral region below the sidewall 114-1. This LED structure reduces the electric field between the drain and the channel region and thus can reduce the injection into the oxide layer, the collision ionization and other thermoelectronic effects.

As shown in FIG. 1F, after the photoresist is again applied on the semiconductor substrate 100, the photomask is exposed and developed to expose the cell region I and patterned to cover the peripheral region II, thereby forming the fourth mask pattern 122. Form. Using the fourth mask 122 as an ion blocking mask, a high concentration of second conductive ions is injected into the cell region I, thereby forming a high concentration impurity region 120.

In the cell region I, the second conductive ions are implanted into the semiconductor substrate 100 under the sidewalls 114-1 by the sidewalls 114-1 and the cap insulating layer 104 serving as a mask. In this case, ion implantation is blocked by the sidewall 114-1, which is the insulating layer 114, in the impurity region L2 having a low concentration under the sidewall 114-1 formed by the foregoing process. The other low concentration impurity region becomes the high concentration impurity region 120 by the second conductivity type ion implantation.

Therefore, the LEDs of the low concentration impurity regions L1 and L2 are formed in the peripheral region and the cell region below the sidewall 114-1.

However, in the prior art, the surface of the semiconductor substrate was damaged during the etching process for forming the sidewalls.

In order to solve the above problems, it is an object of the present invention to provide a method for manufacturing a semiconductor device that can proceed to the LED forming process without damaging the semiconductor substrate.

According to the present invention, after forming an insulating layer covering a gate electrode in a cell region and a peripheral region, and forming a mask pattern using a photoresist on the insulating layer, the semiconductor substrate is protected by the insulating layer, thereby preventing damage due to an etching process or the like. I will.

A method of manufacturing a semiconductor device of the present invention comprises the steps of forming a first gate electrode and a second gate electrode so as to correspond to a semiconductor substrate on a peripheral region and a cell region, respectively, and covering ions of a first conductivity type in an entire peripheral region of the cell region. Forming a low concentration impurity region of the first conductivity type on both lower sides of the first gate electrode by injecting a low concentration, and injecting ions of the second conductivity type into the cell region at a lower concentration on both sides of the second gate electrode Forming a low concentration impurity region of a second conductivity type in the semiconductor substrate, forming an insulating layer covering the first and second gate electrodes on the semiconductor substrate, and insulating the entire cell region and the portion corresponding to the first gate electrode. Forming a first mask pattern covering the layer and injecting ions of the first conductivity type at a high concentration by using the first mask pattern to form the first gate electrode and the first mask pattern; Forming an LED and forming a high concentration impurity region of the first conductivity type in the lower side of the first mask pattern on the peripheral region, and a second covering the insulating layer of the entire peripheral region and the portion corresponding to the second gate electrode. Forming a mask between the second gate electrode and the second mask pattern by forming a mask pattern and injecting ions of the second conductivity type at a high concentration using the second mask pattern, and forming a first mask pattern on the cell region. And a step of forming a high concentration impurity region of the second conductivity type in the lower part of the side surface.

1A to 1F are manufacturing process diagrams for forming an LED having a low concentration impurity region according to the prior art,

2A to 2F are manufacturing process diagrams for forming an LED having a low concentration impurity region according to the present invention.

Explanation of symbols on the main parts of the drawings

100, 200. Semiconductor substrate 102, 202. Gate electrode

104, 204. Cap insulation layer 114-1. Sidewall

I, I-1. Cell area II, II-1. Surrounding area

108, 112, 208, 212. Low concentration impurity region

116, 216, 120, 220. High concentration impurity region

106, 110, 118, 122, 206, 210, 214, 218. Mask pattern

L1, L2, L3, L4, LED

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2A to 2F are cross-sectional views of a process for forming an LED according to the present invention.

Although not shown in the drawing, the semiconductor substrate 200 is provided with a field oxide film for isolating the active regions of the elements and the wells of different conductivity types.

As shown in FIG. 2A, a polysilicon layer and an insulating layer using silicon nitride are sequentially stacked on the semiconductor substrate 100, and then patterned to form a gate electrode 202 and a cap insulating layer 204 thereon. do.

Here, (I-1) is a portion where a first transistor-type MOS transistor is to be formed as a cell region, and (II-1) is a portion where a second conductive MOS transistor is to be formed as a peripheral region.

The photoresist is coated on the semiconductor substrate 200 to cover the cap insulating layer 204, and then exposed and developed to cover the cell region (I-1) and to pattern the peripheral region (II-1). Thus, the first mask pattern 206 is formed. Using the first mask pattern 206 as an ion blocking mask, the cell region I is covered and low concentrations of ions of the first conductivity type are injected into the peripheral region II, that is, on both sides of the gate electrode 202, that is, the channel. Low concentration impurity regions 208 are formed on both sides.

As shown in FIG. 1B, the first mask pattern 106 is removed.

Then, after the photoresist is applied to the semiconductor substrate 200 to cover the cap insulating layer 204, the photoresist is exposed and developed in the same process as above to expose the cell region (I-1) and the peripheral region (II- Patterning to cover 1) to form a second mask pattern (210). Using the second mask pattern 210 as an ion blocking mask, the peripheral region II-1 is covered, and low concentrations of ions of the second conductivity type are injected into the cell region I-1 to both sides of the gate electrode 202. That is, low concentration impurity regions 212 are formed on both sides of the channel.

As shown in FIG. 2C, the second mask pattern 206 is removed.

An insulating layer 230 using silicon nitride is formed on the semiconductor substrate 200 to cover the cap insulating layer 204.

As shown in FIG. 2D, after the photoresist is applied on the insulating layer 230, the photoresist is exposed and developed to cover the region of the cell region I-1 and the peripheral region II-1 corresponding to the gate electrode 204. The third mask pattern 214 is formed by patterning the insulating layer 230 to cover the insulating layer 230.

The third mask pattern 214 is used as an ion blocking mask to cover the cell region I-1, and a high concentration of first conductive ions are injected into the peripheral region II to form the peripheral region II-1. High concentration impurity regions 216 are formed under the semiconductor substrate 200 on both sides of the third mask pattern 214. At this time, since the third mask pattern 214 is covered with the insulating layer 230 of the portion corresponding to the gate electrode 202 of the cell region I-1, no ions are injected into this portion. Since the high concentration ions of the first conductivity type are shielded between the gate electrode 202 and the third mask pattern 214 of the peripheral region II-1, the LED L3 in which the low concentration impurity region in the previous process is maintained as it is. Is formed.

As shown in FIG. 2E, the third mask pattern 214 is removed.

The photoresist is applied, exposed and developed on the insulating layer 230 in the same manner as the above process to cover the peripheral region II-1 and correspond to the gate electrode 202 in the cell region I-1. The fourth mask pattern 218 is formed by patterning the insulating layer 230 to cover the insulating layer 230. At this time, since the gap between the gate electrode 202 and the fourth mask pattern 218 is an LED width to be formed through a subsequent process, an appropriate gap adjustment is attempted.

The fourth mask pattern 218 is used as an ion blocking mask to cover the peripheral region II-1, and a high concentration of second conductive ions are implanted into the cell region I to form the cell region I-1. The high concentration impurity region 220 is formed under the semiconductor substrate 200 on both sides of the fourth mask pattern 218.

At this time, since the fourth mask pattern 218 is covered in the peripheral region II-1, ions are not implanted in this portion. Since a high concentration of impurities of the second conductivity type are not implanted between the gate electrode 202 and the fourth mask pattern 218 of the cell region I-1, a low concentration impurity region remains as it is. (L4).

As shown in FIG. 2F, the fourth mask pattern 218 is removed.

Accordingly, as shown, an LED using a photoresist mask pattern instead of sidewalls is formed on the semiconductor substrate 200 on both lower sides of the gate electrode 202 formed on the cell region I-1 and the peripheral region II-1. L3) (L4) is formed.

That is, according to the present invention, after the entire area is completely shielded by using an ion blocking mask covering the gate electrode in the cell region and the peripheral region without using sidewalls, the gate electrode and the mask are implanted by implanting the first or second conductive ions. Can form an LED.

The width of the LEDs may be controlled by adjusting the distance between the gate electrode and the ion blocking mask covering the gate electrode.

As described above, in the present invention, after forming an insulating layer covering the gate electrode and the cap insulating layer, an ion blocking mask may be fabricated on the insulating layer through a photoresist process, and an LED may be formed using the insulating layer. have.

As described above, in the method of manufacturing a semiconductor device of the present invention, there is an advantage in that damage to the semiconductor substrate due to an etching process can be prevented.

Claims (1)

A method of manufacturing a semiconductor device for forming an LED under a gate electrode formed in a cell region and a peripheral region, Forming a first gate electrode and a second gate electrode so as to correspond to the semiconductor substrate on the peripheral region and the cell region, respectively; Forming a low concentration impurity region of a first conductivity type on both sides of the first gate electrode by injecting ions of a first conductivity type into the peripheral region at a low concentration by covering all of the cell regions; Forming a low concentration impurity region of a second conductivity type on both sides of the second gate electrode by injecting ions of a second conductivity type into the cell region at a low concentration by covering the entire peripheral area; Forming an insulating layer on the semiconductor substrate to cover the first and second gate electrodes; Forming a first mask pattern covering the entirety of the cell region and the insulating layer in a portion corresponding to the first gate electrode; By implanting ions of a first conductivity type at a high concentration using the first mask pattern, an LED is formed between the first gate electrode and the first mask pattern, and below the side of the first mask pattern on the peripheral area. Forming a high concentration impurity region of the first conductivity type, Forming a second mask pattern covering all of the peripheral region and the insulating layer in a portion corresponding to the second gate electrode; By implanting ions of the second conductivity type at a high concentration using the second mask pattern, an LED is formed between the second gate electrode and the second mask pattern, and a lower portion of the side of the first mask pattern on the cell region A method for manufacturing a semiconductor device comprising the step of forming a high concentration impurity region of the second conductivity type.

Images