KR100197193B1 - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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Publication number
KR100197193B1
KR100197193B1 KR1019960005726A KR19960005726A KR100197193B1 KR 100197193 B1 KR100197193 B1 KR 100197193B1 KR 1019960005726 A KR1019960005726 A KR 1019960005726A KR 19960005726 A KR19960005726 A KR 19960005726A KR 100197193 B1 KR100197193 B1 KR 100197193B1
Authority
KR
South Korea
Prior art keywords
insulating film
contact
semiconductor device
conductive
active region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019960005726A
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English (en)
Korean (ko)
Other versions
KR960036096A (ko
Inventor
마사히로 후쿠이
미즈키 세가와
도시로 아키노
미치카즈 마쯔모토
Original Assignee
모리시다 요이치
마츠시타 덴끼 산교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 모리시다 요이치, 마츠시타 덴끼 산교 가부시키가이샤 filed Critical 모리시다 요이치
Publication of KR960036096A publication Critical patent/KR960036096A/ko
Application granted granted Critical
Publication of KR100197193B1 publication Critical patent/KR100197193B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D64/011
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D84/903Masterslice integrated circuits comprising field effect technology
    • H10D84/907CMOS gate arrays

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1019960005726A 1995-03-08 1996-03-05 반도체장치 및 그 제조방법 Expired - Fee Related KR100197193B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7048063A JPH08250600A (ja) 1995-03-08 1995-03-08 半導体装置及びその製造方法
JP95-048063 1995-03-08

Publications (2)

Publication Number Publication Date
KR960036096A KR960036096A (ko) 1996-10-28
KR100197193B1 true KR100197193B1 (ko) 1999-07-01

Family

ID=12792902

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960005726A Expired - Fee Related KR100197193B1 (ko) 1995-03-08 1996-03-05 반도체장치 및 그 제조방법

Country Status (4)

Country Link
US (1) US5677249A (enExample)
JP (1) JPH08250600A (enExample)
KR (1) KR100197193B1 (enExample)
TW (1) TW313700B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6121663A (en) * 1997-05-22 2000-09-19 Advanced Micro Devices, Inc. Local interconnects for improved alignment tolerance and size reduction
US5956610A (en) * 1997-05-22 1999-09-21 Advanced Micro Devices, Inc. Method and system for providing electrical insulation for local interconnect in a logic circuit
US6413803B1 (en) * 1999-10-25 2002-07-02 Taiwan Semiconductor Manufacturing Company Design and process for a dual gate structure
WO2001071807A1 (en) * 2000-03-24 2001-09-27 Fujitsu Limited Semiconductor device and method of manufacture thereof
KR100542525B1 (ko) * 2001-01-30 2006-01-11 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치의 제조 방법
JP5519724B2 (ja) * 2001-07-17 2014-06-11 ルネサスエレクトロニクス株式会社 半導体装置
JP4173672B2 (ja) * 2002-03-19 2008-10-29 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP2006339343A (ja) 2005-06-01 2006-12-14 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
WO2012056615A1 (ja) 2010-10-26 2012-05-03 パナソニック株式会社 半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4619038A (en) * 1985-08-15 1986-10-28 Motorola, Inc. Selective titanium silicide formation
JP2689031B2 (ja) * 1991-04-01 1997-12-10 三菱電機株式会社 半導体記憶装置およびその製造方法
KR960006693B1 (ko) * 1992-11-24 1996-05-22 현대전자산업주식회사 고집적 반도체 접속장치 및 그 제조방법

Also Published As

Publication number Publication date
JPH08250600A (ja) 1996-09-27
KR960036096A (ko) 1996-10-28
TW313700B (enExample) 1997-08-21
US5677249A (en) 1997-10-14

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