KR0183010B1 - Semiconductor device having particular solder interconnection arrangement - Google Patents

Semiconductor device having particular solder interconnection arrangement Download PDF

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Publication number
KR0183010B1
KR0183010B1 KR1019900008973A KR900008973A KR0183010B1 KR 0183010 B1 KR0183010 B1 KR 0183010B1 KR 1019900008973 A KR1019900008973 A KR 1019900008973A KR 900008973 A KR900008973 A KR 900008973A KR 0183010 B1 KR0183010 B1 KR 0183010B1
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KR
South Korea
Prior art keywords
solder
semiconductor
insulating plate
semiconductor device
heat sink
Prior art date
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KR1019900008973A
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Korean (ko)
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KR910001953A (en
Inventor
가쯔요시 이자와
료오이찌 고바야시
마사유끼 오자와
Original Assignee
미다 가쓰시게
가부시기 가이샤 히다찌 세이사꾸쇼
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Publication of KR910001953A publication Critical patent/KR910001953A/en
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Publication of KR0183010B1 publication Critical patent/KR0183010B1/en

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    • H01L23/00—Details of semiconductor or other solid state devices
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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

본 발명에 의하면 반도체 장치의 절연판과 방열판 사이를 중량비 50±5/50

Figure kpo00001
의 납-주석 합금 땜납에 의하여 접합되는 것을 특징으로 하는, 열 사이클에 강한 반도체 장치가 제공된다.According to the present invention, the weight ratio is 50 ± 5/50 between the insulating plate and the heat sink of the semiconductor device.
Figure kpo00001
A semiconductor device resistant to thermal cycles is provided, which is bonded by a lead-tin alloy solder.

Description

반도체 장치Semiconductor devices

제1도는 본 발명에 의한 반도체 장치의 구성도.1 is a configuration diagram of a semiconductor device according to the present invention.

제2도는 내구시험의 결과를 나타낸 도.2 is a view showing the results of the endurance test.

제3도 내지 제5도는 본 발명의 변형예를 나타낸 도이다.3 to 5 are diagrams showing a modification of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 몰드 케이스 2 : 반도체소자1 mold case 2 semiconductor element

3 : 합금 땜납 9 : 증폭회로기판3: alloy solder 9: amplified circuit board

10, 11 : 접착제 12 : 외부단자10, 11: adhesive 12: external terminal

40 : 몰리브텐판 80 : 방열판40 molybdenum plate 80 heat sink

100 : 수납체 110 : 스위치 반도체부100: housing 110: switch semiconductor portion

120 : 증폭반도체부120: amplified semiconductor portion

본 발명은 반도체 장치에 관한 것이다.The present invention relates to a semiconductor device.

일반적으로 반도체장치의 접합부는 땜납에 의하여 접합되어 있다. 이와 같은 기술은 예를 들면 일본국 특개 소61-139047호 공보등에 개시되어 있다.Generally, the junction part of a semiconductor device is joined by soldering. Such a technique is disclosed in, for example, Japanese Patent Laid-Open No. 61-139047.

그러나, 상기한 바와 같은 반도체 장치에 있어서는 내연기관의 엔진룸내에 배치되는 경우도 있어, 열사이클에 대한 문제를 해결할 필요가 있다.However, in the semiconductor device as described above, it may be arranged in the engine room of the internal combustion engine, and it is necessary to solve the problem of the heat cycle.

예를 들면, 종래 사용되고 있던 반도체 장치에 있어서는 소위 고운 땜납으로 불리는 Pb/Sn/Ag) 합금 땜납 (중량비 93.5/5/1.5)을 사용하고 있었으나, 실제로 절연판과 방열판의 사이의 땜납에 균열이 생겨버린다는 문제가 있었다.For example, in the semiconductor device used in the past, so-called Pb / Sn / Ag) alloy solder (weight ratio 93.5 / 5 / 1.5) called fine solder is used, but the cracks actually occur in the solder between the insulating plate and the heat sink. Had a problem.

이와 같은 문제점을 제거하기 위하여, 본 발명에서는 적어도 반도체 장치의 절연판과 방열판의 사이를 중량비 50±5/50

Figure kpo00003
5를 가지는 납-주석 합금 땜납에 의하여 접합하는 것을 목적으로 하는 것이다.In order to eliminate such a problem, in the present invention, at least 50 ± 5/50 of the weight ratio between the insulating plate and the heat sink of the semiconductor device.
Figure kpo00003
It aims at joining by the lead-tin alloy solder which has 5.

이와 같이 중량비 50±5/505

Figure kpo00004
를 가지는 납-주석 합금을 사용하면 열사이클에 극히 강한 반도체 장치가 얻어졌다.Thus the weight ratio 50 ± 5/505
Figure kpo00004
The use of a lead-tin alloy having a resulted in a semiconductor device extremely resistant to thermal cycles.

이하 본 발명의 실시예를 도면에 따라 설명한다.Hereinafter, embodiments of the present invention will be described with reference to the drawings.

제1도는 반도체를 사용한 내연기관용 점화장치의 구성도로서, 몰드케이스(1)와 동(銅)으로 이루어진 방열판(80)에 의하여 수납체(100)가 형성되어 있다. 여기서 몰드케이스(1)와 방열판(80)과는 접착제(11)로 접착되어 있다.1 is a configuration diagram of an ignition apparatus for an internal combustion engine using a semiconductor, in which a housing 100 is formed by a heat dissipation plate 80 made of copper with a mold case 1. Here, the mold case 1 and the heat sink 80 are adhered with the adhesive agent 11.

수납체(100)의 내부에는 파워스위치 반도체부(110)와 증폭반도체부(120)가 수납되고, 각각은 리이드(13)에 의하여 접속되어 있고, 또 증폭반도체부(120)는 외부단자(12)와 접속되어 있다.The power switch semiconductor unit 110 and the amplifying semiconductor unit 120 are housed in the housing 100, and each is connected by a lead 13, and the amplifying semiconductor unit 120 has an external terminal 12. ) Is connected.

증폭 반도체부(120)는 증폭회로기판(9)으로 이루어지고, 이것은 접착제(10)에 의하여 방열판(80)에 접착 고정되어 있다. 한편, 파워스위치 반도체부(110)는 반도체소자(2), 방열기능을 가지는 몰리브텐 판(40), 절연판인 알루미나판(60)으로 이루어지고, 이들은 각각 땜납에 의하여 접합되어 있다. 여기서, 반도체소자(2)와 몰리브텐판(40)과는 고온땜납이라 불리는 Pb/Sn/Ag 합금땜납(중량비 93.5/5/1.5)으로 접속되고, 몰리브텐판(40)과 알루미나판(60) 및 방열판(80)의 사이는 중량비 50±5/50

Figure kpo00005
5를 가지는 납-주석 합금땜납(7)에 의하여 접합되어 있다.The amplifying semiconductor unit 120 is composed of an amplifying circuit board 9, which is adhesively fixed to the heat sink 80 by the adhesive 10. On the other hand, the power switch semiconductor unit 110 is composed of a semiconductor element 2, a molybdenum plate 40 having a heat dissipation function, and an alumina plate 60 serving as an insulating plate, which are joined by solder, respectively. Here, the semiconductor element 2 and the molybdenum plate 40 are connected by Pb / Sn / Ag alloy solder (weight ratio 93.5 / 5 / 1.5) called high temperature solder, and the molybdenum plate 40 and the alumina plate 60 are connected. ) And the heat sink 80 between the weight ratio 50 ± 5/50
Figure kpo00005
It is joined by a lead-tin alloy solder 7 having five.

다음에, 이 중량비 50±5/50

Figure kpo00006
5를 가지는 납-주석 합금땜납을 사용한 반도체 장치의 내구시험에 대하여 실시한 것을 설명한다.Next, this weight ratio 50 ± 5/50
Figure kpo00006
The endurance test of the semiconductor device using the lead-tin alloy solder having 5 will be described.

내구 시험에서는 두께 3.2㎜의 닉켈도금강판(방열판)상에 8.5㎟, 두께 0.5㎜의 텅스텐-닉켈 도금 알루미나 판 및 8.2㎟, 두께 0.25㎜의 반도체 소자(실리콘 칩)을 배치하고, 각각의 사이를 두께 100㎛의 납-주석의 배분비를 변화시킨 땜납에 의하여 접합한 시험편을 사용하여, -55℃상태에 1시간 방치, +150℃ 상태에 1시간 방치를 1사이클로하여 알루미나판과 동판의 사이에 균열이 생기는 사이클수를 측정 (plot)했다.In the endurance test, a tungsten-nickel plated alumina plate of 8.5 mm 2 and a thickness of 0.5 mm and a semiconductor element (silicon chip) of 8.2 mm and a thickness of 0.25 mm were disposed on a nickel plated steel sheet (heat-dissipating plate) having a thickness of 3.2 mm. Using a test piece bonded by solder having a change in the distribution ratio of lead-tin having a thickness of 100 μm, the sample was left for 1 hour at -55 ° C and 1 hour at + 150 ° C for a cycle between the alumina plate and the copper plate. The number of cycles in which cracks occurred was measured.

제2도는 상기한 내구시험의 결과를 나태낸 것으로, 횡축은 납-주석의 중량비, 종축은 평균수명(균열이 생길 때까지의 사이클수)을 나타내고 있다.2 shows the results of the endurance test described above. The abscissa shows the weight ratio of lead-tin and the ordinate shows the average life (number of cycles until cracking).

이 제2도로부터 이해할 수 있는 바와 같이 납-주석 합금 땜납의 중량비가 50±5/50

Figure kpo00007
5의 것을 사용하면 대략 2000 사이클에 거쳐 균열의 발생이 확인되지 아니했다.As can be understood from this FIG. 2, the weight ratio of lead-tin alloy solder is 50 ± 5/50.
Figure kpo00007
When using 5, cracks were not observed after approximately 2000 cycles.

또한, 제1도의 실시예에서는 방열판(80)과 알루미나판(60) 및 몰리브텐판(40)의 사이를 중량비 50±5/50

Figure kpo00008
5 의 납-주석 합금땜납(7)을 사용하여 접합했으나, 반도체 소자(2)와 몰리브텐판(40)의 사이도 중량비 50±5/50
Figure kpo00009
5의 납-주석 합금땜납을 사용하여 접합해도 좋다.In addition, in the embodiment of FIG. 1, the weight ratio between the heat sink 80 and the alumina plate 60 and the molybdenum plate 40 is 50 ± 5/50.
Figure kpo00008
The lead-tin alloy solder 7 of 5 was used for bonding, but the weight ratio 50 ± 5/50 was also between the semiconductor element 2 and the molybdenum plate 40.
Figure kpo00009
You may join using 5 lead-tin alloy solder.

단, 이 중량비 50±5/50

Figure kpo00010
5의 납-주석 합금땜납은 200℃ 이상에서는 접합력이 저하되는 경향이 있으므로, 가능하면 200℃ 이하의 조건이 달성되는 부분에 적용하는 것이 바람직하다.However, this weight ratio 50 ± 5/50
Figure kpo00010
Since the lead-tin alloy solder of 5 tends to lower the joining force at 200 ° C or higher, it is preferable to apply it to the part where conditions of 200 ° C or lower are achieved if possible.

특히, 이 종류의 반도체 장치에 있어서는 반도체소자의 열을 달아나게 하기 위하여 절연판(60), 방열판(80)에 향하여 방열 특성을 좋게하기 위하여 접촉면을 크게하고 있다. 따라서 이 큰 접촉 면적에 의하여 보다더 균열이 발생하기 쉬워지므로, 적어도 방열판(80)과 절연판(60)의 사이에는 중량비 50±5/50

Figure kpo00011
5 의 납-주석 합급땜납을 사용한다.In particular, in this type of semiconductor device, the contact surface is enlarged to improve the heat dissipation characteristics toward the insulating plate 60 and the heat sink 80 in order to run away the heat of the semiconductor element. Therefore, a crack is more likely to occur due to this large contact area, so at least the weight ratio 50 ± 5/50 between the heat sink 80 and the insulation plate 60.
Figure kpo00011
Use 5 lead-tin alloy solder.

다음에 제3도 내지 제5도에 의거하여 본 발명의 실시예의 변형예를 설명한다.Next, the modification of the Example of this invention is demonstrated based on FIG. 3 thru | or FIG.

제3도는 반도체소자(2)와 산화 베릴륨으로 이루어진 절연판(61)을 고온땜납(3)으로 접합하고, 동판(81)과 알루미늄판(82)을 접합한 방열판과 앞서의 산화베릴륨으로 이루어진 절연판(61)과는 중량비50±5/50

Figure kpo00012
5로 이루어진 납-주석 합금땜납(7)으로 접합하고 있다.3 is a heat sink for joining the semiconductor element 2 and the insulating plate 61 made of beryllium oxide with the high temperature solder 3, and joining the copper plate 81 and the aluminum plate 82 with the insulating plate made of beryllium oxide ( 61) and weight ratio 50 ± 5/50
Figure kpo00012
The lead-tin alloy solder 7 which consists of five is joined.

제4도는 반도체소자(2)와 동으로 이루어진 방열판(41) 및 알루미나로 이루어진 절연판(60)을 고온 땜납(3)으로 접합하고, 알루미나로 이루어진 절연판(60)과 알루미늄으로 이루어진 방열판(82)과는 중량비 50±5/50

Figure kpo00013
5의 납-주석 합금땜납(7)에 의하여 접합하고 있다.4 shows a heat sink 41 made of copper and an insulating plate 60 made of alumina bonded to each other with a high temperature solder 3, and an insulating plate 60 made of alumina and a heat sink 82 made of aluminum. Silver weight ratio 50 ± 5/50
Figure kpo00013
The lead-tin alloy solder 7 of 5 is joined.

제5도는 반도체소자(2)와 질화알루미늄으로 이루어진 절연판(62)을 고온땜납(3)으로 접합하고, 질화알루미늄으로 이루어진 절연판(62)과 알루미늄으로 이루어진 방열판(82)과는 중량비 50±5/50

Figure kpo00014
5의 납-주석 합금땜납(7)에 의하여 접합되어 있다.5 shows the semiconductor element 2 and the insulating plate 62 made of aluminum nitride bonded to each other with a high temperature solder 3, and the weight ratio 50 ± 5 / with the insulating plate 62 made of aluminum nitride and the heat sink 82 made of aluminum. 50
Figure kpo00014
The lead-tin alloy solder 7 is joined.

또한, 이들의 변형예에 있어서는 절연판과 방열판의 사이를 중량비 50±5/50

Figure kpo00015
5의 납-주석 합금땜납(7)으로 접합하고 있으나, 사용온도가 200℃ 이하이면 절연판과 반도체 소자의 사이도 중량비 50±5/50
Figure kpo00016
5의 납-주석 합금땜납으로 접합해도 좋다는 것은 앞에서 설명한 바와 같다.In these modified examples, the weight ratio is 50 ± 5/50 between the insulating plate and the heat sink.
Figure kpo00015
It is bonded with lead-tin alloy solder 7 of 5, but if the use temperature is 200 ° C or less, the weight ratio between the insulating plate and the semiconductor element is 50 ± 5/50
Figure kpo00016
The joining with the lead-tin alloy solder of 5 is as described above.

또, 실시예에서는 파워스워치 반도체 소자의 예에 대하여 설명했으나, 이에 한정되지 않고 다른 반도체 소자에 대해서도 적용이 가능하다.In addition, although the example of the powerwatch semiconductor element was demonstrated in the Example, it is not limited to this, It is applicable to other semiconductor elements.

이상 설명한 바와 같이 본 발명에 의하면 열사이클이 가해지는 상태에서 절연판과 방열판의 사이의 땜납에 균열이 생기는 것을 적게할 수 있어 실용상 극히 유효한 반도체장치를 얻을수가 있다.As described above, according to the present invention, it is possible to reduce the occurrence of cracks in the solder between the insulating plate and the heat sink in the state where the heat cycle is applied, thereby obtaining a semiconductor device which is extremely effective in practical use.

Claims (13)

반도체 장치로서, 반도체 구동소자; 상대적으로 고용점을 갖는 제1땜납(solder layer)을 개재하여 상기 반도체 구동소자에 연결되어 있는 절연판; 및 상기 제1땜납보다는 낮은 융점을 갖는 제2땜납을 개재하여 상기 절연판에 연결되는 금속 방열판을 포함하여 이루어지는 것을 특징으로 하는 반도체 장치.A semiconductor device, comprising: a semiconductor drive element; An insulating plate connected to the semiconductor driving device via a first solder layer having a relatively solid solution point; And a metal heat sink connected to the insulating plate via a second solder having a lower melting point than the first solder. 반도체 장치로서, 반도체 구동소자; 상대적으로 고용점을 갖는 제1땜납을 개재하여 상기 반도체 구동소자에 연결되어 있는 절연판; 및 상기 제1땜납보다는 낮은 융점을 갖는 제2땜납을 개재하여 상기 절연판에 연결되는 금속 방열판을 포함하며, 상기 제2땜납은, -55℃에서의 1시간 방치 및 +150℃ 에서의 1시간 방치를 1 사이클이라 할 때, 사실상 2000사이클을 초과하더라도 균열이 없는 성질을 갖는 것을 특징으로 하는 반도체 장치.A semiconductor device, comprising: a semiconductor drive element; An insulating plate connected to the semiconductor driving element via a first solder having a relatively solid solution point; And a metal heat sink connected to the insulating plate via a second solder having a lower melting point than the first solder, wherein the second solder is left at -55 ° C for 1 hour and at + 150 ° C for 1 hour. A semiconductor device characterized in that when 1 cycle, in fact, even if it exceeds 2000 cycles, there is no cracking property. 제1항에 있어서, 상기 납-주석 합금 땜납은 45/55 내지 55/45 범위내의 중량비를 갖는 것을 특징으로 하는 반도체 장치.A semiconductor device according to claim 1, wherein the lead-tin alloy solder has a weight ratio in the range of 45/55 to 55/45. 제1항에 있어서, 상기 절연판은 상기 절연판 및 상기 반도체 구동소자사이에 위치한 제2방열판에 제3땜납에 의해 고정되는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 1, wherein the insulating plate is fixed by a third solder to a second heat dissipation plate positioned between the insulating plate and the semiconductor driving element. 제1항에 있어서, 상기 절연판은 알루미나, 산화베릴륨, 질화알루미늄으로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 1, wherein the insulating plate is selected from the group consisting of alumina, beryllium oxide and aluminum nitride. 제1항에 있어서, 상기 금속 방열판은 구리 및 알루미늄으로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 1, wherein said metal heat sink is selected from the group consisting of copper and aluminum. 제4항에 있어서, 상기 절연판과 상기 반도체 구동소자 사이에 위치한 상기 제2방열판은 몰리브덴 및 구리로 구성된 그룹으로부터 선택된 물질로 제조되며, 상기 제3땜납은 45/55 내지 55/45 범위내의 중량비를 갖는 것을 특징으로 하는 반도체 제조장치.The method of claim 4, wherein the second heat sink located between the insulating plate and the semiconductor driving device is made of a material selected from the group consisting of molybdenum and copper, wherein the third solder has a weight ratio in the range of 45/55 to 55/45. It has a semiconductor manufacturing apparatus characterized by the above-mentioned. 제2항에 있어서, 상기 절연판은 45/55 내지 55/45 범위내의 중량비를 갖는 납-주석 합금 땜납에 의해, 상기 절연판 및 상기 반도체 구동소자사이에 위치한 제2방열판에 고정되는 것을 특징으로 하는 반도체 제조장치.The semiconductor according to claim 2, wherein the insulating plate is fixed to a second heat sink located between the insulating plate and the semiconductor driving element by lead-tin alloy solder having a weight ratio in the range of 45/55 to 55/45. Manufacturing equipment. 제2항에 있어서, 상기 절연판은 알루미나, 산화베릴륨, 질화알루미늄으로 구성된 그룹으로부터 선택되는 물질로 제조되는 것을 특징으로 하는 반도체 제조장치.The semiconductor manufacturing apparatus of claim 2, wherein the insulating plate is made of a material selected from the group consisting of alumina, beryllium oxide, and aluminum nitride. 제2항에 있어서, 상기 금속 방열판은 구리 및 알루미늄으로 구성된 그룹으로부터 선택된 물질로 제조되는 것을 특징으로 하는 반도체 장치.The semiconductor device of claim 2, wherein the metal heat sink is made of a material selected from the group consisting of copper and aluminum. 제8항에 있어서, 상기 절연판 및 상기 반도체 구동소자 사이에 위치한 상기 제2방열판은 몰리브덴 및 구리로 구성된 그룹으로부터 선택된 물질로 제조되는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 8, wherein the second heat sink disposed between the insulating plate and the semiconductor driving element is made of a material selected from the group consisting of molybdenum and copper. 제2항에 있어서, 상기 납-주석 합금땜납은 45/55 내지 55/45 범위내의 중량비를 갖는 것을 특징으로 하는 반도체 장치.The semiconductor device according to claim 2, wherein the lead-tin alloy solder has a weight ratio in the range of 45/55 to 55/45. 작동기를 구동하는 실리콘 반도체 구동소자와, 상기 반도체 구동소자 및 제1땜납을 개재하여 결합된 알루미나 절연판과, 상기 절연판과 제2땜납을 개재하여 결합된 구리 또는 알루미늄 금속방열판을 구비하는 반도체 장치에 있어서, 상기 제1땜납은 고온땜납이며, 상기 제2땜납은 상기 제1땜납보다 낮은 용점을 갖는 땜납이며 중량비 50
Figure kpo00017
5/50＋5 의 납-주석 합금 땜납인 것을 특징으로 하는 반도체 장치.A semiconductor device comprising a silicon semiconductor driving device for driving an actuator, an alumina insulating plate coupled through the semiconductor driving element and a first solder, and a copper or aluminum metal heat dissipating plate coupled through the insulating plate and a second solder. The first solder is a high temperature solder, the second solder is a solder having a lower melting point than the first solder and the weight ratio 50
Figure kpo00017
It is 5/50 + 5 lead-tin alloy solder, The semiconductor device characterized by the above-mentioned.
KR1019900008973A 1989-06-28 1990-06-19 Semiconductor device having particular solder interconnection arrangement KR0183010B1 (en)

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