JPS62216251A - High thermal conductive substrate - Google Patents

Abstract

PURPOSE:To remove the nonuniformity of the soldering of a semiconductor, to reduce the dispersion of thermal resistance and to improve reliability by polishing and smoothing the surface of a Cu plate joined with an AlN substrate to a specific state. CONSTITUTION:Cu plates are brought into contact and arranged to both surfaces of an AlN substrate baked through an atmosphere sintering method with ther mal conductivity of 150W/mK or more and surface roughness of 2-5mum from tough pitch electrolytic copper in the thickness of 0.1-0.2mm, and heated at 1,070 deg.C in nitrogen atmosphere, thus joining both the substrate and the Cu plates. A Cu surface is smoothed up to smoothness of 10mum or less, and the Cu plate is plated with Ni and Au in succession, and cut to a chip shape. Workability is improved extremely on barrel polishing for smoothing, and the corners and ridges of the Cu plate are rounded and the Cu plate is not broken during semiconductor assembly, thus easily inspecting the state of soldering. According ly, solder wettability is improved, and the nonuniformity of the soldering of a semiconductor at a time when the substrate is used as the one for mounting the semiconductor is eliminated, thus reducing the dispersion of thermal resis tance.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a highly thermally conductive substrate useful as a semiconductor mounting substrate.

(Prior Art) A highly thermally conductive substrate is used as a substrate on which a semiconductor is mounted to radiate heat generated from the semiconductor. Conventionally, a BeO substrate has been commonly used as a highly thermally conductive substrate, but due to its high cost and toxicity, the use of a Cu plate bonded to an AβN substrate is being considered.

The following method is used to bond a Cu plate to an AλN substrate. That is, a Cu plate containing an appropriate amount of oxygen is placed in contact with an AβN substrate, and the melting point of Cu (1083
(°C) or lower, heating is carried out at a temperature range above the CU-O eutectic temperature (10f35°C), for example, 1070°C.

In this way, heating to a high temperature close to the melting point of Cu causes the growth of Cu particles, and grain boundaries with a high oxygen concentration in Cu contribute to bonding as CU-O eutectic.
By creating irregularities between particles, the surface of the Cu plate bonded to the AβN substrate has a flatness of 20 μm or more and a surface roughness of 10 μm.
μm or more, which remains unchanged even after plating. When mounting a semiconductor chip, especially one smaller than 1 dragon, on a board with such a rough surface, uneven soldering may occur.
There was a problem in that the thermal resistance varied, reducing reliability.

The present invention has been made to solve these problems, and it is an object of the present invention to provide a highly thermally conductive substrate that eliminates uneven soldering, reduces variations in thermal resistance, and improves semiconductor device performance.

[Structure of the Invention] (Means for Solving the Problems) The present invention involves polishing and smoothing the surface of a Cu plate bonded to an AβN substrate to a flatness of 10 μm or less and a surface roughness of 10 μm or less. This eliminates uneven soldering of semiconductors, reduces variations in thermal resistance, and improves reliability.

Polishing methods include mechanical grinding such as barrel, tampling, and lapping, and chemical grinding such as etching, but especially when barrel polishing is used, the corners and ridges of the Cu plate are smoothed and exhibits a chamfered structure. This has the advantage of improving the soldering joint strength, preventing chipping when mounting and assembling semiconductors, and facilitating joint inspection.

(Example) Next, examples of the present invention will be described.

Af! molded by sheet molding method and fired by pressureless sintering method with thermal conductivity of 150 W/mK or more and surface roughness of 2 to 5 microns! , N substrate (size 50mm x 50mm x 0.3
A CU plate made of tough pitch electrolytic copper with a thickness of 0.1 to 0.2 mm was placed in contact with both sides of the 5 mm), and heated at 1070° in nitrogen.
The two were joined by heating to C. As shown in FIG. 3(a) and its enlarged sectional view, FIG. 3(b), the surface of the Cu plate 2 bonded to the AβN substrate 1 has a flatness of 10 to 50 μm.
It was rough. After barrel polishing this, the first
As shown in FIG. 1(a) and its enlarged cross-sectional view in FIG. 1(b), the Cu surface was smoothed to a flatness of 10 μm or less. Ni plating and AU plating are sequentially applied to the smoothed Cu plate, and then 2 mm x 2 mm and 0.
It was cut into 7mm×O, 7mm chips. Note that after cutting into chips as described above, Ni plating or AU plating may be applied. Alternatively, the material may be cut into chips before barrel polishing, and the cut chips may be barrel polished. When barrel polished in this way, workability is extremely good, and as shown in Figure 2, the corners and edges of the CU board are rounded, eliminating chipping during semiconductor assembly, and making it easy to inspect the soldering condition. can.

AβN plated with Ni and Au in this way
Semiconductor chips were soldered to the substrate-CD board and wires were bonded thereto, and both solder wettability and wire bonding properties were good, and the solder bonding strength was 1.5 times greater than that of the conventional method, with less unevenness. Next, a semiconductor device was manufactured by hermetically sealing it by a predetermined method. The semiconductor device manufactured in this way had a small variation in thermal resistance of ±1%, and the power cycle test was 10 times as large.

On the other hand, when using a conventional CD plate bonded to an AβN substrate with a rough surface (flatness of 10 μm or more), the thermal resistance was ±10%, and the power cycle test was 1 times as high.

[Effects of the Invention] As explained above, the highly thermally conductive substrate of the present invention has Aj!
Since the surface of the CD plate bonded to the N substrate is smooth, the solder wettability is good, and therefore, when used as a semiconductor mounting board, there is no uneven soldering of the semiconductor, and variations in thermal resistance are reduced. Further, the wire bondability is good, the performance of the semiconductor device is significantly improved, and a highly reliable semiconductor device can be obtained.

The highly thermally conductive substrate of the present invention includes an overlay transistor,
It is useful as a substrate for small-sized semiconductors such as laser diodes, and as a heat sink for semiconductors.

[Brief Description of the Drawings] Figure 1(a) is a cross-sectional view showing an embodiment of the highly thermally conductive substrate of the present invention, and Figure 1(b) is an enlarged cross-sectional view of the Cu plate shown in Figure 1(a). , FIG. 2 is a sectional view showing another embodiment of the highly thermally conductive substrate of the present invention, FIG. 3(a) is a sectional view showing a conventional highly thermally conductive substrate, and FIG. 3(b) is FIG. It is an enlarged sectional view of the Cu board of (a). 1...AJ2N board 2...C1 board Figure 3

Claims (3)

[Claims] (1) A Cu plate is directly bonded to at least one surface of an AlN substrate, and the surface roughness and flatness of the Cu plate are both 10.
A highly thermally conductive substrate characterized by being polished to a thickness of μm or less. (2) The highly thermally conductive substrate according to claim 1, wherein the corners and edges of the Cu plate are chamfered. (3) The highly thermally conductive substrate according to claim 1, wherein the polishing is performed by barrel polishing.