JPWO2023022179A1 - - Google Patents
Info
- Publication number
- JPWO2023022179A1 JPWO2023022179A1 JP2023542430A JP2023542430A JPWO2023022179A1 JP WO2023022179 A1 JPWO2023022179 A1 JP WO2023022179A1 JP 2023542430 A JP2023542430 A JP 2023542430A JP 2023542430 A JP2023542430 A JP 2023542430A JP WO2023022179 A1 JPWO2023022179 A1 JP WO2023022179A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/42—Vias, e.g. via plugs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/016—Manufacture or treatment using moulds
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
- H10W74/47—Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
- H10W74/473—Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins containing a filler
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W99/00—Subject matter not provided for in other groups of this subclass
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
- G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4246—Bidirectionally operating package structures
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4274—Electrical aspects
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
- H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
- H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W80/00—Direct bonding of chips, wafers or substrates
- H10W80/301—Bonding techniques, e.g. hybrid bonding
- H10W80/312—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of electrically conductive pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W80/00—Direct bonding of chips, wafers or substrates
- H10W80/301—Bonding techniques, e.g. hybrid bonding
- H10W80/327—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/733—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between laterally-adjacent chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2024085925A JP7832985B2 (ja) | 2021-08-20 | 2024-05-28 | 半導体モジュールおよび電子装置 |
| JP2025252176A JP2026031831A (ja) | 2021-08-20 | 2025-12-16 | 半導体モジュールおよび電子装置 |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021135043 | 2021-08-20 | ||
| JP2021135043 | 2021-08-20 | ||
| JP2022032024 | 2022-03-02 | ||
| JP2022032024 | 2022-03-02 | ||
| PCT/JP2022/031116 WO2023022179A1 (ja) | 2021-08-20 | 2022-08-17 | 半導体モジュールおよびその製造方法、電子装置、電子モジュール、ならびに電子装置の製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024085925A Division JP7832985B2 (ja) | 2021-08-20 | 2024-05-28 | 半導体モジュールおよび電子装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2023022179A1 true JPWO2023022179A1 (https=) | 2023-02-23 |
| JPWO2023022179A5 JPWO2023022179A5 (https=) | 2023-12-22 |
| JP7496942B2 JP7496942B2 (ja) | 2024-06-07 |
Family
ID=85239847
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023542430A Active JP7496942B2 (ja) | 2021-08-20 | 2022-08-17 | 半導体モジュールおよびその製造方法、電子装置、電子モジュール、ならびに電子装置の製造方法 |
| JP2024085925A Active JP7832985B2 (ja) | 2021-08-20 | 2024-05-28 | 半導体モジュールおよび電子装置 |
| JP2025252176A Pending JP2026031831A (ja) | 2021-08-20 | 2025-12-16 | 半導体モジュールおよび電子装置 |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024085925A Active JP7832985B2 (ja) | 2021-08-20 | 2024-05-28 | 半導体モジュールおよび電子装置 |
| JP2025252176A Pending JP2026031831A (ja) | 2021-08-20 | 2025-12-16 | 半導体モジュールおよび電子装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20250015002A1 (https=) |
| JP (3) | JP7496942B2 (https=) |
| KR (1) | KR20240046499A (https=) |
| TW (1) | TW202322323A (https=) |
| WO (1) | WO2023022179A1 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021182529A1 (ja) | 2020-03-10 | 2021-09-16 | 日本製鉄株式会社 | 曲げ加工装置、鋼矢板の製造設備、曲げ加工方法、及び、鋼矢板の製造方法 |
| JPWO2024219502A1 (https=) * | 2023-04-19 | 2024-10-24 | ||
| US20240429142A1 (en) * | 2023-06-26 | 2024-12-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and manufacturing method thereof |
| US20250006644A1 (en) * | 2023-06-29 | 2025-01-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package and manufacturing method thereof |
| CN121889709A (zh) * | 2023-09-27 | 2026-04-17 | 古河电气工业株式会社 | 基板组件 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2019125779A (ja) * | 2017-12-08 | 2019-07-25 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | ウエハレベルのダイブリッジのための方法及び装置 |
| US20200176384A1 (en) * | 2018-11-29 | 2020-06-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package and method of manufacturing the same |
| JP2020528220A (ja) * | 2017-08-11 | 2020-09-17 | アドバンスト・マイクロ・ディバイシズ・インコーポレイテッドAdvanced Micro Devices Incorporated | 成形チップの組み合わせ |
| US20210091005A1 (en) * | 2019-09-25 | 2021-03-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor package and manufacturing method thereof |
| US20210134728A1 (en) * | 2019-11-06 | 2021-05-06 | International Business Machines Corporation | Multi-chip package structures having embedded chip interconnect bridges and fan-out redistribution layers |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20090059504A (ko) * | 2007-12-06 | 2009-06-11 | 삼성전자주식회사 | 반도체 장치 및 그 제조방법들 |
| US8637392B2 (en) * | 2010-02-05 | 2014-01-28 | International Business Machines Corporation | Solder interconnect with non-wettable sidewall pillars and methods of manufacture |
| JP2014236188A (ja) * | 2013-06-05 | 2014-12-15 | イビデン株式会社 | 配線板及びその製造方法 |
| US9443824B1 (en) * | 2015-03-30 | 2016-09-13 | Qualcomm Incorporated | Cavity bridge connection for die split architecture |
| US10622311B2 (en) * | 2017-08-10 | 2020-04-14 | International Business Machines Corporation | High-density interconnecting adhesive tape |
| US10340253B2 (en) * | 2017-09-26 | 2019-07-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package structure and method of manufacturing the same |
| US10797022B2 (en) * | 2017-10-06 | 2020-10-06 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
| US11735533B2 (en) | 2019-06-11 | 2023-08-22 | Intel Corporation | Heterogeneous nested interposer package for IC chips |
| US20210005542A1 (en) | 2019-07-03 | 2021-01-07 | Intel Corporation | Nested interposer package for ic chips |
| JP2021040012A (ja) * | 2019-09-02 | 2021-03-11 | キオクシア株式会社 | 半導体装置の製造方法 |
| US11239167B2 (en) * | 2019-12-04 | 2022-02-01 | International Business Machines Corporation | Cu—Cu bonding for interconnects on bridge chip attached to chips and packaging substrate |
| US11574872B2 (en) * | 2019-12-18 | 2023-02-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of manufacturing the same |
| US11276620B2 (en) * | 2019-12-30 | 2022-03-15 | Advanced Semiconductor Engineering, Inc. | Package structure and method for manufacturing the same |
-
2022
- 2022-08-17 WO PCT/JP2022/031116 patent/WO2023022179A1/ja not_active Ceased
- 2022-08-17 KR KR1020247004921A patent/KR20240046499A/ko active Pending
- 2022-08-17 US US18/684,440 patent/US20250015002A1/en active Pending
- 2022-08-17 JP JP2023542430A patent/JP7496942B2/ja active Active
- 2022-08-19 TW TW111131350A patent/TW202322323A/zh unknown
-
2024
- 2024-05-28 JP JP2024085925A patent/JP7832985B2/ja active Active
-
2025
- 2025-12-16 JP JP2025252176A patent/JP2026031831A/ja active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020528220A (ja) * | 2017-08-11 | 2020-09-17 | アドバンスト・マイクロ・ディバイシズ・インコーポレイテッドAdvanced Micro Devices Incorporated | 成形チップの組み合わせ |
| JP2019125779A (ja) * | 2017-12-08 | 2019-07-25 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | ウエハレベルのダイブリッジのための方法及び装置 |
| US20200176384A1 (en) * | 2018-11-29 | 2020-06-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package and method of manufacturing the same |
| US20210091005A1 (en) * | 2019-09-25 | 2021-03-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor package and manufacturing method thereof |
| US20210134728A1 (en) * | 2019-11-06 | 2021-05-06 | International Business Machines Corporation | Multi-chip package structures having embedded chip interconnect bridges and fan-out redistribution layers |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2026031831A (ja) | 2026-02-24 |
| WO2023022179A1 (ja) | 2023-02-23 |
| US20250015002A1 (en) | 2025-01-09 |
| JP2024101006A (ja) | 2024-07-26 |
| KR20240046499A (ko) | 2024-04-09 |
| JP7496942B2 (ja) | 2024-06-07 |
| JP7832985B2 (ja) | 2026-03-18 |
| TW202322323A (zh) | 2023-06-01 |
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| Date | Code | Title | Description |
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