JPWO2022168217A1 - - Google Patents

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Publication number
JPWO2022168217A1
JPWO2022168217A1 JP2022579226A JP2022579226A JPWO2022168217A1 JP WO2022168217 A1 JPWO2022168217 A1 JP WO2022168217A1 JP 2022579226 A JP2022579226 A JP 2022579226A JP 2022579226 A JP2022579226 A JP 2022579226A JP WO2022168217 A1 JPWO2022168217 A1 JP WO2022168217A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022579226A
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Japanese (ja)
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JPWO2022168217A5 (https=
JP7475503B2 (ja
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Publication of JPWO2022168217A5 publication Critical patent/JPWO2022168217A5/ja
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H10P34/422—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing using incoherent radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7434—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
JP2022579226A 2021-02-04 2021-02-04 半導体基板の製造方法および半導体装置の製造方法 Active JP7475503B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/004035 WO2022168217A1 (ja) 2021-02-04 2021-02-04 半導体基板の製造方法および半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JPWO2022168217A1 true JPWO2022168217A1 (https=) 2022-08-11
JPWO2022168217A5 JPWO2022168217A5 (https=) 2023-04-06
JP7475503B2 JP7475503B2 (ja) 2024-04-26

Family

ID=82740968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022579226A Active JP7475503B2 (ja) 2021-02-04 2021-02-04 半導体基板の製造方法および半導体装置の製造方法

Country Status (6)

Country Link
US (1) US20240030055A1 (https=)
EP (1) EP4290553A4 (https=)
JP (1) JP7475503B2 (https=)
KR (1) KR102760469B1 (https=)
CN (1) CN116868309A (https=)
WO (1) WO2022168217A1 (https=)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005109208A (ja) * 2003-09-30 2005-04-21 Shin Etsu Handotai Co Ltd 発光素子の製造方法
JP2012524399A (ja) * 2009-04-16 2012-10-11 スス マイクロテク リソグラフィー，ゲーエムベーハー 一時的なウェハーボンディング及びデボンディングのための改善された装置
JP2014239179A (ja) * 2013-06-10 2014-12-18 日本電信電話株式会社 窒化物半導体装置の製造方法
WO2017119412A1 (ja) * 2016-01-07 2017-07-13 国立研究開発法人産業技術総合研究所 光可逆接着剤
WO2018143344A1 (ja) * 2017-02-02 2018-08-09 三菱電機株式会社 半導体製造方法および半導体製造装置
JP2018538684A (ja) * 2015-11-20 2018-12-27 アールエフエイチアイシー コーポレイション デバイス処理のための半導体オンダイヤモンドウェハのマウンティング
JP2019527477A (ja) * 2016-07-12 2019-09-26 キューエムエイティ・インコーポレーテッド ドナー基材を再生するための方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06268183A (ja) 1993-03-15 1994-09-22 Fujitsu Ltd 半導体装置の製造方法
US6071795A (en) * 1998-01-23 2000-06-06 The Regents Of The University Of California Separation of thin films from transparent substrates by selective optical processing
WO2002084631A1 (en) * 2001-04-11 2002-10-24 Sony Corporation Element transfer method, element arrangmenet method using the same, and image display apparatus production method
US6911375B2 (en) * 2003-06-02 2005-06-28 International Business Machines Corporation Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
EP1571705A3 (fr) * 2004-03-01 2006-01-04 S.O.I.Tec Silicon on Insulator Technologies Réalisation d'une entité en matériau semiconducteur sur substrat
JP4654389B2 (ja) * 2006-01-16 2011-03-16 株式会社ムサシノエンジニアリング ダイヤモンドヒートスプレッダの常温接合方法，及び半導体デバイスの放熱部
US20080122119A1 (en) * 2006-08-31 2008-05-29 Avery Dennison Corporation Method and apparatus for creating rfid devices using masking techniques
FR2921515B1 (fr) * 2007-09-25 2010-07-30 Commissariat Energie Atomique Procede de fabrication de structures semiconductrices utiles pour la realisation de substrats semiconducteur- sur-isolant, et ses applications.
JP5466578B2 (ja) * 2010-05-27 2014-04-09 株式会社神戸製鋼所 ダイヤモンド・アルミニウム接合体及びその製造方法
WO2014095373A1 (en) * 2012-12-18 2014-06-26 Element Six Limited Substrates for semiconductor devices
JP6004100B2 (ja) * 2013-05-24 2016-10-05 富士電機株式会社 半導体装置の製造方法
GB201610886D0 (en) * 2016-06-22 2016-08-03 Element Six Tech Ltd Bonding of diamond wafers to carrier substrates
JP2019026817A (ja) 2017-08-04 2019-02-21 国立研究開発法人産業技術総合研究所 光応答性粘接着剤
KR102734318B1 (ko) * 2019-11-08 2024-11-25 에베 그룹 에. 탈너 게엠베하 기판 결합 장치 및 방법

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005109208A (ja) * 2003-09-30 2005-04-21 Shin Etsu Handotai Co Ltd 発光素子の製造方法
JP2012524399A (ja) * 2009-04-16 2012-10-11 スス マイクロテク リソグラフィー，ゲーエムベーハー 一時的なウェハーボンディング及びデボンディングのための改善された装置
JP2014239179A (ja) * 2013-06-10 2014-12-18 日本電信電話株式会社 窒化物半導体装置の製造方法
JP2018538684A (ja) * 2015-11-20 2018-12-27 アールエフエイチアイシー コーポレイション デバイス処理のための半導体オンダイヤモンドウェハのマウンティング
WO2017119412A1 (ja) * 2016-01-07 2017-07-13 国立研究開発法人産業技術総合研究所 光可逆接着剤
JP2019527477A (ja) * 2016-07-12 2019-09-26 キューエムエイティ・インコーポレーテッド ドナー基材を再生するための方法
WO2018143344A1 (ja) * 2017-02-02 2018-08-09 三菱電機株式会社 半導体製造方法および半導体製造装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
FRANCIS D ET AL.: "Formation and characterization of 4-inch GaN-on-diamond substrates", DIAMOND AND RELATED MATERIALS, vol. Volume 19, Issues 2-3, JPN6024010697, February 2010 (2010-02-01), pages 229 - 233, ISSN: 0005286464 *

Also Published As

Publication number Publication date
KR20230116016A (ko) 2023-08-03
EP4290553A1 (en) 2023-12-13
WO2022168217A1 (ja) 2022-08-11
CN116868309A (zh) 2023-10-10
US20240030055A1 (en) 2024-01-25
KR102760469B1 (ko) 2025-01-24
JP7475503B2 (ja) 2024-04-26
EP4290553A4 (en) 2024-04-03

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