JPWO2022131059A1 - - Google Patents
Info
- Publication number
- JPWO2022131059A1 JPWO2022131059A1 JP2022569881A JP2022569881A JPWO2022131059A1 JP WO2022131059 A1 JPWO2022131059 A1 JP WO2022131059A1 JP 2022569881 A JP2022569881 A JP 2022569881A JP 2022569881 A JP2022569881 A JP 2022569881A JP WO2022131059 A1 JPWO2022131059 A1 JP WO2022131059A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/01—Manufacture or treatment
- H10D8/051—Manufacture or treatment of Schottky diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
- H10D8/605—Schottky-barrier diodes of the trench conductor-insulator-semiconductor barrier type, e.g. trench MOS barrier Schottky rectifiers [TMBS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/104—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2020209672 | 2020-12-17 | ||
| PCT/JP2021/044789 WO2022131059A1 (ja) | 2020-12-17 | 2021-12-06 | 半導体素子の製造方法、半導体素子及び半導体装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2022131059A1 true JPWO2022131059A1 (https=) | 2022-06-23 |
Family
ID=82057670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022569881A Pending JPWO2022131059A1 (https=) | 2020-12-17 | 2021-12-06 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20230326993A1 (https=) |
| EP (1) | EP4266350A1 (https=) |
| JP (1) | JPWO2022131059A1 (https=) |
| CN (1) | CN116569338A (https=) |
| WO (1) | WO2022131059A1 (https=) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012114263A (ja) * | 2010-11-25 | 2012-06-14 | Pawdec:Kk | 半導体素子およびその製造方法 |
| JP2012124268A (ja) * | 2010-12-07 | 2012-06-28 | Nippon Inter Electronics Corp | 半導体装置 |
| JP2015056471A (ja) * | 2013-09-11 | 2015-03-23 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP2015099903A (ja) * | 2013-10-17 | 2015-05-28 | ローム株式会社 | 窒化物半導体装置およびその製造方法 |
| WO2019232230A1 (en) * | 2018-05-30 | 2019-12-05 | The Regents Of The University Of California | Method of removing semiconducting layers from a semiconducting substrate |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4667556B2 (ja) * | 2000-02-18 | 2011-04-13 | 古河電気工業株式会社 | 縦型GaN系電界効果トランジスタ、バイポーラトランジスタと縦型GaN系電界効果トランジスタの製造方法 |
| JP2009076866A (ja) * | 2007-08-31 | 2009-04-09 | Sumitomo Electric Ind Ltd | ショットキーバリアダイオード |
| JP5888214B2 (ja) * | 2012-11-30 | 2016-03-16 | 富士電機株式会社 | 窒化物系化合物半導体装置およびその製造方法 |
| JP6070422B2 (ja) | 2013-05-31 | 2017-02-01 | 豊田合成株式会社 | 半導体素装置の製造方法及び半導体装置 |
| JP2016031953A (ja) * | 2014-07-25 | 2016-03-07 | 株式会社タムラ製作所 | 半導体素子及びその製造方法、半導体基板、並びに結晶積層構造体 |
-
2021
- 2021-12-06 JP JP2022569881A patent/JPWO2022131059A1/ja active Pending
- 2021-12-06 EP EP21906422.7A patent/EP4266350A1/en not_active Withdrawn
- 2021-12-06 WO PCT/JP2021/044789 patent/WO2022131059A1/ja not_active Ceased
- 2021-12-06 CN CN202180082891.8A patent/CN116569338A/zh active Pending
-
2023
- 2023-06-13 US US18/333,747 patent/US20230326993A1/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012114263A (ja) * | 2010-11-25 | 2012-06-14 | Pawdec:Kk | 半導体素子およびその製造方法 |
| JP2012124268A (ja) * | 2010-12-07 | 2012-06-28 | Nippon Inter Electronics Corp | 半導体装置 |
| JP2015056471A (ja) * | 2013-09-11 | 2015-03-23 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP2015099903A (ja) * | 2013-10-17 | 2015-05-28 | ローム株式会社 | 窒化物半導体装置およびその製造方法 |
| WO2019232230A1 (en) * | 2018-05-30 | 2019-12-05 | The Regents Of The University Of California | Method of removing semiconducting layers from a semiconducting substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2022131059A1 (ja) | 2022-06-23 |
| EP4266350A1 (en) | 2023-10-25 |
| CN116569338A (zh) | 2023-08-08 |
| US20230326993A1 (en) | 2023-10-12 |
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