JPWO2021009586A5 - - Google Patents

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Publication number
JPWO2021009586A5
JPWO2021009586A5 JP2021532540A JP2021532540A JPWO2021009586A5 JP WO2021009586 A5 JPWO2021009586 A5 JP WO2021009586A5 JP 2021532540 A JP2021532540 A JP 2021532540A JP 2021532540 A JP2021532540 A JP 2021532540A JP WO2021009586 A5 JPWO2021009586 A5 JP WO2021009586A5
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JP
Japan
Prior art keywords
circuit
sum
products operation
memory cells
line driver
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Application number
JP2021532540A
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English (en)
Japanese (ja)
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JP7692828B2 (ja
JPWO2021009586A1 (cg-RX-API-DMAC7.html
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Priority claimed from PCT/IB2020/056106 external-priority patent/WO2021009586A1/ja
Publication of JPWO2021009586A1 publication Critical patent/JPWO2021009586A1/ja
Publication of JPWO2021009586A5 publication Critical patent/JPWO2021009586A5/ja
Priority to JP2025093353A priority Critical patent/JP2025120272A/ja
Application granted granted Critical
Publication of JP7692828B2 publication Critical patent/JP7692828B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2021532540A 2019-07-12 2020-06-29 半導体装置、電子部品、及び電子機器 Active JP7692828B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025093353A JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019129927 2019-07-12
JP2019129927 2019-07-12
PCT/IB2020/056106 WO2021009586A1 (ja) 2019-07-12 2020-06-29 積和演算回路と記憶装置を有する半導体装置、電子部品、および電子機器

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025093353A Division JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2021009586A1 JPWO2021009586A1 (cg-RX-API-DMAC7.html) 2021-01-21
JPWO2021009586A5 true JPWO2021009586A5 (cg-RX-API-DMAC7.html) 2023-06-16
JP7692828B2 JP7692828B2 (ja) 2025-06-16

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ID=74210226

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2021532540A Active JP7692828B2 (ja) 2019-07-12 2020-06-29 半導体装置、電子部品、及び電子機器
JP2025093353A Pending JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025093353A Pending JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Country Status (3)

Country Link
US (1) US20220276834A1 (cg-RX-API-DMAC7.html)
JP (2) JP7692828B2 (cg-RX-API-DMAC7.html)
WO (1) WO2021009586A1 (cg-RX-API-DMAC7.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20240038726A1 (en) * 2021-02-10 2024-02-01 Panasonic Intellectual Property Management Co., Ltd. Ai module
US12131794B2 (en) * 2022-08-23 2024-10-29 Micron Technology, Inc. Structures for word line multiplexing in three-dimensional memory arrays

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04368692A (ja) * 1991-06-17 1992-12-21 Mitsubishi Electric Corp 半導体記憶装置
JPH1188142A (ja) * 1997-09-09 1999-03-30 Mitsubishi Electric Corp 半導体装置およびそれを搭載した回路モジュール
TWI555128B (zh) 2010-08-06 2016-10-21 半導體能源研究所股份有限公司 半導體裝置及半導體裝置的驅動方法
JP7173709B2 (ja) 2017-04-14 2022-11-16 株式会社半導体エネルギー研究所 ニューラルネットワーク回路
JP7004453B2 (ja) * 2017-08-11 2022-01-21 株式会社半導体エネルギー研究所 グラフィックスプロセッシングユニット
JP2019047006A (ja) * 2017-09-05 2019-03-22 株式会社半導体エネルギー研究所 半導体装置、電子機器

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