JPWO2021009586A1 - - Google Patents

Info

Publication number
JPWO2021009586A1
JPWO2021009586A1 JP2021532540A JP2021532540A JPWO2021009586A1 JP WO2021009586 A1 JPWO2021009586 A1 JP WO2021009586A1 JP 2021532540 A JP2021532540 A JP 2021532540A JP 2021532540 A JP2021532540 A JP 2021532540A JP WO2021009586 A1 JPWO2021009586 A1 JP WO2021009586A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021532540A
Other languages
Japanese (ja)
Other versions
JP7692828B2 (ja
JPWO2021009586A5 (cg-RX-API-DMAC7.html
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021009586A1 publication Critical patent/JPWO2021009586A1/ja
Publication of JPWO2021009586A5 publication Critical patent/JPWO2021009586A5/ja
Priority to JP2025093353A priority Critical patent/JP2025120272A/ja
Application granted granted Critical
Publication of JP7692828B2 publication Critical patent/JP7692828B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443Sum of products
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/48Analogue computers for specific processes, systems or devices, e.g. simulators
    • G06G7/60Analogue computers for specific processes, systems or devices, e.g. simulators for living beings, e.g. their nervous systems ; for problems in the medical field
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733Multi-gate TFTs
    • H10D30/6734Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6757Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Neurology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Biophysics (AREA)
  • Mathematical Physics (AREA)
  • Molecular Biology (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Artificial Intelligence (AREA)
  • Physiology (AREA)
  • Neurosurgery (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Software Systems (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Databases & Information Systems (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2021532540A 2019-07-12 2020-06-29 半導体装置、電子部品、及び電子機器 Active JP7692828B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025093353A JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019129927 2019-07-12
JP2019129927 2019-07-12
PCT/IB2020/056106 WO2021009586A1 (ja) 2019-07-12 2020-06-29 積和演算回路と記憶装置を有する半導体装置、電子部品、および電子機器

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025093353A Division JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2021009586A1 true JPWO2021009586A1 (cg-RX-API-DMAC7.html) 2021-01-21
JPWO2021009586A5 JPWO2021009586A5 (cg-RX-API-DMAC7.html) 2023-06-16
JP7692828B2 JP7692828B2 (ja) 2025-06-16

Family

ID=74210226

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2021532540A Active JP7692828B2 (ja) 2019-07-12 2020-06-29 半導体装置、電子部品、及び電子機器
JP2025093353A Pending JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025093353A Pending JP2025120272A (ja) 2019-07-12 2025-06-04 半導体装置

Country Status (3)

Country Link
US (1) US20220276834A1 (cg-RX-API-DMAC7.html)
JP (2) JP7692828B2 (cg-RX-API-DMAC7.html)
WO (1) WO2021009586A1 (cg-RX-API-DMAC7.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20240038726A1 (en) * 2021-02-10 2024-02-01 Panasonic Intellectual Property Management Co., Ltd. Ai module
US12131794B2 (en) * 2022-08-23 2024-10-29 Micron Technology, Inc. Structures for word line multiplexing in three-dimensional memory arrays

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04368692A (ja) * 1991-06-17 1992-12-21 Mitsubishi Electric Corp 半導体記憶装置
JPH1188142A (ja) * 1997-09-09 1999-03-30 Mitsubishi Electric Corp 半導体装置およびそれを搭載した回路モジュール
JP2015165447A (ja) * 2010-08-06 2015-09-17 株式会社半導体エネルギー研究所 半導体装置
WO2018189620A1 (ja) * 2017-04-14 2018-10-18 株式会社半導体エネルギー研究所 ニューラルネットワーク回路
JP2019036280A (ja) * 2017-08-11 2019-03-07 株式会社半導体エネルギー研究所 グラフィックスプロセッシングユニット、コンピュータ、電子機器及び並列計算機
JP2019047006A (ja) * 2017-09-05 2019-03-22 株式会社半導体エネルギー研究所 半導体装置、電子機器

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04368692A (ja) * 1991-06-17 1992-12-21 Mitsubishi Electric Corp 半導体記憶装置
JPH1188142A (ja) * 1997-09-09 1999-03-30 Mitsubishi Electric Corp 半導体装置およびそれを搭載した回路モジュール
JP2015165447A (ja) * 2010-08-06 2015-09-17 株式会社半導体エネルギー研究所 半導体装置
WO2018189620A1 (ja) * 2017-04-14 2018-10-18 株式会社半導体エネルギー研究所 ニューラルネットワーク回路
JP2019036280A (ja) * 2017-08-11 2019-03-07 株式会社半導体エネルギー研究所 グラフィックスプロセッシングユニット、コンピュータ、電子機器及び並列計算機
JP2019047006A (ja) * 2017-09-05 2019-03-22 株式会社半導体エネルギー研究所 半導体装置、電子機器

Also Published As

Publication number Publication date
JP7692828B2 (ja) 2025-06-16
US20220276834A1 (en) 2022-09-01
JP2025120272A (ja) 2025-08-15
WO2021009586A1 (ja) 2021-01-21

Similar Documents

Publication Publication Date Title
BR112021017339A2 (cg-RX-API-DMAC7.html)
BR112021018450A2 (cg-RX-API-DMAC7.html)
BR112021017637A2 (cg-RX-API-DMAC7.html)
BR112021017892A2 (cg-RX-API-DMAC7.html)
BR112021017782A2 (cg-RX-API-DMAC7.html)
BR112021017939A2 (cg-RX-API-DMAC7.html)
BR112021017738A2 (cg-RX-API-DMAC7.html)
BR112019016141A2 (cg-RX-API-DMAC7.html)
BR112021016996A2 (cg-RX-API-DMAC7.html)
BR112021018452A2 (cg-RX-API-DMAC7.html)
BR112021017703A2 (cg-RX-API-DMAC7.html)
BR112021017728A2 (cg-RX-API-DMAC7.html)
BR112021017234A2 (cg-RX-API-DMAC7.html)
BR112021018168A2 (cg-RX-API-DMAC7.html)
BR112021017083A2 (cg-RX-API-DMAC7.html)
BR112021017732A2 (cg-RX-API-DMAC7.html)
BR112021018250A2 (cg-RX-API-DMAC7.html)
BR112021017355A2 (cg-RX-API-DMAC7.html)
BR112021018093A2 (cg-RX-API-DMAC7.html)
BR112021017173A2 (cg-RX-API-DMAC7.html)
BR112021018102A2 (cg-RX-API-DMAC7.html)
BR112021018584A2 (cg-RX-API-DMAC7.html)
BR112021017310A2 (cg-RX-API-DMAC7.html)
BR112021017010A2 (cg-RX-API-DMAC7.html)
BR112021018484A2 (cg-RX-API-DMAC7.html)

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230608

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230608

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20240730

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240920

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20250107

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20250217

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20250527

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20250604

R150 Certificate of patent or registration of utility model

Ref document number: 7692828

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150