JPWO2020136470A1 - - Google Patents
Info
- Publication number
- JPWO2020136470A1 JPWO2020136470A1 JP2020561969A JP2020561969A JPWO2020136470A1 JP WO2020136470 A1 JPWO2020136470 A1 JP WO2020136470A1 JP 2020561969 A JP2020561969 A JP 2020561969A JP 2020561969 A JP2020561969 A JP 2020561969A JP WO2020136470 A1 JPWO2020136470 A1 JP WO2020136470A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
- H10W76/12—Containers or parts thereof characterised by their shape
- H10W76/15—Containers comprising an insulating or insulated base
- H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/43—Layouts of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
- H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
- H10W76/42—Fillings
- H10W76/47—Solid or gel fillings
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2024206931A JP7748531B2 (ja) | 2018-12-27 | 2024-11-28 | 半導体装置 |
| JP2025155886A JP2025181913A (ja) | 2018-12-27 | 2025-09-19 | 半導体装置 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018243859 | 2018-12-27 | ||
| JP2018243859 | 2018-12-27 | ||
| PCT/IB2019/059960 WO2020136470A1 (ja) | 2018-12-27 | 2019-11-20 | 半導体装置 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024206931A Division JP7748531B2 (ja) | 2018-12-27 | 2024-11-28 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2020136470A1 true JPWO2020136470A1 (https=) | 2020-07-02 |
| JPWO2020136470A5 JPWO2020136470A5 (https=) | 2022-11-10 |
| JP7597581B2 JP7597581B2 (ja) | 2024-12-10 |
Family
ID=71127579
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020561969A Active JP7597581B2 (ja) | 2018-12-27 | 2019-11-20 | 半導体装置 |
| JP2024206931A Active JP7748531B2 (ja) | 2018-12-27 | 2024-11-28 | 半導体装置 |
| JP2025155886A Pending JP2025181913A (ja) | 2018-12-27 | 2025-09-19 | 半導体装置 |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024206931A Active JP7748531B2 (ja) | 2018-12-27 | 2024-11-28 | 半導体装置 |
| JP2025155886A Pending JP2025181913A (ja) | 2018-12-27 | 2025-09-19 | 半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US12205892B2 (https=) |
| JP (3) | JP7597581B2 (https=) |
| WO (1) | WO2020136470A1 (https=) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11330489A (ja) * | 1998-03-27 | 1999-11-30 | Internatl Business Mach Corp <Ibm> | 絶縁体上半導体集積回路のための埋め込みパタ―ン化導体プレ―ン |
| JP2006319338A (ja) * | 2005-05-11 | 2006-11-24 | Magnachip Semiconductor Ltd | 半導体チップ及び半導体チップパッケージ |
| US20110057254A1 (en) * | 2009-09-10 | 2011-03-10 | Niko Semiconductor Co., Ltd. | Metal-oxide-semiconductor chip and fabrication method thereof |
| JP2011103458A (ja) * | 2009-10-16 | 2011-05-26 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2013089613A (ja) * | 2011-10-13 | 2013-05-13 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| US8803206B1 (en) * | 2012-12-29 | 2014-08-12 | Monolithic 3D Inc. | 3D semiconductor device and structure |
| JP2016006855A (ja) * | 2014-05-30 | 2016-01-14 | 株式会社半導体エネルギー研究所 | 半導体装置とその作製方法、電子機器 |
| JP2016162913A (ja) * | 2015-03-03 | 2016-09-05 | 三菱電機株式会社 | 半導体モジュールおよびその製造方法 |
| WO2017125795A1 (ja) * | 2016-01-22 | 2017-07-27 | 株式会社半導体エネルギー研究所 | トランジスタ、撮像装置 |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2776149B2 (ja) * | 1992-06-15 | 1998-07-16 | 日本電気株式会社 | 半導体集積回路 |
| JP3111948B2 (ja) * | 1997-10-31 | 2000-11-27 | 日本電気株式会社 | 半導体集積回路 |
| KR20130061678A (ko) | 2010-04-16 | 2013-06-11 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 전원 회로 |
| US9929276B2 (en) | 2012-08-10 | 2018-03-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| JP6325229B2 (ja) | 2012-10-17 | 2018-05-16 | 株式会社半導体エネルギー研究所 | 酸化物膜の作製方法 |
| JP6020731B2 (ja) | 2013-08-29 | 2016-11-02 | 三菱電機株式会社 | 半導体モジュール、半導体装置、及び自動車 |
| JP6249829B2 (ja) * | 2014-03-10 | 2017-12-20 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| KR102367921B1 (ko) | 2014-03-14 | 2022-02-25 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 회로 시스템 |
| US9674470B2 (en) | 2014-04-11 | 2017-06-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method for driving semiconductor device, and method for driving electronic device |
| US9685560B2 (en) | 2015-03-02 | 2017-06-20 | Semiconductor Energy Laboratory Co., Ltd. | Transistor, method for manufacturing transistor, semiconductor device, and electronic device |
| US20170098599A1 (en) * | 2015-10-01 | 2017-04-06 | United Microelectronics Corp. | Oxide semiconductor device and manufacturing method thereof |
| JP6811084B2 (ja) | 2015-12-18 | 2021-01-13 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US9917207B2 (en) | 2015-12-25 | 2018-03-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| US10020336B2 (en) | 2015-12-28 | 2018-07-10 | Semiconductor Energy Laboratory Co., Ltd. | Imaging device and electronic device using three dimentional (3D) integration |
| JP6845692B2 (ja) | 2016-01-15 | 2021-03-24 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP7020783B2 (ja) | 2016-02-03 | 2022-02-16 | 株式会社半導体エネルギー研究所 | 撮像装置 |
| US10333004B2 (en) | 2016-03-18 | 2019-06-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, semiconductor wafer, module and electronic device |
| WO2018051208A1 (en) | 2016-09-14 | 2018-03-22 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method of the same |
| KR102579972B1 (ko) | 2017-09-05 | 2023-09-20 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작 방법 |
| JP7328146B2 (ja) | 2017-09-06 | 2023-08-16 | 株式会社半導体エネルギー研究所 | 記憶装置及び電子機器 |
| KR102871324B1 (ko) | 2018-06-08 | 2025-10-15 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작 방법 |
| US11031506B2 (en) | 2018-08-31 | 2021-06-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device including transistor using oxide semiconductor |
-
2019
- 2019-11-20 US US17/297,863 patent/US12205892B2/en active Active
- 2019-11-20 WO PCT/IB2019/059960 patent/WO2020136470A1/ja not_active Ceased
- 2019-11-20 JP JP2020561969A patent/JP7597581B2/ja active Active
-
2024
- 2024-11-28 JP JP2024206931A patent/JP7748531B2/ja active Active
- 2024-12-20 US US18/989,697 patent/US20250132251A1/en active Pending
-
2025
- 2025-09-19 JP JP2025155886A patent/JP2025181913A/ja active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11330489A (ja) * | 1998-03-27 | 1999-11-30 | Internatl Business Mach Corp <Ibm> | 絶縁体上半導体集積回路のための埋め込みパタ―ン化導体プレ―ン |
| JP2006319338A (ja) * | 2005-05-11 | 2006-11-24 | Magnachip Semiconductor Ltd | 半導体チップ及び半導体チップパッケージ |
| US20110057254A1 (en) * | 2009-09-10 | 2011-03-10 | Niko Semiconductor Co., Ltd. | Metal-oxide-semiconductor chip and fabrication method thereof |
| JP2011103458A (ja) * | 2009-10-16 | 2011-05-26 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2013089613A (ja) * | 2011-10-13 | 2013-05-13 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| US8803206B1 (en) * | 2012-12-29 | 2014-08-12 | Monolithic 3D Inc. | 3D semiconductor device and structure |
| JP2016006855A (ja) * | 2014-05-30 | 2016-01-14 | 株式会社半導体エネルギー研究所 | 半導体装置とその作製方法、電子機器 |
| JP2016162913A (ja) * | 2015-03-03 | 2016-09-05 | 三菱電機株式会社 | 半導体モジュールおよびその製造方法 |
| WO2017125795A1 (ja) * | 2016-01-22 | 2017-07-27 | 株式会社半導体エネルギー研究所 | トランジスタ、撮像装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| US12205892B2 (en) | 2025-01-21 |
| JP2025181913A (ja) | 2025-12-11 |
| US20250132251A1 (en) | 2025-04-24 |
| WO2020136470A1 (ja) | 2020-07-02 |
| JP2025023060A (ja) | 2025-02-14 |
| JP7597581B2 (ja) | 2024-12-10 |
| JP7748531B2 (ja) | 2025-10-02 |
| US20220020683A1 (en) | 2022-01-20 |
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