JPWO2020095140A5 - - Google Patents
Download PDFInfo
- Publication number
- JPWO2020095140A5 JPWO2020095140A5 JP2020556355A JP2020556355A JPWO2020095140A5 JP WO2020095140 A5 JPWO2020095140 A5 JP WO2020095140A5 JP 2020556355 A JP2020556355 A JP 2020556355A JP 2020556355 A JP2020556355 A JP 2020556355A JP WO2020095140 A5 JPWO2020095140 A5 JP WO2020095140A5
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- gate
- potential
- terminal
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 7
- 238000013528 artificial neural network Methods 0.000 claims 1
- 239000003990 capacitor Substances 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2024021696A JP2024055903A (ja) | 2018-11-08 | 2024-02-16 | 半導体装置 |
| JP2025094375A JP7854547B2 (ja) | 2018-11-08 | 2025-06-05 | 半導体装置 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018210628 | 2018-11-08 | ||
| JP2018210628 | 2018-11-08 | ||
| PCT/IB2019/059204 WO2020095140A1 (ja) | 2018-11-08 | 2019-10-28 | 半導体装置、及び電子機器 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024021696A Division JP2024055903A (ja) | 2018-11-08 | 2024-02-16 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2020095140A1 JPWO2020095140A1 (ja) | 2021-12-23 |
| JPWO2020095140A5 true JPWO2020095140A5 (https=) | 2022-10-14 |
| JP7441175B2 JP7441175B2 (ja) | 2024-02-29 |
Family
ID=70610839
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020556355A Active JP7441175B2 (ja) | 2018-11-08 | 2019-10-28 | 半導体装置、及び電子機器 |
| JP2024021696A Withdrawn JP2024055903A (ja) | 2018-11-08 | 2024-02-16 | 半導体装置 |
| JP2025094375A Active JP7854547B2 (ja) | 2018-11-08 | 2025-06-05 | 半導体装置 |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024021696A Withdrawn JP2024055903A (ja) | 2018-11-08 | 2024-02-16 | 半導体装置 |
| JP2025094375A Active JP7854547B2 (ja) | 2018-11-08 | 2025-06-05 | 半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US12453072B2 (https=) |
| JP (3) | JP7441175B2 (https=) |
| WO (1) | WO2020095140A1 (https=) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020126426A (ja) * | 2019-02-04 | 2020-08-20 | ソニー株式会社 | 演算装置、及び積和演算システム |
| TWI906891B (zh) | 2019-02-15 | 2025-12-01 | 日商半導體能源研究所股份有限公司 | 半導體裝置及電子裝置 |
| JP7480133B2 (ja) | 2019-05-17 | 2024-05-09 | 株式会社半導体エネルギー研究所 | 半導体装置、及び電子機器 |
| JP7123860B2 (ja) * | 2019-06-17 | 2022-08-23 | 株式会社東芝 | 演算装置 |
| US20210125049A1 (en) * | 2019-10-29 | 2021-04-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | System for executing neural network |
| WO2021084717A1 (ja) * | 2019-10-31 | 2021-05-06 | 日本電気株式会社 | 情報処理回路および情報処理回路の設計方法 |
| JP7356393B2 (ja) * | 2020-04-10 | 2023-10-04 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| CN115836293A (zh) * | 2020-07-17 | 2023-03-21 | 株式会社半导体能源研究所 | 半导体装置及电子设备 |
| KR20230039668A (ko) | 2020-07-17 | 2023-03-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 전자 기기 |
| JP7800930B2 (ja) * | 2020-07-27 | 2026-01-16 | ニックスラブ・インコーポレイテッド | 電気信号を生成及び測定するためのシステム及び方法 |
| US20230411386A1 (en) * | 2022-06-20 | 2023-12-21 | International Business Machines Corporation | Method and structure of forming contacts and gates for staggered fet |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7365713B2 (en) * | 2001-10-24 | 2008-04-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and driving method thereof |
| JP6392603B2 (ja) * | 2013-09-27 | 2018-09-19 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| KR102344782B1 (ko) * | 2014-06-13 | 2021-12-28 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 입력 장치 및 입출력 장치 |
| US9312280B2 (en) * | 2014-07-25 | 2016-04-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP2017010000A (ja) | 2015-04-13 | 2017-01-12 | 株式会社半導体エネルギー研究所 | 表示装置 |
| US10096631B2 (en) | 2015-11-30 | 2018-10-09 | Semiconductor Energy Laboratory Co., Ltd. | Signal processing circuit and semiconductor device including the signal processing circuit |
| US20170221899A1 (en) * | 2016-01-29 | 2017-08-03 | Semiconductor Energy Laboratory Co., Ltd. | Microcontroller System |
| US11055607B2 (en) * | 2016-06-20 | 2021-07-06 | International Business Machines Corporation | Neural network using floating gate transistor |
| CN116229869A (zh) | 2016-06-20 | 2023-06-06 | 索尼公司 | 显示设备和电子设备 |
| KR20210134066A (ko) | 2016-08-03 | 2021-11-08 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 촬상 장치, 촬상 모듈, 전자 기기, 및 촬상 시스템 |
| CN109643514B (zh) | 2016-08-26 | 2023-04-04 | 株式会社半导体能源研究所 | 显示装置及电子设备 |
| WO2018069785A1 (en) * | 2016-10-12 | 2018-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and system using the same |
| JP7073090B2 (ja) | 2016-12-28 | 2022-05-23 | 株式会社半導体エネルギー研究所 | ニューラルネットワークを利用したデータ処理装置、電子部品、および電子機器 |
| WO2018150295A1 (ja) * | 2017-02-15 | 2018-08-23 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US11515873B2 (en) * | 2018-06-29 | 2022-11-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and electronic device |
-
2019
- 2019-10-28 WO PCT/IB2019/059204 patent/WO2020095140A1/ja not_active Ceased
- 2019-10-28 JP JP2020556355A patent/JP7441175B2/ja active Active
- 2019-10-28 US US17/289,357 patent/US12453072B2/en active Active
-
2024
- 2024-02-16 JP JP2024021696A patent/JP2024055903A/ja not_active Withdrawn
-
2025
- 2025-06-05 JP JP2025094375A patent/JP7854547B2/ja active Active
- 2025-09-24 US US19/338,408 patent/US20260020215A1/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPWO2020095140A5 (https=) | ||
| JPWO2020165685A5 (https=) | ||
| JP2018124977A5 (ja) | 半導体装置 | |
| JPWO2019207404A5 (https=) | ||
| JP6773621B2 (ja) | 演算装置 | |
| JP2025109738A5 (ja) | 発光装置 | |
| Khodabandehloo et al. | Analog implementation of a novel resistive-type sigmoidal neuron | |
| KR102151675B1 (ko) | 이진값 기반 신경회로망을 위한 단일 컬럼 멤리스터 크로스바 및 cmos 활성화 함수 회로 | |
| WO2019147522A3 (en) | Neural network circuits having non-volatile synapse arrays | |
| JP2017228751A5 (https=) | ||
| JPWO2020234681A5 (https=) | ||
| JP2017017693A5 (ja) | ロジック回路 | |
| JP2016167065A5 (ja) | 半導体装置 | |
| JP2016212944A5 (ja) | 半導体装置、及び電子部品 | |
| JP2017121046A5 (https=) | ||
| JP2016072982A5 (ja) | ロジック回路 | |
| JP2016091027A5 (ja) | 表示装置 | |
| JP2017225100A5 (https=) | ||
| JPWO2020031016A5 (ja) | アンプ回路 | |
| JPWO2021038349A5 (https=) | ||
| JP2016115386A5 (ja) | 半導体装置 | |
| JPWO2020053693A5 (https=) | ||
| Konal et al. | Electronically controllable memcapacitor emulator employing VDCCs | |
| JP2016105590A5 (ja) | 論理回路、半導体装置、電子部品 | |
| JP2016110100A5 (ja) | 半導体装置 |