JPWO2010119833A1 - シリコンエピタキシャルウェーハの製造方法 - Google Patents
シリコンエピタキシャルウェーハの製造方法 Download PDFInfo
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- JPWO2010119833A1 JPWO2010119833A1 JP2011509281A JP2011509281A JPWO2010119833A1 JP WO2010119833 A1 JPWO2010119833 A1 JP WO2010119833A1 JP 2011509281 A JP2011509281 A JP 2011509281A JP 2011509281 A JP2011509281 A JP 2011509281A JP WO2010119833 A1 JPWO2010119833 A1 JP WO2010119833A1
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- Prior art keywords
- polishing
- epitaxial wafer
- wafer substrate
- silicon
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 46
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 46
- 239000010703 silicon Substances 0.000 title claims abstract description 46
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- 238000005498 polishing Methods 0.000 claims abstract description 120
- 239000000758 substrate Substances 0.000 claims abstract description 93
- 239000013078 crystal Substances 0.000 claims abstract description 20
- 239000006061 abrasive grain Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 27
- 238000005530 etching Methods 0.000 claims description 7
- 238000001039 wet etching Methods 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 89
- 230000002093 peripheral effect Effects 0.000 description 18
- 238000007517 polishing process Methods 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 239000002002 slurry Substances 0.000 description 6
- 238000007665 sagging Methods 0.000 description 5
- 239000004744 fabric Substances 0.000 description 4
- 239000000969 carrier Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000012495 reaction gas Substances 0.000 description 2
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
- B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02024—Mirror polishing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Description
2…上定盤
3…太陽歯車
4…内歯歯車
8…キャリア
9…ホール
10…シリコンウェーハ基板
Claims (9)
- シリコン単結晶基板にエピタキシャル層を成長させる成長工程と、
前記成長工程の前に、前記シリコン単結晶基板の少なくとも表面を無砥粒で研磨する第1研磨工程と、
前記成長工程の後に、前記シリコン単結晶基板の少なくとも表面を仕上げ研磨する第2研磨工程と、を有することを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項1に記載のシリコンエピタキシャルウェーハの製造方法において、
前記第1研磨工程の前に砥粒を用いた研磨工程を有することを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項2に記載のシリコンエピタキシャルウェーハの製造方法において、
前記第1研磨工程の研磨量は100nm以上であることを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項1〜3のいずれか一項に記載のシリコンエピタキシャルウェーハの製造方法において、
前記第2研磨工程は、前記シリコン単結晶基板の両主面を研磨する第1工程と、前記シリコン単結晶基板の表面を鏡面研磨する第2工程とを有することを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項4に記載のシリコンエピタキシャルウェーハの製造方法において、
前記第2工程は、前記シリコン単結晶基板の裏面の研磨量が表面の研磨量以上であることを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項5に記載のシリコンエピタキシャルウェーハの製造方法において、
前記裏面の研磨量が0.1〜1.0μmであることを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項1〜3のいずれか一項に記載のシリコンエピタキシャルウェーハの製造方法において、
前記第2研磨工程は、前記シリコン単結晶基板の表面のみを鏡面研磨することを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項1〜7のいずれか一項に記載のシリコンエピタキシャルウェーハの製造方法において、
前記成長工程は、前記エピタキシャル層を成長させる前にハロゲン化ガスにより前記シリコン単結晶基板の表面に形成された酸化膜を除去するエッチング工程を含むことを特徴とするシリコンエピタキシャルウェーハの製造方法。 - 請求項1〜7のいずれか一項に記載のシリコンエピタキシャルウェーハの製造方法において、
前記第1研磨工程と前記成長工程との間に、前記シリコン単結晶基板の表面を湿式エッチング処理するエッチング工程を有することを特徴とするシリコンエピタキシャルウェーハの製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011509281A JP5287982B2 (ja) | 2009-04-13 | 2010-04-12 | シリコンエピタキシャルウェーハの製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009096800 | 2009-04-13 | ||
JP2009096800 | 2009-04-13 | ||
JP2011509281A JP5287982B2 (ja) | 2009-04-13 | 2010-04-12 | シリコンエピタキシャルウェーハの製造方法 |
PCT/JP2010/056517 WO2010119833A1 (ja) | 2009-04-13 | 2010-04-12 | シリコンエピタキシャルウェーハの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2010119833A1 true JPWO2010119833A1 (ja) | 2012-10-22 |
JP5287982B2 JP5287982B2 (ja) | 2013-09-11 |
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JP2011509281A Active JP5287982B2 (ja) | 2009-04-13 | 2010-04-12 | シリコンエピタキシャルウェーハの製造方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US8673784B2 (ja) |
EP (1) | EP2421028B1 (ja) |
JP (1) | JP5287982B2 (ja) |
KR (1) | KR101322969B1 (ja) |
MY (1) | MY154627A (ja) |
TW (1) | TWI474389B (ja) |
WO (1) | WO2010119833A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN105453597B (zh) | 2013-07-18 | 2020-11-27 | 康维达无线有限责任公司 | 中继设备的计费 |
TWI795559B (zh) | 2018-05-02 | 2023-03-11 | 國立大學法人東北大學 | 臭氧水之製造法 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
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US3436259A (en) | 1966-05-12 | 1969-04-01 | Ibm | Method for plating and polishing a silicon planar surface |
JPS54110783A (en) * | 1978-02-20 | 1979-08-30 | Hitachi Ltd | Semiconductor substrate and its manufacture |
JPH0817163B2 (ja) | 1990-04-12 | 1996-02-21 | 株式会社東芝 | エピタキシャルウェーハの製造方法 |
JPH04122023A (ja) | 1990-09-13 | 1992-04-22 | Hitachi Ltd | 半導体ウエハの製造方法および半導体集積回路装置の製造方法 |
JPH0817163A (ja) | 1994-06-29 | 1996-01-19 | Sony Corp | ディスクカートリッジ |
JP3317330B2 (ja) | 1995-12-27 | 2002-08-26 | 信越半導体株式会社 | 半導体鏡面ウェーハの製造方法 |
DE19704546A1 (de) * | 1997-02-06 | 1998-08-13 | Wacker Siltronic Halbleitermat | Verfahren zur Herstellung einer einseitig beschichteten und mit einem Finish versehenen Halbleiterscheibe |
DE19938340C1 (de) | 1999-08-13 | 2001-02-15 | Wacker Siltronic Halbleitermat | Verfahren zur Herstellung einer epitaxierten Halbleiterscheibe |
JP3932756B2 (ja) * | 2000-02-09 | 2007-06-20 | 信越半導体株式会社 | シリコンエピタキシャルウェーハの製造方法 |
US20020127766A1 (en) * | 2000-12-27 | 2002-09-12 | Memc Electronic Materials, Inc. | Semiconductor wafer manufacturing process |
JP3991598B2 (ja) | 2001-02-26 | 2007-10-17 | 株式会社Sumco | ウエーハ研磨方法 |
US6863595B1 (en) * | 2001-12-19 | 2005-03-08 | Cypress Semiconductor Corp. | Methods for polishing a semiconductor topography |
US6849548B2 (en) | 2002-04-05 | 2005-02-01 | Seh America, Inc. | Method of reducing particulate contamination during polishing of a wafer |
JP4511801B2 (ja) * | 2003-03-14 | 2010-07-28 | 株式会社リコー | Iii族窒化物結晶の研磨方法およびiii族窒化物結晶および半導体デバイス |
JP4273943B2 (ja) * | 2003-12-01 | 2009-06-03 | 株式会社Sumco | シリコンウェーハの製造方法 |
JP4240403B2 (ja) * | 2003-12-11 | 2009-03-18 | 株式会社Sumco | エピタキシャルウェーハの製造方法 |
EP1605498A1 (en) * | 2004-06-11 | 2005-12-14 | S.O.I. Tec Silicon on Insulator Technologies S.A. | A method of manufacturing a semiconductor wafer |
JP2006120939A (ja) | 2004-10-22 | 2006-05-11 | Shin Etsu Handotai Co Ltd | シリコンエピタキシャルウェーハの製造方法 |
JP4122023B2 (ja) | 2005-11-08 | 2008-07-23 | 大日本印刷株式会社 | 印刷物 |
JP5029234B2 (ja) * | 2006-09-06 | 2012-09-19 | 株式会社Sumco | エピタキシャルウェーハの製造方法 |
JPWO2009081720A1 (ja) * | 2007-12-21 | 2011-05-06 | 株式会社Sumco | エピタキシャルシリコンウェーハの製造方法 |
TW201000693A (en) * | 2008-06-05 | 2010-01-01 | Sumco Corp | Epitaxial silicon wafer and method for producing the same |
-
2010
- 2010-04-12 EP EP10764417.1A patent/EP2421028B1/en active Active
- 2010-04-12 JP JP2011509281A patent/JP5287982B2/ja active Active
- 2010-04-12 MY MYPI2011004880A patent/MY154627A/en unknown
- 2010-04-12 KR KR1020117026721A patent/KR101322969B1/ko active IP Right Grant
- 2010-04-12 WO PCT/JP2010/056517 patent/WO2010119833A1/ja active Application Filing
- 2010-04-12 US US13/264,057 patent/US8673784B2/en active Active
- 2010-04-13 TW TW99111428A patent/TWI474389B/zh active
Also Published As
Publication number | Publication date |
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MY154627A (en) | 2015-07-15 |
US8673784B2 (en) | 2014-03-18 |
EP2421028A4 (en) | 2013-01-02 |
EP2421028A1 (en) | 2012-02-22 |
WO2010119833A1 (ja) | 2010-10-21 |
EP2421028B1 (en) | 2015-11-04 |
KR101322969B1 (ko) | 2013-12-19 |
KR20120000578A (ko) | 2012-01-02 |
US20120034850A1 (en) | 2012-02-09 |
TW201110216A (en) | 2011-03-16 |
TWI474389B (zh) | 2015-02-21 |
JP5287982B2 (ja) | 2013-09-11 |
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