JPS6484786A - Multilayer printed wiring board - Google Patents
Multilayer printed wiring boardInfo
- Publication number
- JPS6484786A JPS6484786A JP24453287A JP24453287A JPS6484786A JP S6484786 A JPS6484786 A JP S6484786A JP 24453287 A JP24453287 A JP 24453287A JP 24453287 A JP24453287 A JP 24453287A JP S6484786 A JPS6484786 A JP S6484786A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- hole
- pattern
- insulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Landscapes
- Combinations Of Printed Boards (AREA)
Abstract
PURPOSE:To enhance a mounting density and to set a small-diameter through hole highly accurately by a method wherein a first and a second printed wiring boards are laminated via an insulator and a hole made in the second printed wiring board and the insulator is connected to a conductor pattern to be connected to the through hole in the first printed wiring board. CONSTITUTION:A first printed wiring board 1 having inner layers 9 has through holes 3, 4 and a short pattern 10 which is connected to the through hole 4 on its surface layer. A second printed wiring board 2 is laminated on the first printed wiring board 1 via an insulator 13. The second printed wiring board 2 has inner layers 8 and a through hole 5 is formed in advance. Holes are made in the laminated printed wiring board by using drills 7, 12 from the side of the second printed board 2. The drill 7 makes the hole at one end of the pattern 10 on the surface layer of the first printed wiring board 1. After making the hole, if the through hole is planted 14, a hole 6 can be connected electrically to the hole 4 through the pattern 10.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24453287A JPS6484786A (en) | 1987-09-28 | 1987-09-28 | Multilayer printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24453287A JPS6484786A (en) | 1987-09-28 | 1987-09-28 | Multilayer printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6484786A true JPS6484786A (en) | 1989-03-30 |
Family
ID=17120095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24453287A Pending JPS6484786A (en) | 1987-09-28 | 1987-09-28 | Multilayer printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6484786A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6492007B1 (en) | 2000-03-14 | 2002-12-10 | Oki Printed Circuits Co., Ltd. | Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same |
JPWO2019225488A1 (en) * | 2018-05-21 | 2021-04-22 | 株式会社村田製作所 | Wafer bonding structure |
-
1987
- 1987-09-28 JP JP24453287A patent/JPS6484786A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6492007B1 (en) | 2000-03-14 | 2002-12-10 | Oki Printed Circuits Co., Ltd. | Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same |
JPWO2019225488A1 (en) * | 2018-05-21 | 2021-04-22 | 株式会社村田製作所 | Wafer bonding structure |
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