MY102308A - Hybrid printed circuit structures - Google Patents
Hybrid printed circuit structuresInfo
- Publication number
- MY102308A MY102308A MYPI87000928A MYPI19870928A MY102308A MY 102308 A MY102308 A MY 102308A MY PI87000928 A MYPI87000928 A MY PI87000928A MY PI19870928 A MYPI19870928 A MY PI19870928A MY 102308 A MY102308 A MY 102308A
- Authority
- MY
- Malaysia
- Prior art keywords
- printed circuit
- circuit structures
- hybrid printed
- wiring substrate
- hybrid
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 3
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Die Bonding (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A HYBRID PRINTED CIRCUIT STRUCTURE COMPRISES A PRINTED WIRING SUBSTRATE (1), A THROUGH HOLE OR HOLES (3) FORMED IN THE PRINTED WIRING SUBSTRATE (1), CIRCUIT ELEMENTS (4) PROVIDED ON THE PRINTING WIRING SUBSTRATE (1), A FLAT INSULTING LAYER (5A) COVERING THE CIRCUIT ELEMENTS (4) OR THE THROUGH HOLE (3), AND AN IC CHIP (10) MOUNTED ON THE FLAT INSULATING LAYER (5A).(FIG. 1)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986105213U JPH0735389Y2 (en) | 1986-07-09 | 1986-07-09 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
MY102308A true MY102308A (en) | 1992-05-28 |
Family
ID=14401389
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI87000928A MY102308A (en) | 1986-07-09 | 1987-07-01 | Hybrid printed circuit structures |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPH0735389Y2 (en) |
KR (1) | KR920005952Y1 (en) |
MY (1) | MY102308A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002222914A (en) * | 2001-01-26 | 2002-08-09 | Sony Corp | Semiconductor device and manufacturing method therefor |
JP4489137B1 (en) * | 2009-01-20 | 2010-06-23 | パナソニック株式会社 | Circuit module and electronic device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5272468A (en) * | 1975-12-15 | 1977-06-16 | Matsushita Electric Ind Co Ltd | Printed circuit board |
JPS629728Y2 (en) * | 1981-05-07 | 1987-03-06 | ||
JPS58150862U (en) * | 1982-04-01 | 1983-10-08 | パイオニア株式会社 | Chip parts mounting device |
JPS60114844U (en) * | 1984-01-10 | 1985-08-03 | 三菱電機株式会社 | thermal head |
JPS6181140U (en) * | 1984-11-01 | 1986-05-29 |
-
1986
- 1986-07-09 JP JP1986105213U patent/JPH0735389Y2/en not_active Expired - Lifetime
-
1987
- 1987-05-13 KR KR2019870007249U patent/KR920005952Y1/en not_active IP Right Cessation
- 1987-07-01 MY MYPI87000928A patent/MY102308A/en unknown
Also Published As
Publication number | Publication date |
---|---|
JPS6310550U (en) | 1988-01-23 |
JPH0735389Y2 (en) | 1995-08-09 |
KR920005952Y1 (en) | 1992-08-27 |
KR880003791U (en) | 1988-04-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1041633A4 (en) | Semiconductor device, method of manufacture thereof, circuit board, and electronic device | |
EP0851724A3 (en) | Printed circuit board and electric components | |
EP0952542A4 (en) | Ic module and ic card | |
EP0353426A3 (en) | Semiconductor integrated circuit device comprising conductive layers | |
DE3677937D1 (en) | MODULE WITH TWO PRINTED CIRCUIT BOARDS. | |
JPS6437032A (en) | Bendable lead frame assembly of integrated circuit and integrated circuit package | |
MY120988A (en) | Hybrid wiring board, semiconductor apparatus, flexible substrate, and fabrication method of hybrid wiring board | |
EP0952762A4 (en) | Printed wiring board and method for manufacturing the same | |
EP1259103A4 (en) | Multilayer printed wiring board and method for producing multilayer printed wiring board | |
EP0996154A4 (en) | Semiconductor device and method for manufacturing the same, circuit substrate, and electronic device | |
MY103143A (en) | Interconnected semiconductor devices | |
EP0619608A3 (en) | Circuit board for optical devices | |
GB9326551D0 (en) | Integrated circuit chip | |
KR850001658A (en) | Printed wiring board | |
EP0841694A4 (en) | Semiconductor package with multilayered circuit and semiconductor device | |
MY118245A (en) | Multilayer printed circuit boards | |
DE3480247D1 (en) | Monolithic integrated semiconductor circuit | |
EP0371696A3 (en) | Electronic system having a microprocessor and a coprocessor disposed on a circuit mounting board | |
FR2669149B1 (en) | INTERMEDIATE CONNECTOR BETWEEN PRINTED CIRCUIT BOARD AND SUBSTRATE WITH ACTIVE ELECTRONIC CIRCUITS. | |
CA2030826A1 (en) | Composite circuit board with thick embedded conductor and method of manufacturing the same | |
EP0986130A3 (en) | Antenna for wireless communication terminal device | |
EP0149317A3 (en) | Circuit packaging | |
KR920010872A (en) | Multichip Module | |
EP0318954A3 (en) | Semiconductor device having a composite insulating interlayer | |
EP0256698A3 (en) | Bus structure having constant electrical characteristics |