JPS6481334A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6481334A
JPS6481334A JP62237247A JP23724787A JPS6481334A JP S6481334 A JPS6481334 A JP S6481334A JP 62237247 A JP62237247 A JP 62237247A JP 23724787 A JP23724787 A JP 23724787A JP S6481334 A JPS6481334 A JP S6481334A
Authority
JP
Japan
Prior art keywords
layer
type
type buried
window
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62237247A
Other languages
Japanese (ja)
Inventor
Hirohisa Kitaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62237247A priority Critical patent/JPS6481334A/en
Publication of JPS6481334A publication Critical patent/JPS6481334A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To form the N-type buried layer of an N-P-N transistor section in a high concentration and the N-type buried layer of a P-N-P transistor section in a low concentration, and to optimize the characteristics of the respective transistors, by removing by etching the surface section of the second N-type buried layer of the vertical P-N-P transistor section and forming the buried layer in the low concentration. CONSTITUTION:N<+> type buried layers 24a, 24b are formed on a P-type semiconductor substrate 21. Then, after an oxide film layer 25 is reformed, a window 26 for forming a P<+> type buried layer is formed in the layer 25, and the surface section of the layer 24b is removed by etching through the window 26. Thus, the high concentration surface section of the layer 24b is removed, and the surface concentration of the layer 24b becomes approx. 1X10<18>cm<-3>. Thereafter, a P<+> type buried layer 27 is formed by ion implanting in the layer 24b through the window 26. Subsequently, after the layer 25 is removed, an N-type epitaxial layer 28 is formed. Then, a P<+> type isolating layer 29 and a P<+> type diffused layer 30 are formed by a thermal diffusing method, and the layers 24a, 24b and the layer 27 are diffused upward.
JP62237247A 1987-09-24 1987-09-24 Manufacture of semiconductor device Pending JPS6481334A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62237247A JPS6481334A (en) 1987-09-24 1987-09-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62237247A JPS6481334A (en) 1987-09-24 1987-09-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6481334A true JPS6481334A (en) 1989-03-27

Family

ID=17012580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62237247A Pending JPS6481334A (en) 1987-09-24 1987-09-24 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6481334A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008028338A (en) * 2006-07-25 2008-02-07 Mitsumi Electric Co Ltd Manufacturing method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008028338A (en) * 2006-07-25 2008-02-07 Mitsumi Electric Co Ltd Manufacturing method of semiconductor device

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