JPS6477160A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS6477160A
JPS6477160A JP23418787A JP23418787A JPS6477160A JP S6477160 A JPS6477160 A JP S6477160A JP 23418787 A JP23418787 A JP 23418787A JP 23418787 A JP23418787 A JP 23418787A JP S6477160 A JPS6477160 A JP S6477160A
Authority
JP
Japan
Prior art keywords
data
semiconductor region
write
read
control gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23418787A
Other languages
Japanese (ja)
Other versions
JP2585627B2 (en
Inventor
Kazuhiro Komori
Takaaki Hagiwara
Satoshi Meguro
Toshiaki Nishimoto
Takeshi Wada
Kiyobumi Uchibori
Tadashi Muto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP23418787A priority Critical patent/JP2585627B2/en
Priority to KR1019880006563A priority patent/KR890001099A/en
Priority to US07/203,456 priority patent/US4972371A/en
Publication of JPS6477160A publication Critical patent/JPS6477160A/en
Application granted granted Critical
Publication of JP2585627B2 publication Critical patent/JP2585627B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To improve the read-out of data in speed and the write of data in property by a method wherein the write of data is executed in such a manner that a second semiconductor region connected with a ground wire, a first semiconductor region connected with a data wire, and a control gate electrode are supplied with a high, a low, and a high potential respectively, and the read-out of data is performed in such a manner as a control gate electrode is supplied with a required potential as the first and the second semiconductor region are made to serve as a source and a drain respectively. CONSTITUTION:The write of data is executed by applying a high potential to a second semiconductor region (n<+> layers 9, 10) connected with a ground wire SL and a control gate 7, and a low potential to a first semiconductor region (n layer 12) connected with a data line DL. The read-out of data is performed in such a manner that a control gate 7 is supplied with 5V, for example, as the first semiconductor region (n layer 12) and the second semiconductor region (n<+> layers 9, 10) connected with the ground wire SL are made to serve as a source and a drain respectively. By these processes, the electric field is made to be intensified at the end of the ground line on the channel side during the write of data, so that a write property can be improved. And, a junction capacitance between an n-type semiconductor region 12 and a substrate 1 is made to decrease during the read-out of data is performed, consequently the read-out can be improved in speed.
JP23418787A 1987-06-08 1987-09-18 Semiconductor storage device Expired - Fee Related JP2585627B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP23418787A JP2585627B2 (en) 1987-09-18 1987-09-18 Semiconductor storage device
KR1019880006563A KR890001099A (en) 1987-06-08 1988-06-01 Semiconductor memory
US07/203,456 US4972371A (en) 1987-06-08 1988-06-07 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23418787A JP2585627B2 (en) 1987-09-18 1987-09-18 Semiconductor storage device

Publications (2)

Publication Number Publication Date
JPS6477160A true JPS6477160A (en) 1989-03-23
JP2585627B2 JP2585627B2 (en) 1997-02-26

Family

ID=16967041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23418787A Expired - Fee Related JP2585627B2 (en) 1987-06-08 1987-09-18 Semiconductor storage device

Country Status (1)

Country Link
JP (1) JP2585627B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592003A (en) * 1992-12-28 1997-01-07 Nippon Steel Corporation Nonvolatile semiconductor memory and method of rewriting data thereto
US5966602A (en) * 1996-09-04 1999-10-12 Oki Electric Industry Co., Ltd. Nonvolatile semiconductor memory and fabricating method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592003A (en) * 1992-12-28 1997-01-07 Nippon Steel Corporation Nonvolatile semiconductor memory and method of rewriting data thereto
US5966602A (en) * 1996-09-04 1999-10-12 Oki Electric Industry Co., Ltd. Nonvolatile semiconductor memory and fabricating method thereof
DE19708031B4 (en) * 1996-09-04 2008-04-30 Oki Electric Industry Co., Ltd. Non-volatile semiconductor memory and method for its production

Also Published As

Publication number Publication date
JP2585627B2 (en) 1997-02-26

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees