JPS6435529A - Active matrix cell and its manufacture - Google Patents

Active matrix cell and its manufacture

Info

Publication number
JPS6435529A
JPS6435529A JP62192341A JP19234187A JPS6435529A JP S6435529 A JPS6435529 A JP S6435529A JP 62192341 A JP62192341 A JP 62192341A JP 19234187 A JP19234187 A JP 19234187A JP S6435529 A JPS6435529 A JP S6435529A
Authority
JP
Japan
Prior art keywords
data line
conductor
scanning line
drain
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62192341A
Other languages
Japanese (ja)
Other versions
JPH0797191B2 (en
Inventor
Kinya Kato
Nobuhiko Tsunoda
Noboru Naito
Tsutomu Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP62192341A priority Critical patent/JPH0797191B2/en
Priority to US07/222,844 priority patent/US4918504A/en
Priority to EP88112172A priority patent/EP0304657B1/en
Priority to DE88112172T priority patent/DE3884891T2/en
Publication of JPS6435529A publication Critical patent/JPS6435529A/en
Priority to US07/728,851 priority patent/US5198377A/en
Publication of JPH0797191B2 publication Critical patent/JPH0797191B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • G02F1/136263Line defects
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F1/13629Multilayer wirings

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Liquid Crystal (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To reduce a resistance of a data line by accumulating a second conductor film, and working it to a shape of a scanning line containing a gate electrode of a thin film transistor, and a shape which comes into contact onto a data line made by a first conductor in a state that it is not connected to the scanning line and becomes a part of the data line. CONSTITUTION:A two-layer film area 103 constitutes an active area of a TFT 3 by connecting a source 5 and a drain 6, and also, has a function of insulation even with respect to an intersection area 7 of a data line 1 and a scanning line 2, and consists of a larger plane shape than width of the data line 1 and the scanning line 2. Also, a second conductor 105 is overlapped partially to the source 5 and the drain 6, in a wider plane shape than an interval of the source 5 and the drain 6, between the source 5 and the drain 6, and becomes the scanning line 2 containing a gate electrode of the TFT 3, and also, the second conductor 105 is constituted so as to become a part of the data line 1 by coming into contact onto the data line 1 which becomes the first conductor 102 in a state that it is not connected to the scanning line 2. In such a way, the resistance of the data line 1 can be lowered.
JP62192341A 1987-07-31 1987-07-31 Active matrix cell and manufacturing method thereof Expired - Lifetime JPH0797191B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP62192341A JPH0797191B2 (en) 1987-07-31 1987-07-31 Active matrix cell and manufacturing method thereof
US07/222,844 US4918504A (en) 1987-07-31 1988-07-22 Active matrix cell
EP88112172A EP0304657B1 (en) 1987-07-31 1988-07-27 Active matrix cell and method of manufacturing the same
DE88112172T DE3884891T2 (en) 1987-07-31 1988-07-27 Active matrix cell and its manufacturing process.
US07/728,851 US5198377A (en) 1987-07-31 1991-07-09 Method of manufacturing an active matrix cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62192341A JPH0797191B2 (en) 1987-07-31 1987-07-31 Active matrix cell and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPS6435529A true JPS6435529A (en) 1989-02-06
JPH0797191B2 JPH0797191B2 (en) 1995-10-18

Family

ID=16289662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62192341A Expired - Lifetime JPH0797191B2 (en) 1987-07-31 1987-07-31 Active matrix cell and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JPH0797191B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001100663A (en) * 1999-09-29 2001-04-13 Sanyo Electric Co Ltd El display device
US8558226B2 (en) 2011-06-01 2013-10-15 Mitsubishi Electric Corporation Thin film transistor substrate and manufacturing method for the same
US9209203B2 (en) 2013-12-11 2015-12-08 Mitsubishi Electric Corporation Active matrix substrate and method for manufacturing the same
US10128270B2 (en) 2013-06-27 2018-11-13 Mitsubishi Electric Corporation Active matrix substrate and manufacturing method of the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61116325U (en) * 1984-12-30 1986-07-23

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61116325U (en) * 1984-12-30 1986-07-23

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001100663A (en) * 1999-09-29 2001-04-13 Sanyo Electric Co Ltd El display device
US8558226B2 (en) 2011-06-01 2013-10-15 Mitsubishi Electric Corporation Thin film transistor substrate and manufacturing method for the same
US10128270B2 (en) 2013-06-27 2018-11-13 Mitsubishi Electric Corporation Active matrix substrate and manufacturing method of the same
US9209203B2 (en) 2013-12-11 2015-12-08 Mitsubishi Electric Corporation Active matrix substrate and method for manufacturing the same
US9461077B2 (en) 2013-12-11 2016-10-04 Mitsubishi Electric Corporation Active matrix substrate and method for manufacturing the same

Also Published As

Publication number Publication date
JPH0797191B2 (en) 1995-10-18

Similar Documents

Publication Publication Date Title
KR950015763A (en) Nonvolatile Semiconductor Memory
EP0244530A3 (en) Thin oxide fuse in an integrated circuit
JPS6428622A (en) Liquid crystal display device
JPS6435529A (en) Active matrix cell and its manufacture
EP0739035A3 (en) DRAM bit line contact
ATE53709T1 (en) BASE CELL REALIZED IN C-MOS TECHNOLOGY.
JPS5658255A (en) Mos type semiconductor memory device
JPS6431456A (en) Semiconductor device
ATE76222T1 (en) THIN FILM TRANSISTOR.
JPS5769778A (en) Semiconductor device
JPS57206068A (en) Semiconductor memory device
JPS6468726A (en) Thin film transistor and its manufacture
JPS6468968A (en) Thin film transistor
JPS6411360A (en) Semiconductor memory device
JPS6467970A (en) Thin film transistor
JPS6477029A (en) Active device
JPS5257786A (en) Field effect transistor
JPS57114273A (en) Field effect semiconductor device
JPS5484934A (en) Semiconductor memory device
JPS57206069A (en) Semiconductor memory device
JPS57197869A (en) Semiconductor device
JPS6436062A (en) Large scale integratable memory cell
JPS6461061A (en) A-si thin film transistor
KR910007074A (en) Thin film transistor
JPS6448466A (en) Semiconductor device

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20071018

Year of fee payment: 12