JPS6474737A - Master slice type semiconductor device - Google Patents
Master slice type semiconductor deviceInfo
- Publication number
- JPS6474737A JPS6474737A JP23290787A JP23290787A JPS6474737A JP S6474737 A JPS6474737 A JP S6474737A JP 23290787 A JP23290787 A JP 23290787A JP 23290787 A JP23290787 A JP 23290787A JP S6474737 A JPS6474737 A JP S6474737A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- power supply
- potential
- mos capacitor
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11803—Masterslice integrated circuits using field effect technology
Abstract
PURPOSE:To reduce the fluctuation in power supply potential on power supply line for stabilizing the potential by providing a MOS capacitor using two layer aluminum interconnections on an unused cell. CONSTITUTION:A MOS capacitor is formed between the first layer metallic interconnection layer 15 and the second layer metallic interconnection layer 18 holding an interlayer insulating film 17 on overall surface of an unused transistor of basic cell while the MOS capacitor is connected between VDD and VSS power supplies. Besides. the first layer metallic interconnection layer 15 is brought into ohmic contact with source.drain 13, 14 through the intermediary of contact holes 16 while the potential of source.drain of not yet used P channel type MOS transistor is fixed to VDD power supply. In such a constitution, a gate electrode 12 is connected to the isolated first layer metallic layer 15 through the intermediary of the contact hole 10 so that the potential of the electrode 12 may be fixed to the VSS power supply. Consequently, the structure of this transistor device is extremely resistant to latch up.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23290787A JP2840239B2 (en) | 1987-09-17 | 1987-09-17 | Master slice type semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23290787A JP2840239B2 (en) | 1987-09-17 | 1987-09-17 | Master slice type semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6474737A true JPS6474737A (en) | 1989-03-20 |
JP2840239B2 JP2840239B2 (en) | 1998-12-24 |
Family
ID=16946709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23290787A Expired - Fee Related JP2840239B2 (en) | 1987-09-17 | 1987-09-17 | Master slice type semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2840239B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02241061A (en) * | 1989-03-15 | 1990-09-25 | Oki Electric Ind Co Ltd | Cmos gate array |
WO2000035004A1 (en) | 1998-12-10 | 2000-06-15 | Nec Corporation | Integrated circuit |
US6507232B2 (en) | 1998-07-09 | 2003-01-14 | Nec Corporation | Semiconductor device which can be set to predetermined capacitance value without increase of delay time |
WO2006018891A1 (en) * | 2004-08-20 | 2006-02-23 | Fujitsu Limited | Semiconductor device and designing method therefor |
-
1987
- 1987-09-17 JP JP23290787A patent/JP2840239B2/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02241061A (en) * | 1989-03-15 | 1990-09-25 | Oki Electric Ind Co Ltd | Cmos gate array |
US6507232B2 (en) | 1998-07-09 | 2003-01-14 | Nec Corporation | Semiconductor device which can be set to predetermined capacitance value without increase of delay time |
WO2000035004A1 (en) | 1998-12-10 | 2000-06-15 | Nec Corporation | Integrated circuit |
WO2006018891A1 (en) * | 2004-08-20 | 2006-02-23 | Fujitsu Limited | Semiconductor device and designing method therefor |
Also Published As
Publication number | Publication date |
---|---|
JP2840239B2 (en) | 1998-12-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |