JPS6473624A - Electronic component device - Google Patents
Electronic component deviceInfo
- Publication number
- JPS6473624A JPS6473624A JP23061687A JP23061687A JPS6473624A JP S6473624 A JPS6473624 A JP S6473624A JP 23061687 A JP23061687 A JP 23061687A JP 23061687 A JP23061687 A JP 23061687A JP S6473624 A JPS6473624 A JP S6473624A
- Authority
- JP
- Japan
- Prior art keywords
- bonding position
- chip
- die bonding
- optimum
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Die Bonding (AREA)
Abstract
PURPOSE:To determined a die bonding position at substantially optimum position by forming an alignment pattern which is aimed at an optimum die bonding position of a semiconductor chip at the peripheral edge of an opening window. CONSTITUTION:An alignment pattern 9a for designating an optimum die bonding position of a chip 5a is formed at one corner of the opening window 4 of a surface protective film 3. This pattern 9a is formed together with the window 4 when the film 3 is formed on a circuit substrate 1. Of course, the pattern 9a is formed on the basis of the optimum die bonding position of the chip 5a. Then, upon mounting of the chip, a worker designates the die bonding position of the chip 5a on the basis of the pattern 9a. Thus, the die bonding position of the chip 5a can be determined substantially at the optimum position irrespective of the skillfulness. Therefore, a wire bonding position can be easily designated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23061687A JPS6473624A (en) | 1987-09-14 | 1987-09-14 | Electronic component device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23061687A JPS6473624A (en) | 1987-09-14 | 1987-09-14 | Electronic component device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6473624A true JPS6473624A (en) | 1989-03-17 |
Family
ID=16910556
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23061687A Pending JPS6473624A (en) | 1987-09-14 | 1987-09-14 | Electronic component device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6473624A (en) |
-
1987
- 1987-09-14 JP JP23061687A patent/JPS6473624A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS52124865A (en) | Semiconductor device | |
| JPS543480A (en) | Manufacture of semiconductor device | |
| JPS56122156A (en) | Lead frame for semiconductor device | |
| JPS548462A (en) | Manufacture for semiconductor | |
| JPS6473624A (en) | Electronic component device | |
| JPS57197838A (en) | Semiconductor flip chip element | |
| DE3473972D1 (en) | Semiconductor device comprising a substrate | |
| TW359019B (en) | Semiconductor device | |
| JPS5389368A (en) | Production of semiconductor integrated circuit | |
| JPS5785240A (en) | Semiconductor device | |
| JPS54102971A (en) | Semiconductor device | |
| DE3071367D1 (en) | A semiconductor device with a semiconductor element soldered on a metal substrate | |
| EP0408768A4 (en) | Chip carrier | |
| EP0388311A3 (en) | Chip carrier | |
| JPS6484646A (en) | Manufacture of semiconductor package | |
| JPS6489356A (en) | Hybrid integrated circuit | |
| JPS5421261A (en) | Manufacture for semiconductor device | |
| JPS5610952A (en) | Hybrid integrated circuit substrate | |
| JPS56148856A (en) | Film carrier | |
| JPS5776848A (en) | Mounting method for integrated circuit chip | |
| JPS6423562A (en) | Semiconductor device | |
| JPS57155761A (en) | Electronic component part | |
| JPS5756938A (en) | Semiconductor device | |
| JPS5728344A (en) | Semiconductor device | |
| JPS53117969A (en) | Regeneration of semiconductor device |