JPS6468945A - Manufacture of semiconductor integrated circuit device - Google Patents

Manufacture of semiconductor integrated circuit device

Info

Publication number
JPS6468945A
JPS6468945A JP22740287A JP22740287A JPS6468945A JP S6468945 A JPS6468945 A JP S6468945A JP 22740287 A JP22740287 A JP 22740287A JP 22740287 A JP22740287 A JP 22740287A JP S6468945 A JPS6468945 A JP S6468945A
Authority
JP
Japan
Prior art keywords
film
deposited
mask
manufacture
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22740287A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Furuichi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22740287A priority Critical patent/JPS6468945A/en
Publication of JPS6468945A publication Critical patent/JPS6468945A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the decrease in step coverage and the occurrence of poor conduction when an Al wiring film is deposited and formed, by forming a contact hole in an interlayer insulating film, with the Al film as a mask. CONSTITUTION:A field oxide film 13 is formed on a silicon substrate 11, on which an impurity diffused layer 14 is formed. As an insulating film, a silicon nitride film 12 is deposited on the entire surface. An Al film 15 is deposited thereon. A photoresist film 16 is deposited, and an etching mask for the Al film 15 is formed. A hole is formed in the Al film 15 by using said mask, and the photoresist film 16 is released. With the Al film 15 as an etching mask, a contact hole 17 is formed in the silicon film 12. Thus, the decrease in step coverage and the occurrence of poor conduction when the Al wiring film is deposited can be eliminated.
JP22740287A 1987-09-09 1987-09-09 Manufacture of semiconductor integrated circuit device Pending JPS6468945A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22740287A JPS6468945A (en) 1987-09-09 1987-09-09 Manufacture of semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22740287A JPS6468945A (en) 1987-09-09 1987-09-09 Manufacture of semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6468945A true JPS6468945A (en) 1989-03-15

Family

ID=16860268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22740287A Pending JPS6468945A (en) 1987-09-09 1987-09-09 Manufacture of semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6468945A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5529195A (en) * 1978-08-21 1980-03-01 Ibm Method of forming thin film mutual connecting system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5529195A (en) * 1978-08-21 1980-03-01 Ibm Method of forming thin film mutual connecting system

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