JPS6467642A - Microprogram controller - Google Patents

Microprogram controller

Info

Publication number
JPS6467642A
JPS6467642A JP62225755A JP22575587A JPS6467642A JP S6467642 A JPS6467642 A JP S6467642A JP 62225755 A JP62225755 A JP 62225755A JP 22575587 A JP22575587 A JP 22575587A JP S6467642 A JPS6467642 A JP S6467642A
Authority
JP
Japan
Prior art keywords
coincidence
microprogram
output
microinstruction
delivered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62225755A
Other languages
Japanese (ja)
Inventor
Kazuhiko Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62225755A priority Critical patent/JPS6467642A/en
Publication of JPS6467642A publication Critical patent/JPS6467642A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To easily search a specific process by inhibiting the execution of a microprogram as long as one or plural register coincidence signals are delivered at the output of an address coincidence signal. CONSTITUTION:The output of a microinstruction setting circuit 2 is compared with the output of the microinstruction of a microprogram control circuit 1. Then a microinstruction coincidence signal is delivered when the coincidence is obtained between both outputs. Then one or plural outputs of the register comparison value setting circuits 9 and 12 are compared with one or plural values of incorporated registers. Then each register coincidence signal is delivered when the coincidence is obtained between said output and value. Furthermore the execution of a microprogram is inhibited as long as one or plural register coincidence signals are delivered at the output of the microinstruction coincidence signal. Thus the microprogram can be debugged with no influence given to the microprogram itself at all.
JP62225755A 1987-09-09 1987-09-09 Microprogram controller Pending JPS6467642A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62225755A JPS6467642A (en) 1987-09-09 1987-09-09 Microprogram controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62225755A JPS6467642A (en) 1987-09-09 1987-09-09 Microprogram controller

Publications (1)

Publication Number Publication Date
JPS6467642A true JPS6467642A (en) 1989-03-14

Family

ID=16834314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62225755A Pending JPS6467642A (en) 1987-09-09 1987-09-09 Microprogram controller

Country Status (1)

Country Link
JP (1) JPS6467642A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08263324A (en) * 1995-03-22 1996-10-11 Nec Ibaraki Ltd Debug facilitation device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08263324A (en) * 1995-03-22 1996-10-11 Nec Ibaraki Ltd Debug facilitation device

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