JPS55103645A - Microprogram control system - Google Patents

Microprogram control system

Info

Publication number
JPS55103645A
JPS55103645A JP1009679A JP1009679A JPS55103645A JP S55103645 A JPS55103645 A JP S55103645A JP 1009679 A JP1009679 A JP 1009679A JP 1009679 A JP1009679 A JP 1009679A JP S55103645 A JPS55103645 A JP S55103645A
Authority
JP
Japan
Prior art keywords
register
output
state
comparator
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1009679A
Other languages
Japanese (ja)
Inventor
Akira Hitomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1009679A priority Critical patent/JPS55103645A/en
Publication of JPS55103645A publication Critical patent/JPS55103645A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To facilitate execution of conditional jump instructions to simplify a circuit constitution by using a three-state output register and by applying wired OR of the output of this register to a register which holds the result of numeric operations and the state of operations.
CONSTITUTION: Data of the operation result of logical operator 1 is stored temporarily in register TCR 3, and a flag indicating the state of the operation result from operator 1 is stored temporarily in register TCR 5. Outputs of these registers 3 and 5 are applied to comparator 7 through tested bus 6 and are applied to microprogram sequencer 8 as wired OR dependent upon three-state output. Then, in case of conditional jump in the microprogram, condition coincidence signal 13 is outputted from comparator 7, and control signal 12 is inputted to comparator 7 from decoder 11, and further, one bit of data line 14 from data register 10 is inputted to perform comparison, and inputs of registers 3 and 5 are selected to output a jump instruction.
COPYRIGHT: (C)1980,JPO&Japio
JP1009679A 1979-01-31 1979-01-31 Microprogram control system Pending JPS55103645A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1009679A JPS55103645A (en) 1979-01-31 1979-01-31 Microprogram control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1009679A JPS55103645A (en) 1979-01-31 1979-01-31 Microprogram control system

Publications (1)

Publication Number Publication Date
JPS55103645A true JPS55103645A (en) 1980-08-08

Family

ID=11740787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1009679A Pending JPS55103645A (en) 1979-01-31 1979-01-31 Microprogram control system

Country Status (1)

Country Link
JP (1) JPS55103645A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01233523A (en) * 1988-03-15 1989-09-19 Toshiba Corp Electronic computer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5036337A (en) * 1973-06-22 1975-04-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5036337A (en) * 1973-06-22 1975-04-05

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01233523A (en) * 1988-03-15 1989-09-19 Toshiba Corp Electronic computer

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