JPS5537650A - Microcomputer - Google Patents
MicrocomputerInfo
- Publication number
- JPS5537650A JPS5537650A JP11042478A JP11042478A JPS5537650A JP S5537650 A JPS5537650 A JP S5537650A JP 11042478 A JP11042478 A JP 11042478A JP 11042478 A JP11042478 A JP 11042478A JP S5537650 A JPS5537650 A JP S5537650A
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- bus
- register
- cycle
- cal6
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Executing Machine-Instructions (AREA)
- Microcomputers (AREA)
Abstract
PURPOSE: To quicken instruction execution by reducing machine cycles needed for the instruction execution by performing arithmetic more than twice within one machine cycle by performing wired logic arithmetic using a bus.
CONSTITUTION: A two byte instruction, stored in instruction ROM1, is a two- machine-cycle instruction and at the 1st cycle, an instruction code is outputted to instruction decoder CAL6. Then, CAL6 turns bus driver 8 ON by a control signal, obtained by decoding the instruction, to output the value of register A7 to bus 13. At this time, the mode of arithmetic unit ALU10 is set to complementary generation and a generated complementary is stored in register A7 again. At the 2nd machine cycle, data at the 2nd byte of ROM1 is latched in registers 2 and 3 and then outputted to buses 13 and 14 respectively by turning bus drivers 4 and 5 by the control signal of CAL6 and at the same time, the complemented contents of register A7 are outputted to bus 13. In this case, ALU10 is operated in an addition mode to add the contents of buses 13 and 14 and also to store the output in register A7 again.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11042478A JPS5537650A (en) | 1978-09-07 | 1978-09-07 | Microcomputer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11042478A JPS5537650A (en) | 1978-09-07 | 1978-09-07 | Microcomputer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5537650A true JPS5537650A (en) | 1980-03-15 |
JPS611772B2 JPS611772B2 (en) | 1986-01-20 |
Family
ID=14535399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11042478A Granted JPS5537650A (en) | 1978-09-07 | 1978-09-07 | Microcomputer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5537650A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01228019A (en) * | 1988-03-08 | 1989-09-12 | Fujitsu Ltd | Data processor |
JPH01263820A (en) * | 1988-04-15 | 1989-10-20 | Hitachi Ltd | Microprocessor |
-
1978
- 1978-09-07 JP JP11042478A patent/JPS5537650A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01228019A (en) * | 1988-03-08 | 1989-09-12 | Fujitsu Ltd | Data processor |
JPH01263820A (en) * | 1988-04-15 | 1989-10-20 | Hitachi Ltd | Microprocessor |
Also Published As
Publication number | Publication date |
---|---|
JPS611772B2 (en) | 1986-01-20 |
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