JPS5671149A - Data processing device - Google Patents

Data processing device

Info

Publication number
JPS5671149A
JPS5671149A JP14798179A JP14798179A JPS5671149A JP S5671149 A JPS5671149 A JP S5671149A JP 14798179 A JP14798179 A JP 14798179A JP 14798179 A JP14798179 A JP 14798179A JP S5671149 A JPS5671149 A JP S5671149A
Authority
JP
Japan
Prior art keywords
maintenance
mode
instruction
instructions
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14798179A
Other languages
Japanese (ja)
Inventor
Tomoaki Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14798179A priority Critical patent/JPS5671149A/en
Publication of JPS5671149A publication Critical patent/JPS5671149A/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To make it possible to execute maintenance instruction surely without stopping the system when the maintenance work is required, by controlling maintenance instructions so that they may function as no-operation instructions and maintenance instructions in the normal mode respectively.
CONSTITUTION: The no-operation (NOP) code of memory part 13, the operation designating instruction code of instruction register 11, the instruction designation code which consists of specific bits dependent upon instructuion register 12 and designates instruction words of the normal mode and the maintenance mode by logical values 0 and 1 respectively, and the output of mode designating part 14 which outputs logical values 1 and 0 when the normal mode and the maintenance mode are designated respectively are input to selecting circuit 15. Selecting circuit 15 outputs the NOP code from memory part 13 to output a corresponding control signal by decoder 16 only when outputs of mode designating part 14 and register 12 are 1. As a result, maintenance instructions are so controlled that they may function as NOP and maintenance instructions in the normal mode and the maintenance mode respectively, and the maintenance program can be executed surely without stopping the system when the maintenance work is required.
COPYRIGHT: (C)1981,JPO&Japio
JP14798179A 1979-11-15 1979-11-15 Data processing device Pending JPS5671149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14798179A JPS5671149A (en) 1979-11-15 1979-11-15 Data processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14798179A JPS5671149A (en) 1979-11-15 1979-11-15 Data processing device

Publications (1)

Publication Number Publication Date
JPS5671149A true JPS5671149A (en) 1981-06-13

Family

ID=15442465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14798179A Pending JPS5671149A (en) 1979-11-15 1979-11-15 Data processing device

Country Status (1)

Country Link
JP (1) JPS5671149A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5835650A (en) * 1981-08-27 1983-03-02 Nec Corp Program confirming device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5835650A (en) * 1981-08-27 1983-03-02 Nec Corp Program confirming device

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