JPS6466940A - Manufacture of integrated circuit device - Google Patents

Manufacture of integrated circuit device

Info

Publication number
JPS6466940A
JPS6466940A JP22464987A JP22464987A JPS6466940A JP S6466940 A JPS6466940 A JP S6466940A JP 22464987 A JP22464987 A JP 22464987A JP 22464987 A JP22464987 A JP 22464987A JP S6466940 A JPS6466940 A JP S6466940A
Authority
JP
Japan
Prior art keywords
etching
photoresist
silicon oxide
frequency
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22464987A
Other languages
Japanese (ja)
Inventor
Akiyoshi Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22464987A priority Critical patent/JPS6466940A/en
Publication of JPS6466940A publication Critical patent/JPS6466940A/en
Pending legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To remove a reaction product adhering to the sidewall of an opening section in an insulating film completely, and to prevent the modification of a wiring metallic film, a defective ohmic contact and stepped disconnection at the stepped section of the opening by removing a photoresist and continuously conducting reactive ion etching and high-frequency sputter-etching. CONSTITUTION:The upper section of an silicon substrate 11 such as silicon oxide 12 is spin-coated with a photoresist, and isotropic etching is conducted, using the photoresist 13 as a mask, and anisotropic etching is performed. The photo-resist is gotten rid of, a fluorine group reaction gas is introduced, and high-frequency discharged, and the whole surface of the silicon oxide 12 on a wafer 34 is ion-etched. An inert gas such as argon gas is introduced, and high-frequency discharged, and the whole surface of the silicon oxide 12 is further sputter-etched. A reaction product 14 is taken off completely through etching.
JP22464987A 1987-09-07 1987-09-07 Manufacture of integrated circuit device Pending JPS6466940A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22464987A JPS6466940A (en) 1987-09-07 1987-09-07 Manufacture of integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22464987A JPS6466940A (en) 1987-09-07 1987-09-07 Manufacture of integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6466940A true JPS6466940A (en) 1989-03-13

Family

ID=16817032

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22464987A Pending JPS6466940A (en) 1987-09-07 1987-09-07 Manufacture of integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6466940A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02203528A (en) * 1989-02-01 1990-08-13 Hitachi Ltd Specimen postpocessing and device therefor
DE4212494A1 (en) * 1991-04-17 1992-10-22 Mitsubishi Electric Corp Producing isolated semiconductor sidewall for MOS transistor - using selective isotropic and anisotropic plasma etching of polycrystalline silicon@ and silicon@ isolating layers
JPH07326606A (en) * 1995-01-30 1995-12-12 Hitachi Ltd Sample treatment
KR100265829B1 (en) * 1996-12-18 2000-09-15 김영환 Method for forming wine glass type contact hole in semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02203528A (en) * 1989-02-01 1990-08-13 Hitachi Ltd Specimen postpocessing and device therefor
DE4212494A1 (en) * 1991-04-17 1992-10-22 Mitsubishi Electric Corp Producing isolated semiconductor sidewall for MOS transistor - using selective isotropic and anisotropic plasma etching of polycrystalline silicon@ and silicon@ isolating layers
US5432367A (en) * 1991-04-17 1995-07-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having sidewall insulating film
US5541127A (en) * 1991-04-17 1996-07-30 Mitsubishi Denki Kabushiki Kaisha Manufacturing method of sidewall insulating film
JPH07326606A (en) * 1995-01-30 1995-12-12 Hitachi Ltd Sample treatment
KR100265829B1 (en) * 1996-12-18 2000-09-15 김영환 Method for forming wine glass type contact hole in semiconductor device

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