JPS6459952A - Manufacture of bicmos integrated circuit - Google Patents

Manufacture of bicmos integrated circuit

Info

Publication number
JPS6459952A
JPS6459952A JP21820287A JP21820287A JPS6459952A JP S6459952 A JPS6459952 A JP S6459952A JP 21820287 A JP21820287 A JP 21820287A JP 21820287 A JP21820287 A JP 21820287A JP S6459952 A JPS6459952 A JP S6459952A
Authority
JP
Japan
Prior art keywords
polycrystalline
emitter
region
integrated circuit
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21820287A
Other languages
Japanese (ja)
Inventor
Katsumoto Soejima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21820287A priority Critical patent/JPS6459952A/en
Publication of JPS6459952A publication Critical patent/JPS6459952A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To attain improvement in yield and operational speed concurrently by simplification of a manufacturing process of a BiCMOS integrated circuit by a method wherein a polycrystalline emitter electrode and a polycrystalline gate electrode are formed on an emitter contact hole and a gate insulating film provided on a PMOS forming region and an NMOS forming region respectively. CONSTITUTION:A gate insulating film 7 formed on a P-type base region 10 is removed through a usual resist method so as to expose a silicon surface, an emitter contact hole is opened, and then a polycrystalline silicon layer 11 is made to be deposited through a vacuum CVD method so as to be 300nm in thickness. Next, a polycrystalline emitter electrode 14 and a polycrystalline gate electrodes 12-1 and 12-2 are processed to be formed, As ions are selectively implanted with energy of 50keV in dose of 1.0X10<16>cm<-2> ion and annealing is adequately performed, whereby an emitter region 15 and a collector contact region 16 of an NPN bipolar transistor and a source and a drain regions 17-1 and 17-2 of an NMOSFET can be formed.
JP21820287A 1987-08-31 1987-08-31 Manufacture of bicmos integrated circuit Pending JPS6459952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21820287A JPS6459952A (en) 1987-08-31 1987-08-31 Manufacture of bicmos integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21820287A JPS6459952A (en) 1987-08-31 1987-08-31 Manufacture of bicmos integrated circuit

Publications (1)

Publication Number Publication Date
JPS6459952A true JPS6459952A (en) 1989-03-07

Family

ID=16716221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21820287A Pending JPS6459952A (en) 1987-08-31 1987-08-31 Manufacture of bicmos integrated circuit

Country Status (1)

Country Link
JP (1) JPS6459952A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5406106A (en) * 1992-06-24 1995-04-11 Matsushita Electric Industrial Co., Ltd. Semiconductor Bi-MIS device and method of manufacturing the same
JPH07202050A (en) * 1993-12-30 1995-08-04 Nec Corp Manufacture of semiconductor device
JP2008541464A (en) * 2005-05-18 2008-11-20 ネオバルブ テクノロジーズ，インコーポレイテッド Integrated circuit package structure and method of manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5406106A (en) * 1992-06-24 1995-04-11 Matsushita Electric Industrial Co., Ltd. Semiconductor Bi-MIS device and method of manufacturing the same
JPH07202050A (en) * 1993-12-30 1995-08-04 Nec Corp Manufacture of semiconductor device
JP2008541464A (en) * 2005-05-18 2008-11-20 ネオバルブ テクノロジーズ，インコーポレイテッド Integrated circuit package structure and method of manufacturing the same

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