JPS6447047A - Formation of multilayer interconnection - Google Patents

Abstract

PURPOSE:To reduce the number of photoresist-involving manufacturing steps and to provide through-holes with high controllability by a method wherein a photoresist film is used as a mask for the removal to a prescribed depth of an insulating film and the photoresist film and the insulating film are removed at approximately the same etching rate. CONSTITUTION:An insulating film 12 is formed on a semiconductor substrate 11 and, on the insulating film 12, a first layer Al wiring 13 is formed and, thereon, a CVD oxide film 14 is grown. A photoresist 15 is applied by rotary application to the entire surface of the semiconductor substrate 11 including the surface of the CVD oxide film 14, which flattens the surface of the semiconductor substrate 11. At a prescribed region on the photoresist 15, a pattern is formed for a hole for the establishment of connection between the first layer Al wiring 13 a second layer Al wiring. A through-hole is then provided in the CVD oxide film 14. Etch-back is accomplished involving the entire surface of the semiconductor substrate 11, which is done under conditions where both the CVD oxide film 14 and the photoresist 15 are affected at approximately the same rate. The second layer Al wiring is so formed that it will contain the through-hole with its upper end roundish.