JPS6447040A - Probe card - Google Patents

Probe card

Info

Publication number
JPS6447040A
JPS6447040A JP62205483A JP20548387A JPS6447040A JP S6447040 A JPS6447040 A JP S6447040A JP 62205483 A JP62205483 A JP 62205483A JP 20548387 A JP20548387 A JP 20548387A JP S6447040 A JPS6447040 A JP S6447040A
Authority
JP
Japan
Prior art keywords
substrate
probe card
semiconductor chip
marker
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62205483A
Other languages
Japanese (ja)
Inventor
Jiro Suma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62205483A priority Critical patent/JPS6447040A/en
Publication of JPS6447040A publication Critical patent/JPS6447040A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE:To render a probe card suitable for an automated process by a method wherein a hole is provided in a substrate through which a marker runs to provide a semiconductor chip with prescribed markings and a transparent material is employed to constitute a region including at least the middle section of the substrate. CONSTITUTION:In a probe card of this design, a substrate 1 is built of a transparent material, a marker 8 goes through a hole 6 provided in the substrate 1, and the marker 8 attaches markings on a semiconductor chip 13. A chip position recognizing pattern 5 is drawn on the substrate 1, a pattern 10 wherein scribe lines 11 cross each other on the semiconductor chip 13 is aligned with the chip position recognizing pattern 5, and the alignment is trimmed by a sensor 9. Probe card terminals 3 for electrical contact with the semiconductor chip 13 radiate on the rear surface of the substrate 1, the terminals 3 are connected respectively to tester-side probe card terminals 2 through the intermediary of wires 4 on the substrate 1, said chip position recognizing pattern 5 is formed on the substrate 1, and said hole 6 is provided obliquely.
JP62205483A 1987-08-18 1987-08-18 Probe card Pending JPS6447040A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62205483A JPS6447040A (en) 1987-08-18 1987-08-18 Probe card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62205483A JPS6447040A (en) 1987-08-18 1987-08-18 Probe card

Publications (1)

Publication Number Publication Date
JPS6447040A true JPS6447040A (en) 1989-02-21

Family

ID=16507600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62205483A Pending JPS6447040A (en) 1987-08-18 1987-08-18 Probe card

Country Status (1)

Country Link
JP (1) JPS6447040A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100851491B1 (en) * 2006-12-21 2008-08-08 주식회사 포스코 Apparatus for measuring frictional wear of oil ring

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100851491B1 (en) * 2006-12-21 2008-08-08 주식회사 포스코 Apparatus for measuring frictional wear of oil ring

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