JPS6432654A - Substrate for loading semiconductor element - Google Patents

Substrate for loading semiconductor element

Info

Publication number
JPS6432654A
JPS6432654A JP62189133A JP18913387A JPS6432654A JP S6432654 A JPS6432654 A JP S6432654A JP 62189133 A JP62189133 A JP 62189133A JP 18913387 A JP18913387 A JP 18913387A JP S6432654 A JPS6432654 A JP S6432654A
Authority
JP
Japan
Prior art keywords
semiconductor element
insulating layer
layer
resin
loading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62189133A
Other languages
Japanese (ja)
Inventor
Koichi Tsuyama
Masashi Isono
Toshiro Okamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP62189133A priority Critical patent/JPS6432654A/en
Publication of JPS6432654A publication Critical patent/JPS6432654A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To dissipate heat easily to a metallic plate from a semiconductor element, and to obtain a substrate for loading the semiconductor element having excellent heat-dissipating properties by using a layer mainly comprising an inorganic matter having thermal conductivity better than a resin as an insulating layer on the underside of the semiconductor element. CONSTITUTION:A first insulating layer 2 using an inorganic matter as a main body is superposed onto a metallic plate 1, a second insulating layer 3, which mainly comprises a resin and to which a recessed section for loading a semiconductor element is formed, is shaped onto the layer 2, and a conductor circuit layer 4 is formed onto the layer 3. A flame spraying film consisting of alumina, etc., is employed as the insulating layer 2. A resin-impregnated glass fabric or a substance, in which inorganic fillers are mixed into the resin, is used as the insulating layer 3. Accordingly, heat is dissipated easily to the metallic plate 1 from the semiconductor element 5, thus acquiring a substrate for loading the element 5 having excellent heat-dissipating properties.
JP62189133A 1987-07-29 1987-07-29 Substrate for loading semiconductor element Pending JPS6432654A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62189133A JPS6432654A (en) 1987-07-29 1987-07-29 Substrate for loading semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62189133A JPS6432654A (en) 1987-07-29 1987-07-29 Substrate for loading semiconductor element

Publications (1)

Publication Number Publication Date
JPS6432654A true JPS6432654A (en) 1989-02-02

Family

ID=16235958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62189133A Pending JPS6432654A (en) 1987-07-29 1987-07-29 Substrate for loading semiconductor element

Country Status (1)

Country Link
JP (1) JPS6432654A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03278587A (en) * 1990-03-28 1991-12-10 Shin Kobe Electric Mach Co Ltd Metal base metal-foiled laminated board
US5576578A (en) * 1991-11-15 1996-11-19 Siemens Aktiengesellschaft High voltage insulating disk

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03278587A (en) * 1990-03-28 1991-12-10 Shin Kobe Electric Mach Co Ltd Metal base metal-foiled laminated board
US5576578A (en) * 1991-11-15 1996-11-19 Siemens Aktiengesellschaft High voltage insulating disk

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