JPS6432655A - Substrate for loading semiconductor element - Google Patents
Substrate for loading semiconductor elementInfo
- Publication number
- JPS6432655A JPS6432655A JP62189134A JP18913487A JPS6432655A JP S6432655 A JPS6432655 A JP S6432655A JP 62189134 A JP62189134 A JP 62189134A JP 18913487 A JP18913487 A JP 18913487A JP S6432655 A JPS6432655 A JP S6432655A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- semiconductor element
- loading
- semiconductor
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Insulated Metal Substrates For Printed Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
PURPOSE:To conduct an electrical design and a thermal design separate ly, and to obtain a substrate for loading a semiconductor having high heat-dissipating properties by making an insulating layer on the downside of a loading section for a semiconductor element and an insulating layer on the downside of a conductor circuit except a lower electrode for the semiconductor element to differ. CONSTITUTION:A substrate for loading a semiconductor element 5 is composed of a metallic plate 1, a first insulating layer 2, a second insulating layer 3 and a conductor circuit 4. The insulating layer 2 consists of a resin containing a granular or fibrous inorganic matter or a glass fabric on the surface of the metallic plate 1, and is 20-100mum thick. The insulating layer 3 mainly comprises the resin formed onto the surfaces of sections except a semiconductor-element loading predetermined section in the insulating layer 2. The conductor circuit, to which comparatively high voltage is applied, such as a power circuit is insulated sufficiently because it is insulated from the metallic plate 1 by two layers of the first and second insulating layers 2 and 3. Since voltage applied to the semiconductor element is generally low, the first insulating layer is thinned, and heat-dissipating properties can be improved. The underside of a housing section for the semiconductor element 5 and one part of the conductor circuit 4 are connected. Accordingly, an electrical design and a thermal design are performed separately, and the substrate for loading a semiconductor having high heat- dissipating properties is acquired.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62189134A JPS6432655A (en) | 1987-07-29 | 1987-07-29 | Substrate for loading semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62189134A JPS6432655A (en) | 1987-07-29 | 1987-07-29 | Substrate for loading semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6432655A true JPS6432655A (en) | 1989-02-02 |
Family
ID=16235977
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62189134A Pending JPS6432655A (en) | 1987-07-29 | 1987-07-29 | Substrate for loading semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6432655A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH036096A (en) * | 1989-06-02 | 1991-01-11 | Matsushita Electric Works Ltd | Circuit board |
| JPH05327152A (en) * | 1992-05-18 | 1993-12-10 | Sanken Electric Co Ltd | Wiring substrate and manufacutring method thereof |
| JPH06151656A (en) * | 1992-11-13 | 1994-05-31 | Kyocera Corp | Semiconductor chip housing package |
| JP2011091152A (en) * | 2009-10-21 | 2011-05-06 | Daikin Industries Ltd | Power module |
-
1987
- 1987-07-29 JP JP62189134A patent/JPS6432655A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH036096A (en) * | 1989-06-02 | 1991-01-11 | Matsushita Electric Works Ltd | Circuit board |
| JPH05327152A (en) * | 1992-05-18 | 1993-12-10 | Sanken Electric Co Ltd | Wiring substrate and manufacutring method thereof |
| JPH06151656A (en) * | 1992-11-13 | 1994-05-31 | Kyocera Corp | Semiconductor chip housing package |
| JP2011091152A (en) * | 2009-10-21 | 2011-05-06 | Daikin Industries Ltd | Power module |
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