JPS6430933U - - Google Patents

Description

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of an AD converter according to the present invention, FIG. 2 is a block diagram showing details of an integrating circuit, and FIG. 3 is an operating waveform diagram of the integrating circuit. 1 ₁ to 1n... Integrating circuit, 2... Signal detection circuit, 3
...OR circuit, 4...First FIFO memory, 5...Clock generation circuit, 6...Counter, 7...Second FI
FO memory, 8...CPU, 9...CPU bus, 10
...Control circuit, INT...Integrator, COMP...Comparator.

Claims (1)

[Claims for Utility Model Registration] An integrating circuit with the same configuration that integrates the input voltages of multiple channels, which integrates the input signal using an external control signal and then performs double integration to integrate the reference power supply voltage. An integrating circuit that generates a binary output whose output level changes when the integrated voltage becomes zero after the start, and a bit corresponding to the input channel in the n-bit data is set by detecting changes in the output of these integrating circuits. an OR circuit that generates a write pulse when any bit of the n-bit data is set; a clock generator that generates a reference clock; and a reference power source in the integration circuit. a counter that starts counting the clock from the point in time when voltage integration starts; a first memory of a first-in, first-out type into which output data of the signal detection circuit is written in response to a write signal from the OR circuit; a first-in, first-out type second memory into which the counted value of the counter is written in response to a write signal from the clock; a central processing unit that reads the contents of the first memory and the second memory via a bus; A control circuit for controlling the operation of an integrating circuit and a counter is provided, the integration by the plurality of integrating circuits is started simultaneously, and after integrating the input signal for a predetermined fixed period of time, the reference power supply voltage is integrated, and the integrated voltage becomes zero. The output of the signal detection circuit and the value of the counter at the time when An analog-to-digital converter that reads the contents sequentially from a memory and obtains a digital value corresponding to the voltage of the input signal of each input channel.